公开(公告)号：US20060246614A1

公开(公告)日：2006-11-02

申请号：US11411142

申请日：2006-04-26

申请人： Hyo Suh

发明人： Hyo Suh

IPC分类号： H01L21/00

CPC分类号： H01L21/02658 ,  H01L21/02414 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/0254

摘要： The invention provides a method for manufacturing a gallium nitride-based semiconductor device having low-density crystalline defects and high-quality crystalinity. In the manufacturing method according to the invention, first, a gallium oxide substrate is prepared. Then, a surface of the gallium oxide substrate is modified into a nitride via physical or chemical pretreatment to form a surface nitride layer having Ga—N bonding. Finally, gallium nitride-based semiconductor layer is formed on the surface nitride layer.

摘要翻译： 本发明提供了一种制造具有低密度晶体缺陷和高质量结晶度的氮化镓基半导体器件的方法。 在本发明的制造方法中，首先，准备氧化镓衬底。 然后，通过物理或化学预处理将氧化镓衬底的表面改性为氮化物，以形成具有Ga-N键的表面氮化物层。 最后，在表面氮化物层上形成氮化镓系半导体层。

公开(公告)号：US20040131537A1

公开(公告)日：2004-07-08

申请号：US10642043

申请日：2003-08-15

申请人： THE REGENTS OF THE UNIVERSITY OF CALIFORNIA

发明人： Peidong Yang ,  Matthew Law ,  Rongrui He ,  Rong Fan ,  Franklin Kim

IPC分类号： B32B009/04

CPC分类号： B81B3/0035 ,  B82Y20/00 ,  B82Y25/00 ,  B82Y30/00 ,  C30B23/00 ,  C30B29/605 ,  H01L21/02414 ,  H01L21/02428 ,  H01L21/02521 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02581 ,  H01L21/0259 ,  H01L21/02631 ,  Y10S977/755 ,  Y10S977/81 ,  Y10S977/811 ,  Y10T428/125 ,  Y10T428/29 ,  Y10T428/2973 ,  Y10T428/298

摘要： A two-layer nanotape that includes a nanoribbon substrate and an oxide that is epitaxially deposited on a flat surface of the nanoribbon substrate is described. A method for making the nanotape that includes providing plural substrates and placing the substrates in a quartz tube is also described. The oxide is deposited on the substrate using a pulsed laser ablation deposition process. The nanoribbons can be made from materials such as SnO2, ZnO, MgO, Al2O3, Si, GaN, or CdS. Also, the sintered oxide target can be made from materials such as TiO2, transition metal doped TiO2 (e.g., CO0.05Ti0.95O2), BaTiO3, ZnO, transition metal doped ZnO (e.g., Mn0.1Zn0.9O and Ni0.1Zn0.9O), LaMnO3, BaTiO3, PbTiO3, YBa2Cu3Oz, or SrCu2O2 and other p-type oxides. Additionally, temperature sensitive nanoribbon/metal bilayers and their method of fabrication by thermal evaporation are described. Metals such as Cu, Au, Ti, Al, Pt, Ni and others can be deposited on top of the nanoribbon surface. Such devices bend significantly as a function of temperature and are suitable as, for example, thermally activated nanoscale actuators.

摘要翻译： 描述了包括纳米薄片基底和外延沉积在纳米薄片的平坦表面上的氧化物的双层纳米线。 还描述了一种制造纳米线的方法，其包括提供多个基板并将基板放置在石英管中。 氧化物使用脉冲激光烧蚀沉积工艺沉积在衬底上。 纳米带可以由诸如SnO 2，ZnO，MgO，Al 2 O 3，Si，GaN或CdS的材料制成。 此外，烧结氧化物靶可以由诸如TiO 2，过渡金属掺杂的TiO 2（例如，CO 0.05 Ti 0.95 O 2），BaTiO 3，ZnO，过渡金属掺杂的ZnO（例如Mn0.1Zn0.9O和Ni0.1Zn0）的材料制成。 9O），LaMnO3，BaTiO3，PbTiO3，YBa2Cu3Oz或SrCu2O2等p型氧化物。 另外，描述了温度敏感的纳米棒/金属双层及其通过热蒸发制造的方法。 诸如Cu，Au，Ti，Al，Pt，Ni等的金属可以沉积在纳米棒表面的顶部。 这样的装置作为温度的函数显着弯曲，并且适合于例如热活化的纳米级致动器。

公开(公告)号：US4292374A

公开(公告)日：1981-09-29

申请号：US151283

申请日：1980-05-19

申请人： Jun-ichi Nishizawa ,  Mitsuhiro Kimura

发明人： Jun-ichi Nishizawa ,  Mitsuhiro Kimura

IPC分类号： C30B25/18 ,  C23C16/44 ,  C30B19/12 ,  C30B29/20 ,  H01L21/20 ,  H01L21/205 ,  H01L21/86 ,  C30B29/22

CPC分类号： C30B19/12 ,  H01L21/02414 ,  H01L21/0242 ,  H01L21/02433 ,  H01L21/02532 ,  Y10S117/902 ,  Y10S148/072 ,  Y10S148/079 ,  Y10S148/097 ,  Y10S148/15

摘要： A single crystal substrate for epitaxial growth thereon of a semiconductor layer. The substrate consists essentially of sapphire (aluminum oxide) and scandium oxide (Sc.sub.2 O.sub.3). The invention also provides the aforesaid single crystal substrate in combination with a semiconductor epitaxially grown thereon. The preferred semiconductors are silicon, gallium phosphide, aluminum phosphide and zinc sulphide.

摘要翻译： 用于在其上外延生长半导体层的单晶衬底。 衬底主要由蓝宝石（氧化铝）和氧化钪（Sc2O3）组成。 本发明还提供了与外延生长在其上的半导体组合的上述单晶衬底。 优选的半导体是硅，磷化镓，磷化铝和硫化锌。

公开(公告)号：US20240282709A1

公开(公告)日：2024-08-22

申请号：US18112564

申请日：2023-02-22

申请人： Applied Materials, Inc.

发明人： Zhaoxuan WANG ,  Jianxin LEI ,  Wenting HOU ,  David Maxwell GAGE ,  Zihao HE

IPC分类号： H01L23/532 ,  H01L21/02 ,  H01L21/3205 ,  H01L21/321 ,  H01L21/768

CPC分类号： H01L23/53266 ,  H01L21/0217 ,  H01L21/02183 ,  H01L21/02186 ,  H01L21/02189 ,  H01L21/02381 ,  H01L21/02414 ,  H01L21/02631 ,  H01L21/32051 ,  H01L21/3212 ,  H01L21/76834 ,  H01L21/7684 ,  H01L23/5329

摘要： A method to produce a layered substrate includes depositing a ruthenium layer having a first average grain size on a substrate; annealing the substrate at a temperature and for a period of time sufficient to produce an annealed ruthenium layer having a second average grain size which is greater than the first average grain size; and removing a portion of the ruthenium layer by chemical mechanical planarization to form a planarized ruthenium layer, to produce the layered substrate. A layered substrate is also disclosed.

公开(公告)号：US20230335598A1

公开(公告)日：2023-10-19

申请号：US18213311

申请日：2023-06-23

申请人： Semiconductor Energy Laboratory Co., Ltd.

发明人： Shunpei YAMAZAKI ,  Yasutaka NAKAZAWA ,  Masashi OOTA

IPC分类号： H01L29/24 ,  H01L29/06 ,  H01L29/12 ,  H01L29/267 ,  H01L29/423 ,  H01L29/43 ,  H01L29/66 ,  H01L21/02

CPC分类号： H01L29/24 ,  H01L29/0692 ,  H01L29/12 ,  H01L29/267 ,  H01L29/4232 ,  H01L29/43 ,  H01L29/66045 ,  H01L21/02414 ,  H01L21/02428

摘要： The field-effect mobility and reliability of a transistor including an oxide semiconductor film are improved. A semiconductor layer of a transistor is formed using a composite oxide semiconductor in which a first region and a second region are mixed. The first region includes a plurality of first clusters containing one or more of indium, zinc, and oxygen as a main component. The second region includes a plurality of second clusters containing one or more of indium, an element M (M represents Al, Ga, Y, or Sn), zinc, and oxygen. The first region includes a portion in which the plurality of first clusters are connected to each other. The second region includes a portion in which the plurality of second clusters are connected to each other.

公开(公告)号：US20190245142A1

公开(公告)日：2019-08-08

申请号：US16385052

申请日：2019-04-16

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： MASAYUKI TERAI

IPC分类号： H01L45/00 ,  C23C16/34 ,  H01L21/02 ,  H01L27/24

CPC分类号： H01L45/124 ,  C23C16/34 ,  H01L21/02414 ,  H01L21/02417 ,  H01L21/02483 ,  H01L27/2409 ,  H01L27/2427 ,  H01L27/2472 ,  H01L27/2481 ,  H01L45/06 ,  H01L45/122 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/126 ,  H01L45/144 ,  H01L45/16 ,  H01L45/1666 ,  H01L45/1675 ,  H01L45/1683 ,  H01L45/1691

摘要： A memory cell pillar of a memory device includes a heating electrode having a base portion (leg) and a fin portion (ascender), and a selection device between a first conductive line and the heating electrode. A side surface of the selection device and a side surface of the fin portion extend along a first straight line. A method of fabricating a memory device includes forming a plurality of first insulating walls through a stack structure including a preliminary selection device layer and a preliminary electrode layer, forming a plurality of self-aligned preliminary heating electrode layers, forming a plurality of second insulating walls each between two of the plurality of first insulating walls, and forming a plurality of third insulating walls in a plurality of holes extending along a direction intersecting the plurality of first insulating walls.

公开(公告)号：US20180240914A1

公开(公告)日：2018-08-23

申请号：US15867242

申请日：2018-01-10

申请人： TOYOTA JIDOSHA KABUSHIKI KAISHA

发明人： Tatsuji NAGAOKA

IPC分类号： H01L29/872 ,  H01L29/40 ,  H01L29/24 ,  H01L29/66 ,  H01L21/02 ,  H01L21/465 ,  H01L21/426

CPC分类号： H01L29/872 ,  H01L21/02178 ,  H01L21/02271 ,  H01L21/02414 ,  H01L21/02565 ,  H01L21/02581 ,  H01L21/0262 ,  H01L21/426 ,  H01L21/465 ,  H01L29/0615 ,  H01L29/2003 ,  H01L29/24 ,  H01L29/401 ,  H01L29/402 ,  H01L29/66212 ,  H01L29/66969

摘要： In a method of manufacturing a semiconductor device, a Schottky electrode is formed on an upper surface of a semiconductor substrate. A second region of the semiconductor substrate is etched such that a first region becomes higher than a second region, a rising surface is formed between the first and second regions, and an outer peripheral edge of the Schottky electrode is located on the first region. An insulating film is formed on the upper surface of the semiconductor substrate such that the insulating film annularly extends along the rising surface. A field plate electrode is formed. The field plate electrode is electrically connected with the Schottky electrode and faces the upper surface of the semiconductor substrate via the insulating film within an area extending from the outer peripheral edge of the Schottky electrode to the second region over the rising surface.

公开(公告)号：US10043664B2

公开(公告)日：2018-08-07

申请号：US15508465

申请日：2015-08-28

申请人： FLOSFIA INC.

发明人： Masaya Oda ,  Akio Takatsuka ,  Toshimi Hitora

IPC分类号： H01L29/10 ,  H01L21/02 ,  H01L29/24 ,  H01L29/04 ,  H01L21/24

CPC分类号： H01L21/02565 ,  H01L21/02414 ,  H01L21/02433 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02581 ,  H01L21/0262 ,  H01L21/02628 ,  H01L21/242 ,  H01L29/04 ,  H01L29/045 ,  H01L29/0619 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/7395 ,  H01L29/7786 ,  H01L29/78 ,  H01L29/8083 ,  H01L29/812 ,  H01L29/872 ,  H01L29/8725 ,  H01L33/42

摘要： A multilayer structure with excellent crystallinity and a semiconductor device of the multilayer structure with good mobility are provided. A multilayer structure includes: a corundum structured crystal substrate; and a crystalline film containing a corundum structured crystalline oxide as a major component, the film formed directly on the substrate or with another layer therebetween, wherein the crystal substrate has an off angle from 0.2° to 12.0°, and the crystalline oxide contains one or more metals selected from indium, aluminum, and gallium.

公开(公告)号：US20170278933A1

公开(公告)日：2017-09-28

申请号：US15507158

申请日：2015-08-18

申请人： TAMURA CORPORATION ,  National Institute of Information and Communications Technology ,  National University Corporation Tokyo University of Agriculture and Technology

发明人： Kohei SASAKI ,  Ken GOTO ,  Masataka HIGASHIWAKI ,  Man Hoi WONG ,  Akinori KOUKITO ,  Yoshinao KUMAGAI ,  Hisashi MURAKAMI

IPC分类号： H01L29/24 ,  H01L29/04 ,  H01L29/10

CPC分类号： H01L29/24 ,  H01L21/02414 ,  H01L21/02433 ,  H01L21/02483 ,  H01L21/02565 ,  H01L21/02576 ,  H01L21/02581 ,  H01L29/045 ,  H01L29/105 ,  H01L29/36 ,  H01L29/517 ,  H01L29/812

摘要： A semiconductor element includes a high-resistivity substrate that includes a β-Ga2O3-based single crystal including an acceptor impurity, a buffer layer on the high-resistivity substrate, the buffer layer including a β-Ga2O3-based single crystal, and a channel layer on the buffer layer, the channel layer including a β-Ga2O3-based single crystal including a donor impurity. A crystalline laminate structure includes a high-resistivity substrate that includes a β-Ga2O3-based single crystal including an acceptor impurity, a buffer layer on the high-resistivity substrate, the buffer layer including a β-Ga2O3-based single crystal, and a donor impurity-containing layer on the buffer layer, the donor impurity-containing layer including a β-Ga2O3-based single crystal including a donor impurity.

公开(公告)号：US20170278706A1

公开(公告)日：2017-09-28

申请号：US15508465

申请日：2015-08-28

申请人： FLOSFIA INC.

发明人： Masaya Oda ,  Akio Takatsuka ,  Toshimi Hitora

IPC分类号： H01L21/02 ,  H01L29/04 ,  H01L21/24 ,  H01L29/24

CPC分类号： H01L21/02565 ,  H01L21/02414 ,  H01L21/02433 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02581 ,  H01L21/0262 ,  H01L21/02628 ,  H01L21/242 ,  H01L29/04 ,  H01L29/045 ,  H01L29/0619 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/7395 ,  H01L29/7786 ,  H01L29/78 ,  H01L29/8083 ,  H01L29/812 ,  H01L29/872 ,  H01L29/8725 ,  H01L33/42

摘要： A multilayer structure with excellent crystallinity and a semiconductor device of the multilayer structure with good mobility are provided. A multilayer structure includes: a corundum structured crystal substrate; and a crystalline film containing a corundum structured crystalline oxide as a major component, the film formed directly on the substrate or with another layer therebetween, wherein the crystal substrate has an off angle from 0.2° to 12.0°, and the crystalline oxide contains one or more metals selected from indium, aluminum, and gallium.