Abstract:
Methods are provided for bonding substrates together using alignment structures and solder reflow techniques which achieve self-alignment in three dimensions, as well as semiconductor structures that are formed using such methods. A first alignment structure is formed on a bonding surface of a first substrate, which includes an alignment trench formed in the bonding surface of the first substrate. A second alignment structure is formed on a bonding surface of a second substrate, which includes a bonding pad with solder formed on the bonding pad. The first and second substrates are placed together with the solder of the second alignment structure in contact with the first alignment structure. A solder reflow process causes the solder to melt and flow into the alignment trench while pulling on the bonding pad to cause the second substrate to move into alignment with the first substrate in each of X, Y, and Z directions.
Abstract:
Smart toothbrush designs are provided. In one aspect, a toothbrush is provided which includes: a handle portion; and a head portion attached to the handle portion, wherein the head portion has bristles, a sample testing chamber containing at least one electronic sensor, a removable tip for drawing saliva samples into the sample testing chamber, and a calibration solution reservoir connected to the sample testing chamber. In another aspect, the head portion of the toothbrush has at least one optical sensor. A method for acquiring user data using the present smart toothbrush designs is also provided.
Abstract:
A package structure to implement two-phase cooling includes a chip stack disposed on a substrate, and a package lid that encloses the chip stack. The chip stack includes a plurality of conjoined chips, a central inlet manifold formed through a central region of the chip stack, and a peripheral outlet manifold. The central input manifold includes inlet nozzles to feed liquid coolant into flow cavities formed between adjacent conjoined chips. The peripheral outlet manifold outputs heated liquid and vapor from the flow cavities. The package lid includes a central coolant supply inlet aligned to the central inlet manifold, and a peripheral liquid-vapor outlet to output heated liquid and vapor that exits from the peripheral outlet manifold. Guiding walls may be included in the flow cavities to guide a flow of liquid and vapor, and the guiding walls can be arranged to form radial flow channels that are feed by different inlet nozzles of the central inlet manifold.
Abstract:
A smart tag comprises a processor, a non-volatile memory, at least one of an internal power source and an external power source, and a transceiver configured for two-way communication with a reader external to the smart tag. The smart tag is formed as an integrated circuit chip less than 10 cubic millimeters in size to less than 0.000125 cubic millimeters in size. An apparatus comprising the smart tag may further include an antenna connect to the smart tag.
Abstract:
Structures and methods are provided for temporarily bonding handler wafers to device wafers using bonding structures that include one or more releasable layers which are laser-ablatable using mid-wavelength infrared radiation.
Abstract:
A test probe structure having a planar surface and contact locations matched to test hardware is provided. The fabrication of the test probe structure addresses problems related to the possible deformation of base substrates during manufacture. Positional accuracy of contact locations and planarity of base substrates is achieved using dielectric layers, laser ablation, injection molded solder or redistribution layer wiring, and planarization techniques.
Abstract:
A microsystem with an integrated energy source serves as a platform and ecosystem for a variety of microsystems for implanting into human tissue. The microsystem includes a flexible battery located in an enclosed void. The enclosed void is formed by joining a first dielectric element with a second dielectric element.
Abstract:
A switching power supply in an integrated circuit, an integrated circuit comprising a switching power supply, and a method of assembling a switching power supply in an integrated circuit are disclosed. In one embodiment, the invention provides a three-dimensional switching power supply in an integrated circuit comprising a device layer. The switching power supply comprises three distinct strata arranged in series with the device layer, the three distinct strata including a switching layer including switching circuits, a capacitor layer including banks of capacitors, and an inductor layer including inductors. This switching power supply further comprises a multitude of connectors electrically and mechanically connecting together the device layer, the switching layer, the capacitor layer, and the inductor layer. The switching circuits, the capacitors and the inductors form a switching power supply for supplying power to the device layer.
Abstract:
A interposer sandwich structure comprises a top interposer and a bottom interposer enclosing an integrated circuit electronic device that includes means for attaching the device to the bottom interposer, and an interconnection structure connecting the top interposer to the bottom interposer. The top interposer may also be directly connected to a chip carrier in addition to the bottom interposer. The structure provides shielding and protection of the device against Electrostatic Discharge (ESD), Electromagnetic Interference (EMI), and Electromagnetic Conductivity (EMC) in miniaturized 3D packaging.
Abstract:
A method for processing a semiconductor wafer includes applying a release layer to a transparent handler. An adhesive layer, that is distinct from the release layer, is applied between a semiconductor wafer and the transparent handler having the release layer applied thereon. The semiconductor wafer is bonded to the transparent handler using the adhesive layer. The semiconductor wafer is processed while it is bonded to the transparent handler. The release layer is ablated by irradiating the release layer through the transparent handler with a laser. The semiconductor wafer is removed from the transparent handler.