公开(公告)号：US08283246B2

公开(公告)日：2012-10-09

申请号：US13091801

申请日：2011-04-21

申请人： Takashi Kitae ,  Seiichi Nakatani ,  Seiji Karashima ,  Yoshihisa Yamashita ,  Takashi Ichiryu

发明人： Takashi Kitae ,  Seiichi Nakatani ,  Seiji Karashima ,  Yoshihisa Yamashita ,  Takashi Ichiryu

IPC分类号： H01L21/00

CPC分类号： H01L24/16 ,  H01L21/4853 ,  H01L21/563 ,  H01L21/6835 ,  H01L24/11 ,  H01L24/13 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/11001 ,  H01L2224/11003 ,  H01L2224/1141 ,  H01L2224/11502 ,  H01L2224/11522 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2224/13105 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/165 ,  H01L2224/2741 ,  H01L2224/27436 ,  H01L2224/29101 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29291 ,  H01L2224/29299 ,  H01L2224/29305 ,  H01L2224/29309 ,  H01L2224/29311 ,  H01L2224/29313 ,  H01L2224/29316 ,  H01L2224/32225 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/83192 ,  H01L2224/832 ,  H01L2224/83856 ,  H01L2224/83862 ,  H01L2224/83874 ,  H01L2224/8388 ,  H01L2224/83885 ,  H01L2224/83886 ,  H01L2224/83887 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01009 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/0102 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01056 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/0134 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1579 ,  H01L2924/381 ,  H01L2924/3841 ,  H05K3/323 ,  H05K3/3436 ,  H05K3/3484 ,  H05K2201/10977 ,  H05K2203/0264 ,  H05K2203/087 ,  H05K2203/1178 ,  Y02P70/613 ,  H01L2924/01031 ,  H01L2924/01049 ,  H01L2924/01051 ,  H01L2924/01083 ,  H01L2924/00011 ,  H01L2924/00015 ,  H01L2924/066 ,  H01L2924/06 ,  H01L2924/0675 ,  H01L2924/0695 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： The invention involves mounting a solder resin composition (6) including a solder powder (5a) and a resin (4) on the first electronic component (2); arranging such that the connecting terminals (3) of the first electronic component (2) and the electrode terminals (7) of the second electronic component (8) are facing each other; ejecting a gas (9a) from a gas generation source (1) included in the first electronic component (2) by heating the first electronic component (2) and the solder resin composition; and inducing the flow of the solder powder (5a) in the solder resin composition (6) by inducing convection of the gas (9a) in the solder resin composition (6), and electrically connecting the connecting terminals (3) and the electrode terminals (7) by self-assembly on the connecting terminals (3) and the electrode terminals (7). Through this are provided a flip chip packaging method that enables connecting, with high connection reliability, electrode terminals of a semiconductor chip wired with narrow pitch and connecting terminals of a circuit board, and a bump formation method for packaging on a circuit board.

摘要翻译： 本发明涉及将包含焊料粉末（5a）和树脂（4）的焊料树脂组合物（6）安装在第一电子部件（2）上; 排列成使得第一电子部件（2）的连接端子（3）和第二电子部件（8）的电极端子（7）彼此面对; 通过加热第一电子部件（2）和焊料树脂组合物，从包括在第一电子部件（2）中的气体发生源（1）喷出气体（9a） 并且通过引起焊料树脂组合物（6）中的气体（9a）的对流而引起焊料粉末（5a）在焊料树脂组合物（6）中的流动，并将连接端子（3）和电极端子 （7）通过在连接端子（3）和电极端子（7）上的自组装。 通过这种方式提供了一种倒装芯片封装方法，其以高连接可靠性连接具有窄间距的半导体芯片的电极端子和电路板的连接端子，以及用于封装在电路板上的凸块形成方法。

公开(公告)号：US08012801B2

公开(公告)日：2011-09-06

申请号：US12717433

申请日：2010-03-04

申请人： Seiji Karashima ,  Yoshihisa Yamashita ,  Satoru Tomekawa ,  Takashi Kitae ,  Seiichi Nakatani

发明人： Seiji Karashima ,  Yoshihisa Yamashita ,  Satoru Tomekawa ,  Takashi Kitae ,  Seiichi Nakatani

IPC分类号： H01L21/00

CPC分类号： H01L21/563 ,  H01L21/6835 ,  H01L24/11 ,  H01L24/13 ,  H01L24/29 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/11003 ,  H01L2224/1152 ,  H01L2224/131 ,  H01L2224/1329 ,  H01L2224/133 ,  H01L2224/1601 ,  H01L2224/16145 ,  H01L2224/16238 ,  H01L2224/29011 ,  H01L2224/29035 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/293 ,  H01L2224/32052 ,  H01L2224/32145 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2224/818 ,  H01L2224/83102 ,  H01L2224/83191 ,  H01L2224/83203 ,  H01L2224/83886 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01009 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01056 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/14 ,  H01L2924/181 ,  H05K3/323 ,  H05K3/3436 ,  H05K3/3484 ,  H05K2201/10977 ,  H05K2203/0278 ,  H05K2203/0425 ,  Y10S428/901 ,  Y10T428/24917 ,  Y10T428/254 ,  Y10T428/31681 ,  H01L2924/00 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2924/01083 ,  H01L2924/00012 ,  H01L2224/05599

摘要： A flip chip mounting process includes the steps of supplying a resin (13) containing solder powder and a convection additive (12) onto a wiring substrate (10) having a plurality of electrode terminals (II), then bringing a semiconductor chip (20) having a plurality of connecting terminals (11) into contact with a surface of the supplied resin (13), and then heating the wiring substrate (10) to a temperature that enables the solder powder to melt. The heating step is carried out at a temperature that is higher than the boiling point of the convection additive (12) to allow the boiling convection additive (12) to move within the resin (12). During this heating step, the melted solder powder is allowed to self-assemble into the region between each electrode terminal (11) of the wiring substrate (10) and each connecting terminal (21) of the semiconductor chip to form an electrical connection between each electrode terminal (11) and each connecting terminal (21).

摘要翻译： 倒装芯片安装工艺包括以下步骤：将含有焊料粉末的树脂（13）和对流添加剂（12）提供到具有多个电极端子（II）的布线基板（10）上，然后将半导体芯片（20） 具有与供给的树脂（13）的表面接触的多个连接端子（11），然后将布线基板（10）加热到使焊料粉末熔化的温度。 加热步骤在高于对流添加剂（12）的沸点的温度下进行，以允许沸腾对流添加剂（12）在树脂（12）内移动。 在该加热步骤中，使熔融的焊料粉末自组装到布线基板（10）的每个电极端子（11）与半导体芯片的每个连接端子（21）之间的区域中，以形成每个 电极端子（11）和每个连接端子（21）。

公开(公告)号：US20110180900A1

公开(公告)日：2011-07-28

申请号：US13080152

申请日：2011-04-05

申请人： Koichi HIRANO ,  Tetsuyosyi Ogura ,  Seiichi Nakatani

发明人： Koichi HIRANO ,  Tetsuyosyi Ogura ,  Seiichi Nakatani

IPC分类号： H01L29/02

CPC分类号： H01L24/13 ,  H01G4/008 ,  H01G4/33 ,  H01G9/045 ,  H01G9/07 ,  H01G9/15 ,  H01L23/5223 ,  H01L24/11 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05548 ,  H01L2224/05647 ,  H01L2224/05671 ,  H01L2224/1131 ,  H01L2224/11831 ,  H01L2224/11901 ,  H01L2224/13022 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13155 ,  H01L2224/1358 ,  H01L2224/13624 ,  H01L2224/13644 ,  H01L2224/13655 ,  H01L2224/1379 ,  H01L2224/138 ,  H01L2224/16 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/00014 ,  H01L2224/13099

摘要： A semiconductor chip comprising a capacitor capable of effectively controlling the voltage drop of an LSI is provided. A semiconductor substrate is provided with an element electrode having at least its surface constituted of an aluminum electrode. The surface of the aluminum electrode is roughened. An oxide film is provided on the aluminum electrode. A conductive film is provided on the oxide film. The aluminum electrode, oxide film and conductive film form a capacitor.

摘要翻译： 提供了包括能够有效地控制LSI的电压降的电容器的半导体芯片。 半导体衬底设置有至少其表面由铝电极构成的元件电极。 铝电极的表面被粗糙化。 在铝电极上设置氧化膜。 在氧化膜上设置导电膜。 铝电极，氧化膜和导电膜形成电容器。

公开(公告)号：US07943518B2

公开(公告)日：2011-05-17

申请号：US12377076

申请日：2007-08-24

申请人： Koichi Hirano ,  Tetsuyoshi Ogura ,  Seiichi Nakatani

发明人： Koichi Hirano ,  Tetsuyoshi Ogura ,  Seiichi Nakatani

IPC分类号： H01L21/00

CPC分类号： H01L24/13 ,  H01G4/008 ,  H01G4/33 ,  H01G9/045 ,  H01G9/07 ,  H01G9/15 ,  H01L23/5223 ,  H01L24/11 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05548 ,  H01L2224/05647 ,  H01L2224/05671 ,  H01L2224/1131 ,  H01L2224/11831 ,  H01L2224/11901 ,  H01L2224/13022 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13155 ,  H01L2224/1358 ,  H01L2224/13624 ,  H01L2224/13644 ,  H01L2224/13655 ,  H01L2224/1379 ,  H01L2224/138 ,  H01L2224/16 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/00014 ,  H01L2224/13099

摘要： A semiconductor chip comprising a capacitor capable of effectively controlling the voltage drop of an LSI is provided. A semiconductor substrate is provided with an element electrode having at least its surface constituted of an aluminum electrode. The surface of the aluminum electrode is roughened. An oxide film is provided on the aluminum electrode. A conductive film is provided on the oxide film. The aluminum electrode, oxide film and conductive film form a capacitor.

摘要翻译： 提供了包括能够有效地控制LSI的电压降的电容器的半导体芯片。 半导体衬底设置有至少其表面由铝电极构成的元件电极。 铝电极的表面被粗糙化。 在铝电极上设置氧化膜。 在氧化膜上设置导电膜。 铝电极，氧化膜和导电膜形成电容器。

公开(公告)号：US07927997B2

公开(公告)日：2011-04-19

申请号：US11579299

申请日：2006-03-07

申请人： Koichi Hirano ,  Seiji Karashima ,  Takashi Ichiryu ,  Yoshihiro Tomita ,  Seiichi Nakatani

发明人： Koichi Hirano ,  Seiji Karashima ,  Takashi Ichiryu ,  Yoshihiro Tomita ,  Seiichi Nakatani

IPC分类号： H01L21/445

CPC分类号： H01L21/563 ,  B23K35/0244 ,  H01L21/67144 ,  H01L21/6835 ,  H01L24/11 ,  H01L24/12 ,  H01L24/16 ,  H01L24/75 ,  H01L24/83 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/11003 ,  H01L2224/1131 ,  H01L2224/13099 ,  H01L2224/1319 ,  H01L2224/133 ,  H01L2224/16 ,  H01L2224/75 ,  H01L2224/83192 ,  H01L2224/8321 ,  H01L2224/83815 ,  H01L2224/83886 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01009 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01056 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/18161 ,  H01L2924/30105 ,  H05K3/323 ,  H05K3/3436 ,  H05K3/3484 ,  H05K2201/10977 ,  H05K2203/1361 ,  Y02P70/613 ,  Y10T29/53178 ,  H01L2224/05599

摘要： To provide a flip-chip mounting method and a bump formation method applicable to flip-chip mounting of a next generation LSI and having high productivity and high reliability.A semiconductor chip 20 having a plurality of electrode terminals 12 is held to oppose a circuit board 21 having a plurality of connection terminals 11 with a given gap provided therebetween, and the semiconductor chip 20 and the circuit board 21 in this state are dipped in a dipping bath 40 containing a melted resin 14 including melted solder particles for a given period of time. In this dipping process, the melted solder particles self-assemble between the connection terminals 11 of the circuit board 21 and the electrode terminals 12 of the semiconductor chip 20, so as to form connectors 22 between these terminals. Thereafter, the semiconductor chip 20 and the circuit board 21 are taken out of the dipping bath 40, and the melted resin 14 having permeated into the gap between the semiconductor chip 20 and the circuit board 21 is cured, so as to complete a flip-chip mounting body.

摘要翻译： 提供适用于下一代LSI的倒装安装并具有高生产率和高可靠性的倒装芯片安装方法和凸块形成方法。 具有多个电极端子12的半导体芯片20被保持为具有多个连接端子11的电路板21，其间设置有给定的间隙，并且在该状态下将半导体芯片20和电路板21浸入 浸渍浴40含有包含熔融的焊料颗粒的熔融树脂14一段给定的时间。 在该浸渍过程中，熔融的焊料颗粒自组装在电路板21的连接端子11和半导体芯片20的电极端子12之间，从而在这些端子之间形成连接器22。 此后，半导体芯片20和电路板21从浸渍浴40中取出，并且已经渗透到半导体芯片20和电路板21之间的间隙中的熔融树脂14固化， 芯片安装体。

公开(公告)号：US20110049598A1

公开(公告)日：2011-03-03

申请号：US12939729

申请日：2010-11-04

申请人： Koichi HIRANO ,  Seiichi Nakatani ,  Shingo Komatsu ,  Yoshihisa Yamashita ,  Takashi Ichiryu

发明人： Koichi HIRANO ,  Seiichi Nakatani ,  Shingo Komatsu ,  Yoshihisa Yamashita ,  Takashi Ichiryu

IPC分类号： H01L29/786

CPC分类号： H01L51/0024 ,  H01L29/41733 ,  H01L29/66742 ,  H01L29/78603 ,  H01L51/0023 ,  H01L51/0097 ,  H01L51/0525 ,  H01L51/055 ,  H01L51/102 ,  Y10T428/24917

摘要： A layered film of a three-layer clad foil formed with a first metal layer 23, a second metal layer 25, and an inorganic insulating layer 35 interposed therebetween is prepared. After the second metal layer 25 is partially etched to form a gate electrode 20g, the first metal layer 23 is partially etched to form source/drain electrodes 20s, 20d in a region corresponding to the gate electrode 20g. A semiconductor layer 40 is then formed in contact with the source/drain electrodes 20s, 20d and on the gate electrode 20g with the inorganic insulating layer 35 interposed therebetween. The inorganic insulating layer 35 on the gate electrode 20g functions as a gate insulating film 30, and the semiconductor layer 40 between the source/drain electrodes 20s, 20d on the inorganic insulating layer 35 functions as a channel.

摘要翻译： 制备形成有第一金属层23，第二金属层25和介于其间的无机绝缘层35的三层复合箔的分层膜。 在第二金属层25被部分蚀刻以形成栅电极20g之后，第一金属层23被部分蚀刻以在对应于栅电极20g的区域中形成源/漏电极20s，20d。 然后，将半导体层40形成为与源极/漏极20s，20d接触并且在栅极电极20g上形成有绝缘层35。 栅电极20g上的无机绝缘层35用作栅极绝缘膜30，无机绝缘层35上的源/漏电极20s，20d之间的半导体层40用作沟道。

公开(公告)号：US07888789B2

公开(公告)日：2011-02-15

申请号：US11090401

申请日：2005-03-25

申请人： Yasuhiro Sugaya ,  Shingo Komatsu ,  Koichi Hirano ,  Seiichi Nakatani ,  Yasuyuki Matsuoka ,  Toshiyuki Asahi ,  Yoshihisa Yamashita

发明人： Yasuhiro Sugaya ,  Shingo Komatsu ,  Koichi Hirano ,  Seiichi Nakatani ,  Yasuyuki Matsuoka ,  Toshiyuki Asahi ,  Yoshihisa Yamashita

IPC分类号： H01L23/12 ,  H01L21/4763 ,  H01R43/20

CPC分类号： H05K3/20 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2221/68363 ,  H01L2924/0002 ,  H01L2924/0102 ,  H01L2924/01078 ,  H05K1/0306 ,  H05K1/16 ,  H05K1/162 ,  H05K1/165 ,  H05K1/167 ,  H05K3/205 ,  H05K3/4061 ,  H05K3/4069 ,  H05K2203/1461 ,  Y10T29/49149 ,  Y10T29/49179 ,  Y10T29/49208 ,  Y10T29/49213 ,  Y10T428/12486 ,  H01L2924/00

摘要： A transfer material capable of transferring a fine wiring pattern to a substrate reliably and easily. The transfer material includes at least three layers of a first metal layer as a carrier, a second metal layer that is transferred to the substrate as a wiring pattern, and a peel layer adhering the first and second metal layers releasably. On the surface portion of the first metal layer, a concave and convex portion corresponding to the wiring pattern is formed, and the peel layer and the second metal layer are formed on a region of the convex portions.

摘要翻译： 能够可靠且容易地将精细布线图案转印到基板上的转印材料。 转印材料包括作为载体的第一金属层，作为布线图案转印到基板的第二金属层和可释放地粘附第一和第二金属层的剥离层的至少三层。 在第一金属层的表面部分上形成与布线图形对应的凹凸部分，并且在凸部的区域上形成剥离层和第二金属层。

公开(公告)号：US07820021B2

公开(公告)日：2010-10-26

申请号：US12078891

申请日：2008-04-08

申请人： Seiji Karashima ,  Takashi Kitae ,  Seiichi Nakatani

发明人： Seiji Karashima ,  Takashi Kitae ,  Seiichi Nakatani

IPC分类号： C25B9/00 ,  C25C7/00 ,  C25D17/00 ,  B22D37/00 ,  B22D39/00 ,  B22D41/00 ,  B22D45/00 ,  H01L21/00

CPC分类号： H01L24/83 ,  H01L21/563 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/13099 ,  H01L2224/1319 ,  H01L2224/1329 ,  H01L2224/13339 ,  H01L2224/13347 ,  H01L2224/16148 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/165 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29291 ,  H01L2224/293 ,  H01L2224/29339 ,  H01L2224/29347 ,  H01L2224/73204 ,  H01L2224/75 ,  H01L2224/83047 ,  H01L2224/83091 ,  H01L2224/83097 ,  H01L2224/83192 ,  H01L2224/83204 ,  H01L2224/83862 ,  H01L2224/8388 ,  H01L2224/83886 ,  H01L2224/83887 ,  H01L2225/06513 ,  H01L2924/01002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01009 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01067 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/14 ,  H01L2924/1579 ,  H01L2924/30105 ,  H01L2924/381 ,  H05K3/323 ,  H05K2201/10674 ,  H05K2203/087 ,  Y10T156/1744 ,  H01L2924/00011 ,  H01L2924/066 ,  H01L2924/00015 ,  H01L2924/00 ,  H01L2924/00014

摘要： A flip chip mounting method which is applicable to the flip chip mounting of a next-generation LSI and high in productivity and reliability as well as a method for connecting substrates are provided. A circuit board 10 having a plurality of connecting terminals 11 and a semiconductor chip 20 having a plurality of electrode terminals 21 are disposed in mutually facing relation and a resin 13 containing conductive particles 12 and a gas bubble generating agent is supplied into the space therebetween. In this state, the resin 13 is heated to generate gas bubbles 30 from the gas bubble generating agent contained in the resin 13. The resin 13 is pushed toward the outside of the generated gas bubbles 30 by the growth thereof. The resin 13 pushed to the outside is self-assembled in the form of columns between the respective terminals of the circuit board 10 and the semiconductor chip 20. In this state, by pressing the semiconductor chip 20 against the circuit board 10, the conductive particles 12 contained in the resin 13 self-assembled between the facing terminals are brought into contact with each other to provide electrical connection between the terminals.

摘要翻译： 提供了一种适用于下一代LSI的倒装芯片安装并且生产率和可靠性高的倒装芯片安装方法以及用于连接基板的方法。 具有多个连接端子11的电路板10和具有多个电极端子21的半导体芯片20以相互面对的关系设置，并且将含有导电粒子12和气泡发生剂的树脂13供给到它们之间的空间中。 在这种状态下，树脂13被加热，从包含在树脂13中的气泡产生剂产生气泡30.树脂13通过其生长被推向产生的气泡30的外部。 被推到外面的树脂13以电路板10的各个端子和半导体芯片20之间的列的形式自组装。在这种状态下，通过将半导体芯片20压靠在电路板10上，导电颗粒 包含在自组装在相对端子之间的树脂13中的12彼此接触以提供端子之间的电连接。

公开(公告)号：US07759162B2

公开(公告)日：2010-07-20

申请号：US11662286

申请日：2005-09-07

申请人： Seiji Karashima ,  Yoshihisa Yamashita ,  Satoru Tomekawa ,  Takashi Kitae ,  Seiichi Nakatani

发明人： Seiji Karashima ,  Yoshihisa Yamashita ,  Satoru Tomekawa ,  Takashi Kitae ,  Seiichi Nakatani

IPC分类号： H01L21/00

CPC分类号： H01L21/563 ,  H01L21/6835 ,  H01L24/11 ,  H01L24/13 ,  H01L24/29 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/11003 ,  H01L2224/1152 ,  H01L2224/131 ,  H01L2224/1329 ,  H01L2224/133 ,  H01L2224/1601 ,  H01L2224/16145 ,  H01L2224/16238 ,  H01L2224/29011 ,  H01L2224/29035 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/293 ,  H01L2224/32052 ,  H01L2224/32145 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2224/818 ,  H01L2224/83102 ,  H01L2224/83191 ,  H01L2224/83203 ,  H01L2224/83886 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01009 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01056 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/14 ,  H01L2924/181 ,  H05K3/323 ,  H05K3/3436 ,  H05K3/3484 ,  H05K2201/10977 ,  H05K2203/0278 ,  H05K2203/0425 ,  Y10S428/901 ,  Y10T428/24917 ,  Y10T428/254 ,  Y10T428/31681 ,  H01L2924/00 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2924/01083 ,  H01L2924/00012 ,  H01L2224/05599

摘要： A flip chip mounting process includes the steps of supplying a resin (13) containing solder powder and a convection additive (12) onto a wiring substrate (10) having a plurality of electrode terminals (11), then bringing a semiconductor chip (20) having a plurality of connecting terminals (11) into contact with a surface of the supplied resin (13), and then heating the wiring substrate (10) to a temperature that enables the solder powder to melt. The heating step is carried out at a temperature that is higher than the boiling point of the convection additive (12) to allow the boiling convection additive (12) to move within the resin (12). During this heating step, the melted solder powder is allowed to self-assemble into the region between each electrode terminal (11) of the wiring substrate (10) and each connecting terminal (21) of the semiconductor chip to form an electrical connection between each electrode terminal (11) and each connecting terminal (21). Finally, the resin is cured so as to secure the semiconductor chip (20) to the wiring substrate (10).

摘要翻译： 倒装芯片安装方法包括以下步骤：将含有焊料粉末的树脂（13）和对流添加剂（12）提供到具有多个电极端子（11）的布线基板（10）上，然后将半导体芯片（20） 具有与供给的树脂（13）的表面接触的多个连接端子（11），然后将布线基板（10）加热到使焊料粉末熔化的温度。 加热步骤在高于对流添加剂（12）的沸点的温度下进行，以允许沸腾对流添加剂（12）在树脂（12）内移动。 在该加热步骤中，使熔融的焊料粉末自组装到布线基板（10）的每个电极端子（11）与半导体芯片的每个连接端子（21）之间的区域中，以形成每个 电极端子（11）和每个连接端子（21）。 最后，树脂被固化，以将半导体芯片（20）固定到布线基板（10）上。

公开(公告)号：US20100148376A1

公开(公告)日：2010-06-17

申请号：US12717433

申请日：2010-03-04

申请人： Seiji Karashima ,  Yoshihisa Yamashita ,  Satoru Tomekawa ,  Takashi Kitae ,  Seiichi Nakatani

发明人： Seiji Karashima ,  Yoshihisa Yamashita ,  Satoru Tomekawa ,  Takashi Kitae ,  Seiichi Nakatani

IPC分类号： H01L23/488 ,  H01L21/60

CPC分类号： H01L21/563 ,  H01L21/6835 ,  H01L24/11 ,  H01L24/13 ,  H01L24/29 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/11003 ,  H01L2224/1152 ,  H01L2224/131 ,  H01L2224/1329 ,  H01L2224/133 ,  H01L2224/1601 ,  H01L2224/16145 ,  H01L2224/16238 ,  H01L2224/29011 ,  H01L2224/29035 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/293 ,  H01L2224/32052 ,  H01L2224/32145 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2224/818 ,  H01L2224/83102 ,  H01L2224/83191 ,  H01L2224/83203 ,  H01L2224/83886 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01009 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01056 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/14 ,  H01L2924/181 ,  H05K3/323 ,  H05K3/3436 ,  H05K3/3484 ,  H05K2201/10977 ,  H05K2203/0278 ,  H05K2203/0425 ,  Y10S428/901 ,  Y10T428/24917 ,  Y10T428/254 ,  Y10T428/31681 ,  H01L2924/00 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2924/01083 ,  H01L2924/00012 ,  H01L2224/05599

摘要： A flip chip mounting process includes the steps of supplying a resin (13) containing solder powder and a convection additive (12) onto a wiring substrate (10) having a plurality of electrode terminals (11), then bringing a semiconductor chip (20) having a plurality of connecting terminals (11) into contact with a surface of the supplied resin (13), and then heating the wiring substrate (10) to a temperature that enables the solder powder to melt. The heating step is carried out at a temperature that is higher than the boiling point of the convection additive (12) to allow the boiling convection additive (12) to move within the resin (12). During this heating step, the melted solder powder is allowed to self-assemble into the region between each electrode terminal (11) of the wiring substrate (10) and each connecting terminal (21) of the semiconductor chip to form an electrical connection between each electrode terminal (11) and each connecting terminal (21). Finally, the resin is cured so as to secure the semiconductor chip (20) to the wiring substrate (10).

摘要翻译： 倒装芯片安装方法包括以下步骤：将含有焊料粉末的树脂（13）和对流添加剂（12）提供到具有多个电极端子（11）的布线基板（10）上，然后将半导体芯片（20） 具有与供给的树脂（13）的表面接触的多个连接端子（11），然后将布线基板（10）加热到使焊料粉末熔化的温度。 加热步骤在高于对流添加剂（12）的沸点的温度下进行，以允许沸腾对流添加剂（12）在树脂（12）内移动。 在该加热步骤中，使熔融的焊料粉末自组装到布线基板（10）的每个电极端子（11）与半导体芯片的每个连接端子（21）之间的区域中，以形成每个 电极端子（11）和每个连接端子（21）。 最后，树脂被固化，以将半导体芯片（20）固定到布线基板（10）上。