公开(公告)号：US09570383B2

公开(公告)日：2017-02-14

申请号：US14746247

申请日：2015-06-22

申请人： Jin-Kyung Kim ,  Yong-hoon Kim ,  Seong-Ho Shin

发明人： Jin-Kyung Kim ,  Yong-hoon Kim ,  Seong-Ho Shin

IPC分类号： H01L23/02 ,  H01L23/498 ,  H05K1/18 ,  H01L23/31

CPC分类号： H01L23/49816 ,  H01L23/3128 ,  H01L23/49838 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/0002 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/181 ,  H05K2201/09218 ,  H05K2201/10378 ,  H05K2201/10734 ,  H01L2924/00012 ,  H01L2924/00

摘要： Semiconductor packages, module substrates and semiconductor package modules having the same are provided. The semiconductor package module includes a module substrate provided with a plurality of signal wires on an upper surface thereof, a package substrate disposed on the module substrate, a semiconductor chip disposed on one surface of the package substrate, and a plurality of external connection terminals disposed on another surface of the package substrate.

摘要翻译： 提供半导体封装，模块基板和具有该半导体封装的半导体封装模块。 半导体封装模块包括在其上表面上设置有多个信号线的模块基板，设置在模块基板上的封装基板，设置在封装基板的一个表面上的半导体芯片，以及设置在多个外部连接端子 在封装衬底的另一个表面上。

公开(公告)号：US20140339692A1

公开(公告)日：2014-11-20

申请号：US14102430

申请日：2013-12-10

申请人： YONG-HOON KIM ,  JI-CHUL KIM ,  SEONG-HO SHIN ,  IN-HO CHOI

发明人： YONG-HOON KIM ,  JI-CHUL KIM ,  SEONG-HO SHIN ,  IN-HO CHOI

IPC分类号： H01L23/367

CPC分类号： H01L23/36 ,  H01L23/3677 ,  H01L23/373 ,  H01L23/3736 ,  H01L23/49816 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/13025 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2225/06589 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00

摘要： A semiconductor package stack, comprising: a lower semiconductor package including a lower semiconductor chip mounted on a lower package board; an upper semiconductor package stacked on the lower semiconductor package and including an upper semiconductor chip mounted on an upper package board, wherein the upper package board includes an opening configured to expose a lower surface of the upper semiconductor chip; and a first heat slug disposed within the opening, contacting the lower surface of the upper semiconductor chip, and contacting an upper surface of the lower semiconductor chip.

摘要翻译： 一种半导体封装堆叠，包括：下半导体封装，包括安装在下封装板上的下半导体芯片; 上半导体封装，堆叠在下半导体封装上并且包括安装在上封装板上的上半导体芯片，其中上封装板包括被配置为暴露上半导体芯片的下表面的开口; 以及设置在所述开口内的第一热块，与所述上半导体芯片的下表面接触并且接触所述下半导体芯片的上表面。

公开(公告)号：US08872319B2

公开(公告)日：2014-10-28

申请号：US13243704

申请日：2011-09-23

申请人： Yong-Hoon Kim ,  Hee-Seok Lee ,  Seong-Ho Shin ,  Se-Ho You ,  Yun-Hee Lee

发明人： Yong-Hoon Kim ,  Hee-Seok Lee ,  Seong-Ho Shin ,  Se-Ho You ,  Yun-Hee Lee

IPC分类号： H01L23/02 ,  H01L23/552 ,  H01L25/10 ,  H01L25/16 ,  H01L23/31 ,  H01L23/00

CPC分类号： H01L25/50 ,  H01L23/3128 ,  H01L23/5226 ,  H01L23/552 ,  H01L24/11 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L25/105 ,  H01L25/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45139 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1436 ,  H01L2924/1438 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

摘要： A stacked package structure is provided. The stacked package structure includes a stacked package including a lower semiconductor package, an upper semiconductor package disposed on the lower semiconductor package and spaced a predetermined distance apart from the lower semiconductor package, an inter-package connecting portion electrically connecting the lower semiconductor package and the upper semiconductor package while supporting a space therebetween, and an insulation layer disposed at least outside the inter-package connecting portion and filling the space between the lower semiconductor package and the upper semiconductor package, and an electromagnetic shielding layer surrounding lateral and top surfaces of the stacked package.

摘要翻译： 提供堆叠的包装结构。 堆叠封装结构包括：堆叠封装，包括下半导体封装，设置在下半导体封装上并与下半导体封装隔开预定距离的上半导体封装;电连接下半导体封装和 上部半导体封装，同时支撑它们之间的空间，以及绝缘层，其至少设置在所述封装间连接部分的外部并填充所述下部半导体封装和所述上部半导体封装之间的空间，以及围绕所述下部半导体封装的横向和顶部表面的电磁屏蔽层 堆叠包装。

公开(公告)号：US20140225236A1

公开(公告)日：2014-08-14

申请号：US14254969

申请日：2014-04-17

申请人： Yong-Hoon KIM ,  In-Ho CHOI ,  Keung-Beum KIM

发明人： Yong-Hoon KIM ,  In-Ho CHOI ,  Keung-Beum KIM

IPC分类号： H01L23/552 ,  H01L21/48

CPC分类号： H01L23/552 ,  H01L21/4814 ,  H01L21/78 ,  H01L23/3121 ,  H01L23/3135 ,  H01L23/3192 ,  H01L23/49816 ,  H01L23/5225 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/92 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/9202 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2225/06565 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/0102 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01056 ,  H01L2924/01066 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05552 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device, a semiconductor package, and an electronic device are provided. The electronic device includes a first semiconductor package disposed on a circuit substrate. A second semiconductor package is provided on the circuit substrate and spaced apart from the first semiconductor package. An insulating electromagnetic shielding structure is provided on the top and the lateral surfaces of the first semiconductor package. A conductive electromagnetic shielding structure is provided on the circuit substrate to cover the first and second semiconductor packages and the insulating electromagnetic shielding structure.

摘要翻译： 提供半导体器件，半导体封装和电子器件。 电子设备包括设置在电路基板上的第一半导体封装。 第二半导体封装设置在电路基板上并与第一半导体封装间隔开。 绝缘电磁屏蔽结构设置在第一半导体封装的顶表面和侧表面上。 导电电磁屏蔽结构设置在电路基板上以覆盖第一和第二半导体封装和绝缘电磁屏蔽结构。

公开(公告)号：US08736032B2

公开(公告)日：2014-05-27

申请号：US13437285

申请日：2012-04-02

申请人： Yong-Hoon Kim ,  In-Ho Choi ,  Keung-Beum Kim

发明人： Yong-Hoon Kim ,  In-Ho Choi ,  Keung-Beum Kim

IPC分类号： H01L23/552

CPC分类号： H01L23/552 ,  H01L21/4814 ,  H01L21/78 ,  H01L23/3121 ,  H01L23/3135 ,  H01L23/3192 ,  H01L23/49816 ,  H01L23/5225 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/92 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/9202 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2225/06565 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/0102 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01056 ,  H01L2924/01066 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05552 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device, a semiconductor package, and an electronic device are provided. The electronic device includes a first semiconductor package disposed on a circuit substrate. A second semiconductor package is provided on the circuit substrate and spaced apart from the first semiconductor package. An insulating electromagnetic shielding structure is provided on the top and the lateral surfaces of the first semiconductor package. A conductive electromagnetic shielding structure is provided on the circuit substrate to cover the first and second semiconductor packages and the insulating electromagnetic shielding structure.

摘要翻译： 提供半导体器件，半导体封装和电子器件。 电子设备包括设置在电路基板上的第一半导体封装。 第二半导体封装设置在电路基板上并与第一半导体封装间隔开。 绝缘电磁屏蔽结构设置在第一半导体封装的顶表面和侧表面上。 导电电磁屏蔽结构设置在电路基板上以覆盖第一和第二半导体封装和绝缘电磁屏蔽结构。

公开(公告)号：US08652635B2

公开(公告)日：2014-02-18

申请号：US11137367

申请日：2005-05-26

申请人： Hideo Fukuda ,  Yong Hoon Kim ,  Tadashi Ishii

发明人： Hideo Fukuda ,  Yong Hoon Kim ,  Tadashi Ishii

IPC分类号： B32B15/02 ,  H01B7/17

CPC分类号： H01B3/447 ,  C08L67/02 ,  C08L101/02 ,  H01B3/40 ,  H01B3/421 ,  H01B3/441 ,  Y10T428/2929 ,  Y10T428/2933 ,  Y10T428/294 ,  C08L2666/02

摘要： An insulated wire, which is coated, on a conductor, with a thin-film insulating layer composed of a resin dispersion, wherein the resin dispersion contains: a polyester-series resin (A) in a continuous phase; and a resin (B) having a functional group capable of reacting with the polyester-series resin, and, if necessary, an olefin-series resin (C), in a dispersed phase; and the resin dispersion.

摘要翻译： 一种绝缘线，其在导体上涂覆有由树脂分散体组成的薄膜绝缘层，其中所述树脂分散体包含：连续相中的聚酯系树脂（A）; 和具有能够与聚酯系树脂反应的官能团的树脂（B），以及必要时分散相的烯烃系树脂（C） 和树脂分散体。

公开(公告)号：US08587096B2

公开(公告)日：2013-11-19

申请号：US13172174

申请日：2011-06-29

申请人： Yong-hoon Kim ,  Hee-seok Lee ,  Jin-Ha Jeong ,  Ji-hyun Lee

发明人： Yong-hoon Kim ,  Hee-seok Lee ,  Jin-Ha Jeong ,  Ji-hyun Lee

IPC分类号： H01L23/552

CPC分类号： H01L23/552 ,  H01L21/561 ,  H01L23/3128 ,  H01L23/481 ,  H01L24/48 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/16 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06537 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H05K1/0233 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/0401 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Example embodiments relate to a semiconductor device. The semiconductor device may include a first semiconductor chip including a semiconductor substrate, a first through via that penetrates the semiconductor substrate, a second semiconductor chip stacked on one plane of the first semiconductor chip, and a shielding layer covering at least one portion of the first and/or second semiconductor chip and electrically connected to the first through via.

摘要翻译： 示例实施例涉及半导体器件。 半导体器件可以包括第一半导体芯片，其包括半导体衬底，穿透半导体衬底的第一通孔，堆叠在第一半导体芯片的一个平面上的第二半导体芯片，以及覆盖第一半导体衬底的至少一部分的屏蔽层 和/或第二半导体芯片，并且电连接到第一通孔。

公开(公告)号：US20130168871A1

公开(公告)日：2013-07-04

申请号：US13604301

申请日：2012-09-05

申请人： Yong-hoon KIM ,  Hyo-soon KANG ,  Jin-kyung KIM

发明人： Yong-hoon KIM ,  Hyo-soon KANG ,  Jin-kyung KIM

IPC分类号： H01L23/48

CPC分类号： H01L25/105 ,  H01L23/3128 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/92 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/0557 ,  H01L2224/06155 ,  H01L2224/06181 ,  H01L2224/1301 ,  H01L2224/13111 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/1403 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/17517 ,  H01L2224/2929 ,  H01L2224/29387 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45139 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/92125 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2225/06565 ,  H01L2225/06575 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/1431 ,  H01L2924/1433 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/14361 ,  H01L2924/1437 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/157 ,  H01L2924/15788 ,  H01L2924/1579 ,  H01L2924/18161 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2924/00

摘要： A semiconductor package of a package on package structure reducing an overall thickness of the package and simplifying design complexity of wiring paths is provided. The package includes a first package including a first substrate and a first semiconductor chip portion mounted thereon, a second package disposed on the first package and including a second substrate and a second semiconductor chip portion mounted thereon, and a connection member connecting the first and second substrates. The second semiconductor chip portion includes at least one semiconductor chip including a group of chip pads corresponding to one channel, and the group of chip pads is concentrated on a first edge of the semiconductor chip. An intellectual property core corresponding to the one channel is formed on an edge of the first semiconductor chip portion and the IP core corresponds to the edge on which the group of chip pads is concentrated.

摘要翻译： 提供了一种封装结构封装的半导体封装，减少了封装的整体厚度，并简化了布线路径的设计复杂性。 所述封装包括：第一封装，包括第一基板和安装在其上的第一半导体芯片部分;第二封装，设置在所述第一封装上，并且包括第二基板和安装在其上的第二半导体芯片部分;以及连接部件， 底物。 第二半导体芯片部分包括至少一个半导体芯片，其包括对应于一个通道的一组芯片焊盘，并且该组芯片焊盘集中在半导体芯片的第一边缘上。 对应于一个通道的知识产权核心形成在第一半导体芯片部分的边缘上，并且IP核心对应于芯片组集中的边缘。

公开(公告)号：US08351284B2

公开(公告)日：2013-01-08

申请号：US12981052

申请日：2010-12-29

申请人： Yong-Hoon Kim ,  Hyun-Woo Lee

发明人： Yong-Hoon Kim ,  Hyun-Woo Lee

IPC分类号： G11C7/00 ,  G11C8/00

CPC分类号： H03L7/08 ,  G11C7/22 ,  G11C7/222 ,  H03L7/0812

摘要： A delay locked loop includes a closed loop circuit configured to generate preliminary delay information, a control unit configured to update the preliminary delay information into delay information in response to a control signal, and a first delay unit configured to delay an input clock signal by a first delay value determined by the delay information and generate an output clock signal.

摘要翻译： 延迟锁定环包括被配置为产生初步延迟信息的闭环电路，被配置为响应于控制信号将初步延迟信息更新为延迟信息的控制单元和被配置为将输入时钟信号延迟一个 由延迟信息确定的第一延迟值，并产生输出时钟信号。

公开(公告)号：US08319538B2

公开(公告)日：2012-11-27

申请号：US12754313

申请日：2010-04-05

申请人： Yong-Hoon Kim ,  Hyun-Woo Lee

发明人： Yong-Hoon Kim ,  Hyun-Woo Lee

IPC分类号： H03H11/26

CPC分类号： H03K5/159 ,  H03K5/15

摘要： A semiconductor device including a common delay circuit configured to delay an input signal in response to a delay control code to output a first delayed input signal and a second delayed input signal; a first delay circuit configured to delay the first delayed input signal in response to the delay control code and to output a first output signal; and a second delay circuit configured to delay the second delayed input signal in response to the delay control code and to output a second output signal.

摘要翻译： 一种半导体器件，包括公共延迟电路，配置为响应于延迟控制代码来延迟输入信号以输出第一延迟输入信号和第二延迟输入信号; 第一延迟电路，被配置为响应于所述延迟控制码延迟所述第一延迟输入信号并输出​​第一输出信号; 以及第二延迟电路，被配置为响应于延迟控制代码来延迟第二延迟输入信号并输出​​第二输出信号。