公开(公告)号：US5097318A

公开(公告)日：1992-03-17

申请号：US331802

申请日：1989-04-03

申请人： Akira Tanaka ,  Kazuji Yamada ,  Hirokazu Inoue ,  Hideo Arakawa ,  Masahide Okamoto

发明人： Akira Tanaka ,  Kazuji Yamada ,  Hirokazu Inoue ,  Hideo Arakawa ,  Masahide Okamoto

IPC分类号： H01L23/538 ,  H01L23/04 ,  H01L23/057 ,  H01L23/12 ,  H01L23/467 ,  H01L23/498 ,  H01L23/50

CPC分类号： H01L23/49822 ,  H01L23/057 ,  H01L23/467 ,  H01L23/49838 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/01004 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/16152 ,  H01L2924/16195 ,  H01L2924/19041 ,  H01L2924/30107

摘要： A cavity-down type package for a semiconductor device comprises an insulating base substrate on which the semiconductor device and another insulating cap substrate with plural outer connection terminals on its outer surface and with electrodes provided on conductive layers for electric conduction on its inner surface. The electrodes on the insulating base substrate and those on the insulating cap substrate are connected with each other by using conductive material such as bumps.

摘要翻译： 一种用于半导体器件的降空型封装，包括其上安装有半导体器件（1）的绝缘基底（6）和在其外表面上具有多个外连接端子（5）的另一绝缘帽衬底（8） 其中电极（11）设置在导电层（4）上，用于在其内表面上导电。 绝缘基底基板上的电极和绝缘帽基板（8）上的电极通过诸如凸块的导电材料相互连接。

公开(公告)号：US5095359A

公开(公告)日：1992-03-10

申请号：US413622

申请日：1989-09-28

申请人： Akira Tanaka ,  Hirokazu Inoue ,  Kazuji Yamada ,  Kunio Miyazaki ,  Osamu Miura ,  Hideo Arakawa ,  Hiroshi Yokoyama ,  Yoshio Naganuma ,  Atsushi Morihara ,  Katsunori Ouchi

发明人： Akira Tanaka ,  Hirokazu Inoue ,  Kazuji Yamada ,  Kunio Miyazaki ,  Osamu Miura ,  Hideo Arakawa ,  Hiroshi Yokoyama ,  Yoshio Naganuma ,  Atsushi Morihara ,  Katsunori Ouchi

IPC分类号： G06F1/18 ,  H01L21/60 ,  H01L23/057 ,  H01L23/467 ,  H01L23/498 ,  H01L23/50 ,  H01L25/065

CPC分类号： H01L23/467 ,  H01L23/057 ,  H01L23/49822 ,  H01L23/50 ,  H01L24/32 ,  H01L25/0655 ,  H01L2224/16225 ,  H01L2224/32188 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48472 ,  H01L2224/49109 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2924/01004 ,  H01L2924/01019 ,  H01L2924/01025 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/15787 ,  H01L2924/16152 ,  H01L2924/16195 ,  H01L2924/19041 ,  H01L2924/30107

摘要： A semiconductor package for use in computers includes a insulating substrate onto which a semiconductor device is mounted, an insulating cap which shuts out outside air and seals said semiconductor device, power-source lines which provide power to the semiconductor device, and signal lines which transmit output signals from the semiconductor device to external circuits. The signal lines are arranged perpendicularly to the insulating substrate so that they are prevented from the dielectric constant of the insulating substrate, while the power-source lines are formed within the insulating substrate and connected through conductive layers parallel to the surface onto which the semiconductor is mounted to external leads.

公开(公告)号：US4908695A

公开(公告)日：1990-03-13

申请号：US178650

申请日：1988-04-07

申请人： Atsushi Morihara ,  Yoshio Naganuma ,  Shuntaro Koyama ,  Kazuji Yamada ,  Tasao Soga ,  Hideo Arakawa ,  Shunsuke Nogita ,  Yukio Hishinuma

发明人： Atsushi Morihara ,  Yoshio Naganuma ,  Shuntaro Koyama ,  Kazuji Yamada ,  Tasao Soga ,  Hideo Arakawa ,  Shunsuke Nogita ,  Yukio Hishinuma

IPC分类号： H01L23/36 ,  H01L23/433 ,  H01L23/473 ,  H05K7/20

CPC分类号： H01L23/4338 ,  H01L2224/16

摘要： A heat conducting member is placed in the space between a semiconductor chip which generates heat and a heat transfer block which is cooled by a coolant, and the heat conducting member conducts heat from the semiconductor chip to the heat transfer block. The heat conducting member has a slanted surface which is inclined with respect to a surface to be cooled of the corresponding semiconductor chip. Even when the semiconductor chip is displaced or inclined with respect to the heat transfer block, the whole of the cooling surface of the semiconductor chip can be kept in contact with the corresponding heat conducting member.

公开(公告)号：US5350886A

公开(公告)日：1994-09-27

申请号：US659672

申请日：1991-02-25

申请人： Kunio Miyazaki ,  Yutaka Sugita ,  Akio Mukoh ,  Tadahiko Miyoshi ,  Osamu Miura ,  Akio Takahashi ,  Shunichi Numata ,  Satoru Ogihara ,  Kazuji Yamada ,  Hirokazu Inoue ,  Fumiyuki Kobayashi

发明人： Kunio Miyazaki ,  Yutaka Sugita ,  Akio Mukoh ,  Tadahiko Miyoshi ,  Osamu Miura ,  Akio Takahashi ,  Shunichi Numata ,  Satoru Ogihara ,  Kazuji Yamada ,  Hirokazu Inoue ,  Fumiyuki Kobayashi

IPC分类号： H01L23/538 ,  H05K1/03 ,  H05K3/46 ,  H05K1/00

CPC分类号： H01L23/5385 ,  H05K3/462 ,  H05K3/4629 ,  H01L2924/0002 ,  H05K1/0306 ,  H05K2201/0379 ,  H05K2203/061

摘要： An LSI mounting substrate having a multilayered thin film wiring portion, with the thin film wiring portion being divided into wiring units each composed of a plurality of wiring layers, with the wirings between the units being electrically connected through connecting pads defined in the same surface as that of a surface conductive layer of the unit.

摘要翻译： 一种具有多层薄膜布线部分的LSI安装基板，薄膜布线部分被分成多个布线层的布线单元，各单元之间的布线通过与 该单元的表面导电层的那个。

公开(公告)号：US06353258B1

公开(公告)日：2002-03-05

申请号：US09603966

申请日：2000-06-26

申请人： Hirokazu Inoue ,  Ryuichi Saito ,  Mutsuhiro Mori ,  Yasutoshi Kurihara ,  Jin Onuki ,  Shin Kimura ,  Satoshi Shimada ,  Kazuhiro Suzuki ,  Yukio Kamita ,  Isao Kobayashi ,  Kazuji Yamada ,  Naohiro Momma

发明人： Hirokazu Inoue ,  Ryuichi Saito ,  Mutsuhiro Mori ,  Yasutoshi Kurihara ,  Jin Onuki ,  Shin Kimura ,  Satoshi Shimada ,  Kazuhiro Suzuki ,  Yukio Kamita ,  Isao Kobayashi ,  Kazuji Yamada ,  Naohiro Momma

IPC分类号： H01L2334

CPC分类号： H01L23/5386 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/072 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/48699 ,  H01L2224/48747 ,  H01L2224/49111 ,  H01L2224/49113 ,  H01L2224/73265 ,  H01L2224/85447 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01068 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15747 ,  H01L2924/16151 ,  H01L2924/16315 ,  H01L2924/181 ,  H01L2924/2076 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599

摘要： A semiconductor module has a plurality of power semiconductor devices mounted on a substrate, and a metal foil for wiring is mounted on the substrate so that an asymmetric unit arrangement of the semiconductor devices is formed. In the device, all of the units are arranged in the same direction on the substrate, and all of the units are electrically connected with electrode terminal feet, and the electrode terminal feet are electrically connected with linkage terminal foot. The electrode terminal feet are disposed with a certain interval.

摘要翻译： 半导体模块具有安装在基板上的多个功率半导体器件，并且用于布线的金属箔安装在基板上，从而形成半导体器件的不对称单元布置。 在该装置中，所有单元在基板上沿相同的方向排列，并且所有单元与电极端子脚电连接，并且电极端子脚与联动端子脚电连接。 电极端子脚以一定间隔设置。

公开(公告)号：US5177670A

公开(公告)日：1993-01-05

申请号：US832332

申请日：1992-02-07

申请人： Hiroichi Shinohara ,  Hirokazu Inoue ,  Yoichi Abe ,  Akira Kato ,  Hideo Suzuki ,  Kazuji Yamada ,  Masaaki Takahashi ,  Keiichirou Nakanishi

发明人： Hiroichi Shinohara ,  Hirokazu Inoue ,  Yoichi Abe ,  Akira Kato ,  Hideo Suzuki ,  Kazuji Yamada ,  Masaaki Takahashi ,  Keiichirou Nakanishi

IPC分类号： H01L23/36 ,  H01L23/467 ,  H01L23/48 ,  H01L23/498 ,  H01L23/64

CPC分类号： H01L24/73 ,  H01L23/36 ,  H01L23/467 ,  H01L23/481 ,  H01L23/49822 ,  H01L23/642 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73257 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01056 ,  H01L2924/0106 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/15787 ,  H01L2924/16152 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/3011 ,  Y10S257/924

摘要： Noise generated at high frequencies at the time of simultaneous switchings of logical circuits is reduced by lowering an inductance from LSI to a capacitor formed on a substrate. The capacitor is formed to ensure that an inductance from a bonding pad for the LSI loaded on the substrate to an electrode of the capacitor is 0.05 nanohenry. The lower inductance from the LSI to the capacitor allows a reduction in the amount of the noise at high frequencies among those generated in power supply system, whereby the rising time of signals is made shorter, and the speed of arithmetic operation can be increased.

摘要翻译： 通过降低从LSI到形成在基板上的电容器的电感，可以降低在同时切换逻辑电路时在高频时产生的噪声。 形成电容器以确保来自负载在基板上的LSI的焊盘与电容器的电极的电感为0.05纳秒。 从LSI到电容器的较低的电感允许在电源系统中产生的那些电路中的高频噪声量的减少，从而使信号的上升时间更短，并且可以提高算术运算速度。

公开(公告)号：US06452261B1

公开(公告)日：2002-09-17

申请号：US09380645

申请日：1999-09-07

申请人： Hironori Kodama ,  Masahiro Nagasu ,  Hirokazu Inoue ,  Yasuo Osone ,  Shigeta Ueda ,  Kazuji Yamada

发明人： Hironori Kodama ,  Masahiro Nagasu ,  Hirokazu Inoue ,  Yasuo Osone ,  Shigeta Ueda ,  Kazuji Yamada

IPC分类号： H01L2348

CPC分类号： H01L25/112 ,  H01L25/072 ,  H01L2924/0002 ,  H01L2924/00

摘要： Control electrode wirings which are led out from control electrodes over a number of chips built in a flat package and insulating members which are provided in order to insulate the control electrode wirings from main electrode wirings are also given function of positioning of the respective semiconductor chips in the flat package. Further, a one-piece control electrode wiring net is housed in the common electrodes of the package and the electrodes which are led out from the control electrodes of the respective semiconductor chips are connected to the net to simplify the processing of a large number of gate signal wirings.

摘要翻译： 从控制电极引出的内置在平坦封装中的多个芯片的控制电极布线以及为了使控制电极布线与主电极布线绝缘而设置的绝缘构件也具有将各个半导体芯片定位在 扁平包装。 此外，一体式控制电极布线网被容纳在封装的公共电极中，并且从各个半导体芯片的控制电极引出的电极连接到网以简化大量栅极的处理 信号线。

公开(公告)号：US4891831A

公开(公告)日：1990-01-02

申请号：US222615

申请日：1988-07-21

申请人： Akira Tanaka ,  Satoshi Shimada ,  Kazuji Yamada ,  Yusaku Nakagawa ,  Motohisa Nishihara ,  Tadahiko Miyoshi ,  Noboru Baba ,  Hiromi Kagohara ,  Ichiro Inamura

发明人： Akira Tanaka ,  Satoshi Shimada ,  Kazuji Yamada ,  Yusaku Nakagawa ,  Motohisa Nishihara ,  Tadahiko Miyoshi ,  Noboru Baba ,  Hiromi Kagohara ,  Ichiro Inamura

IPC分类号： H01J35/10

CPC分类号： H01J35/108 ,  H01J2235/084

摘要： A method for generating X-rays in an X-ray tube, comprises the steps of: rotating an X-ray target of a rotating anode, the X-ray target having a metal coated layer thereon; applying electron beams emitted from a cathode onto the metal coated layer of the X-ray target; and offsetting thermal deformation of the X-ray target due to the application of the electron beams by deformation of the X-ray target due to centrifugal force, thereby maintaining a position of the X-ray target in a direction of the application of the electron beams, at a room temperature of the X-ray target, thus generating the X-rays.

公开(公告)号：US5956231A

公开(公告)日：1999-09-21

申请号：US539075

申请日：1995-10-04

申请人： Kazuji Yamada ,  Akira Tanaka ,  Ryuichi Saito ,  Yasutoshi Kurihara ,  Tadao Kushima ,  Takashi Haramaki ,  Yoshihiko Koike ,  Takashi Hosokawa ,  Mamoru Sawahata ,  Masahiro Koizumi ,  Jin Onuki ,  Kazuhiro Suzuki ,  Isao Kobayashi ,  Hideo Shimizu ,  Yutaka Higashimura ,  Shigeki Sekine ,  Nobuya Koike ,  Hideya Kokubun

发明人： Kazuji Yamada ,  Akira Tanaka ,  Ryuichi Saito ,  Yasutoshi Kurihara ,  Tadao Kushima ,  Takashi Haramaki ,  Yoshihiko Koike ,  Takashi Hosokawa ,  Mamoru Sawahata ,  Masahiro Koizumi ,  Jin Onuki ,  Kazuhiro Suzuki ,  Isao Kobayashi ,  Hideo Shimizu ,  Yutaka Higashimura ,  Shigeki Sekine ,  Nobuya Koike ,  Hideya Kokubun

IPC分类号： H01L23/049 ,  H01L23/495 ,  H01L25/065 ,  H02M7/00 ,  H05K7/02 ,  H05K7/04

CPC分类号： H01L23/49562 ,  H01L23/049 ,  H01L24/49 ,  H01L25/0655 ,  H01L25/072 ,  H01L25/18 ,  H02M7/003 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/451 ,  H01L2224/48011 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/49111 ,  H01L2224/49171 ,  H01L2224/4943 ,  H01L2224/49431 ,  H01L2224/73265 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01025 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/2076 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3025 ,  H01L2924/351

摘要： A semiconductor device in which a plurality of semiconductor elements are bonded onto at least one electrode pattern on an insulator substrate formed a plurality of electrode patterns on the main surface, each of the electrodes of the semiconductor element being electrically connected to the electrode pattern, the other surface of the insulator substrate being bonded to a heat dissipating base, the upper surface of the heat dissipating base being covered with a member for cutting off the semiconductor elements from the outer environment, terminals electrically connecting the electrodes on said insulator substrate and the electrode placed outside the cutoff member being provided, wherein the material of the heat dissipating base has a linear expanding coefficient larger than the linear expansion coefficient of the semiconductor element and smaller than three times of the linear expansion coefficient of the semiconductor element, and a thermal conductivity larger than 100 W/mK, the semiconductor elements being arranged on at least one electrode surface and in at least two regions divided by the other electrode surface on the insulator substrate.

摘要翻译： 一种半导体器件，其中多个半导体元件被结合到绝缘体衬底上的至少一个电极图案上，所述绝缘体衬底在主表面上形成多个电极图案，所述半导体元件的每个电极电连接到所述电极图案， 绝缘体基板的另一表面被结合到散热基底上，散热基座的上表面覆盖有用于从外部环境切断半导体元件的构件，将绝缘体基板上的电极与电极电连接的端子 设置在切断部件外侧，散热基体的材料的线膨胀系数大于半导体元件的线膨胀系数，小于半导体元件的线膨胀系数的3倍，导热系数 大于100 W / mK，半音 电感元件布置在至少一个电极表面上，并且在至少两个区域中被绝缘体基底上的另一个电极表面分隔。

公开(公告)号：US07141741B2

公开(公告)日：2006-11-28

申请号：US10665523

申请日：2003-09-22

申请人： Kazuji Yamada ,  Akira Tanaka ,  Ryuichi Saito ,  Yasutoshi Kurihara ,  Tadao Kushima ,  Takashi Haramaki ,  Yoshihiko Koike ,  Takashi Hosokawa ,  Mamoru Sawahata ,  Masahiro Koizumi ,  Jin Onuki ,  Kazuhiro Suzuki ,  Isao Kobayashi ,  Hideo Shimizu ,  Yutaka Higashimura ,  Shigeki Sekine ,  Nobuya Koike ,  Hideya Kokubun

发明人： Kazuji Yamada ,  Akira Tanaka ,  Ryuichi Saito ,  Yasutoshi Kurihara ,  Tadao Kushima ,  Takashi Haramaki ,  Yoshihiko Koike ,  Takashi Hosokawa ,  Mamoru Sawahata ,  Masahiro Koizumi ,  Jin Onuki ,  Kazuhiro Suzuki ,  Isao Kobayashi ,  Hideo Shimizu ,  Yutaka Higashimura ,  Shigeki Sekine ,  Nobuya Koike ,  Hideya Kokubun

IPC分类号： H05K1/03

CPC分类号： H01L23/49562 ,  H01L23/049 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0655 ,  H01L25/072 ,  H01L25/18 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/451 ,  H01L2224/48011 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/49111 ,  H01L2224/49171 ,  H01L2224/49431 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01039 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/2076 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3025 ,  H01L2924/351 ,  H02M7/003 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599

摘要： A semiconductor device in which electrodes of a plurality of semiconductor elements are bonded onto at least one of a plurality of electrode patterns on an insulator substrate, the other surface of the insulator substrate being bonded to a heat dissipating base. The upper surface of the heat dissipating base is covered with a member for cutting off the semiconductor elements from the outer environment. Terminals electrically connect the electrodes on said insulator substrate and the electrode placed outside the cutoff member. The material of the heat dissipating base has a linear expanding coefficient larger than that of the semiconductor element and smaller than three times that of the semiconductor element, and a thermal conductivity larger than 100 W/mK. The semiconductor elements are arranged on at least one electrode surface and in at least two regions divided by the other electrode surface on the insulator substrate.

摘要翻译： 一种半导体器件，其中多个半导体元件的电极被结合到绝缘体基板上的多个电极图案中的至少一个上，绝缘体基板的另一个表面被结合到散热基底。 散热基座的上表面覆盖有用于从外部环境切断半导体元件的构件。 端子电连接所述绝缘体基板上的电极和放置在切断构件外部的电极。 散热基体的材料的线膨胀系数大于半导体元件的线膨胀系数，小于半导体元件的三倍，热导率大于100W / mK。 半导体元件布置在绝缘体基板上的至少一个电极表面和由另一个电极表面划分的至少两个区域中。