公开(公告)号：US06274822B1

公开(公告)日：2001-08-14

申请号：US09110001

申请日：1998-07-02

申请人： David Light ,  Belgacem Haba ,  Thomas H. Distefano ,  Konstantine Karavakis

发明人： David Light ,  Belgacem Haba ,  Thomas H. Distefano ,  Konstantine Karavakis

IPC分类号： H05K330

CPC分类号： H01L23/4985 ,  H01L21/4846 ,  H01L2924/0002 ,  H05K1/0293 ,  H05K3/4092 ,  H01L2924/00

摘要： A semiconductor chip connection component having numerous leads extending side-by-side across a gap in a support structure, each lead having a frangible section to permit detachment of one end of the lead from the support structure in a bonding process. The frangible sections are formed by treating the lead-forming material in an elongated treatment zone extending across the regions occupied by numerous leads to provide a step defining a fracture point of the lead during a wire bonding process.

摘要翻译： 一种半导体芯片连接部件，其具有多个引线，跨越支撑结构中的间隙并排延伸，每个引线具有易碎部分，以允许引线的一端在接合过程中从支撑结构脱离。 通过在延伸的处理区域中处理引线形成材料来形成脆性部分，该处理区域延伸穿过由许多引线占据的区域，以提供在引线接合过程期间限定引线的断裂点的步骤。

公开(公告)号：US5776796A

公开(公告)日：1998-07-07

申请号：US726697

申请日：1996-10-07

申请人： Thomas H. Distefano ,  John W. Smith ,  Joseph Fjelstad ,  Craig S. Mitchell ,  Konstantine Karavakis

发明人： Thomas H. Distefano ,  John W. Smith ,  Joseph Fjelstad ,  Craig S. Mitchell ,  Konstantine Karavakis

IPC分类号： H01L21/56 ,  H01L21/68 ,  H01L23/24 ,  H01L23/31 ,  H01L23/495 ,  H01L21/44

CPC分类号： H01L21/568 ,  H01L21/56 ,  H01L21/565 ,  H01L21/6835 ,  H01L23/24 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/49572 ,  H01L24/32 ,  H01L24/50 ,  H01L24/97 ,  H01L2224/11003 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2224/97 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01058 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/12042

摘要： A method of encapsulating a semiconductor device. The encapsulation method includes a semiconductor chip package assembly having a spacer layer between a top surface of a sheet-like substrate and a contact bearing surface of a semiconductor chip, wherein the substrate has conductive leads thereon, the leads being electrically connected to terminals on a first end and bonded to respective chip contacts on a second end. Typically, the spacer layer is comprised of a compliant or elastomeric material. A protective layer is attached on a bottom surface of the substrate so as to cover the terminals on the substrate. A flowable, curable encapsulant material is deposited around a periphery of the semiconductor chip after the attachment of the protective layer so as to encapsulate the leads. The encapsulant material is then cured. Typically, this encapsulation method is performed on a plurality of chip assemblies simultaneously.

摘要翻译： 一种封装半导体器件的方法。 封装方法包括：半导体芯片封装组件，其具有在片状基板的顶表面和半导体芯片的接触支承表面之间的间隔层，其中，所述基板在其上具有导电引线，所述引线电连接到 第一端并且在第二端上结合到各个芯片触点。 通常，间隔层由顺应性或弹性体材料构成。 保护层附着在基板的底面，以覆盖基板上的端子。 在安装保护层以便封装引线之后，可流动的可固化的密封剂材料围绕半导体芯片的周边沉积。 然后固化密封材料。 通常，这种封装方法同时在多个芯片组件上执行。

公开(公告)号：US5663106A

公开(公告)日：1997-09-02

申请号：US246113

申请日：1994-05-19

申请人： Konstantine Karavakis ,  Thomas H. Distefano ,  John W. Smith, Jr. ,  Craig Mitchell

发明人： Konstantine Karavakis ,  Thomas H. Distefano ,  John W. Smith, Jr. ,  Craig Mitchell

IPC分类号： H01L21/56 ,  H01L21/68 ,  H01L23/24 ,  H01L23/31 ,  H01L21/60

CPC分类号： H01L21/568 ,  H01L21/56 ,  H01L21/6835 ,  H01L23/24 ,  H01L23/3114 ,  H01L24/97 ,  H01L2224/11003 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/3025 ,  Y10T29/49146

摘要： A method of packaging a semiconductor chip assembly includes the encapsulation of the same after establishing an encapsulation area and providing a physical barrier for protecting the terminals of a chip carrier. An alternative or supplement to providing a physical barrier is to provide a preform of an encapsulation material which includes a predetermined volume of such material so that only the encapsulation area is filled. For a semiconductor chip assembly which does not yet have an elastomeric layer, a method of simultaneously forming such an elastomeric layer and encapsulating a semiconductor chip assembly is also provided.

摘要翻译： 封装半导体芯片组件的方法包括在建立封装区域之后对其进行封装，并提供用于保护芯片载体的端子的物理屏障。 提供物理屏障的替代或补充是提供包含材料的预成型件，其包括预定体积的这种材料，使得仅填充封装区域。 对于还没有弹性体层的半导体芯片组件，还提供了同时形成这种弹性体层并封装半导体芯片组件的方法。

公开(公告)号：US5929517A

公开(公告)日：1999-07-27

申请号：US365749

申请日：1994-12-29

申请人： Thomas H. Distefano ,  Konstantine Karavakis ,  Craig Mitchell ,  John W. Smith

发明人： Thomas H. Distefano ,  Konstantine Karavakis ,  Craig Mitchell ,  John W. Smith

IPC分类号： H01L21/56 ,  H01L23/31 ,  H01L23/04 ,  H05K13/04

CPC分类号： H01L24/50 ,  H01L21/565 ,  H01L23/3121 ,  H01L2224/50 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  Y10T29/49146

摘要： Semiconductor chip packages and methods of fabricating the same. The package includes a thermally conductive protective structure having an indentation open to a front side and a flange surface at least partially surrounding the indentation and facing to the front of the structure. A chip is disposed in the indentation so that the front surface of the chip, with contacts thereon, faces toward the front of the structure. A flexible dielectric film having terminals thereon is placed on the flange surface, and a compliant material is disposed between the film and the flange surface. The terminals on the film are connected to the contacts on the chip. The individual terminals on the film are movable with respect to the protective structure, which facilitates mounting and compensation for thermal expansion.

摘要翻译： 半导体芯片封装及其制造方法。 该封装包括导热保护结构，其具有向前侧开口的凹口和至少部分地围绕凹口并面向结构前部的凸缘表面。 芯片设置在凹陷中，使得具有触点的芯片的前表面朝向结构的前部。 其上具有端子的柔性电介质膜放置在凸缘表面上，并且柔性材料设置在膜和凸缘表面之间。 胶片上的端子连接到芯片上的触点。 胶片上的各个端子相对于保护结构是可移动的，这有助于热膨胀的安装和补偿。

公开(公告)号：US5966592A

公开(公告)日：1999-10-12

申请号：US560272

申请日：1995-11-21

申请人： Masud Beroz ,  Konstantine Karavakis ,  Thomas H. Distefano

发明人： Masud Beroz ,  Konstantine Karavakis ,  Thomas H. Distefano

IPC分类号： H01L21/48 ,  H01L23/495 ,  H01L21/44

CPC分类号： H01L21/4821 ,  H01L23/49579 ,  H01L24/50 ,  H01L2924/12042 ,  H01L2924/351

摘要： A method of treating a lead in a chip package. A conductive lead is positioned such that it extends across a gap in a dielectric substrate and is secured at either end to a first surface of the substrate. Directed energy is then applied to a desired portion of the surface of the lead within the gap. As a result of the application of energy, a surface layer of the lead is recrystallized thereby creating a fine grain, dense surface layer of lead material. Surface contaminates may be vaporized and contaminants at the grain boundaries of the recrystallized surface layers may be driven away from the grain boundaries such that a treated lead is more ductile and has better resistance to thermal cycling after the lead has been attached to a chip contact.

摘要翻译： 一种处理芯片封装中的引线的方法。 导电引线定位成使得其延伸穿过电介质基板中的间隙，并且在任一端固定到基板的第一表面。 然后将定向能量施加到间隙内的引线表面的期望部分。 作为施加能量的结果，铅的表面层被再结晶，从而形成细晶粒，致密的铅材料表面层。 表面污染物可能被蒸发，并且再结晶表面层的晶界处的污染物可能被驱离离开晶界，使得处理的引线更具延展性，并且在引线已经附着到芯片接触之后具有更好的耐热循环性。

公开(公告)号：US5706174A

公开(公告)日：1998-01-06

申请号：US812202

申请日：1997-03-06

申请人： Thomas H. Distefano ,  John W. Smith ,  Zlata Kovac ,  Konstantine Karavakis

发明人： Thomas H. Distefano ,  John W. Smith ,  Zlata Kovac ,  Konstantine Karavakis

IPC分类号： H01L21/48 ,  H01L21/56 ,  H01L21/60 ,  H01L23/22 ,  H01L23/48 ,  H01L23/498 ,  H01L23/64 ,  H05K1/11 ,  H05K3/36 ,  H05K3/40

CPC分类号： H01L24/81 ,  H01L21/4839 ,  H01L21/563 ,  H01L23/22 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/4985 ,  H01L23/642 ,  H01L24/72 ,  H05K3/4084 ,  H01L2224/73203 ,  H01L2224/81801 ,  H01L2224/83136 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/3025 ,  H05K1/118 ,  H05K2201/0133 ,  H05K2201/0394 ,  H05K2201/0397 ,  H05K2201/09081 ,  H05K2201/091 ,  H05K2203/063 ,  H05K3/361 ,  Y10T29/49124 ,  Y10T29/49144 ,  Y10T29/49149

摘要： A compliant microelectronic mounting device. An area array of conductive contact pads are connected into rows by conductive leads on a first side of a flexible substrate. Each of the conductive leads bridges a bonding hole in the substrate which is situated between successive contact pads. Each of the conductive leads further has a frangible portion within or near each bonding hole. A plurality of compliant dielectric buttons, typically composed of an elastomer material, are attached to a second side of the substrate and typically positioned under each contact pad. The component may be attached to a microelectronic device having contacts so that a stand-off is created between the substrate and the device by the compliant dielectric buttons. The frangible portions allow the leads to be cleanly broken, bent and secured into electrical contact with opposed contact pads on the microelectronic device. Each of these connections may be supported by a compliant layer, typically an uncured elastomer which fills the area around the dielectric pads and is then cured.

摘要翻译： 符合微电子的安装装置。 导电接触焊盘的区域阵列通过柔性基板的第一侧上的导电引线连接成行。 每个导电引线桥接位于连续接触焊盘之间的衬底中的结合孔。 每个导电引线还在每个结合孔内或附近还具有易碎部分。 通常由弹性体材料组成的多个柔性介质按钮被附接到基板的第二侧并且通常位于每个接触垫下方。 该部件可以附接到具有触点的微电子器件，使得通过柔性介质按钮在基板和器件之间产生间隔。 易碎部分允许引线被干净地折断，弯曲并固定成与微电子器件上的相对接触焊盘电接触。 这些连接中的每一个可以由柔性层（通常是填充介电垫周围区域的未固化的弹性体）支撑，然后固化。

公开(公告)号：US06196042B1

公开(公告)日：2001-03-06

申请号：US09281643

申请日：1999-03-31

申请人： Thomas H. Distefano ,  Joseph Fjelstad ,  Belgacem Haba

发明人： Thomas H. Distefano ,  Joseph Fjelstad ,  Belgacem Haba

IPC分类号： B21D2810

CPC分类号： H01L21/4842 ,  Y10T29/49121

摘要： A tool having a coining projection is operative for forming a frangible portion in a lead of a microelectronic connection component by application of a compressive force. The coining projection is supported on a pedestal formed from a tool body. In an alternative embodiment, the pedestal is formed on a backing plate for use in circuits up construction. The pedestal is sized and shaped so as to be received within a gap formed in a support layer for the leads. By application of the compressive force, the coining projection will penetrate the lead within the region of the gap to form the frangible portion.

摘要翻译： 具有压印突起的工具用于通过施加压缩力来形成微电子连接部件的引线中的易碎部分。 压印突起支撑在由工具主体形成的基座上。 在替代实施例中，基座形成在背板上用于回路结构。 基座的尺寸和形状被设计成容纳在形成在引线的支撑层中的间隙内。 通过施加压缩力，压印突起将在间隙的区域内穿透引线，以形成易碎部分。

公开(公告)号：US06191473B1

公开(公告)日：2001-02-20

申请号：US09315252

申请日：1999-05-20

申请人： Thomas H. Distefano

发明人： Thomas H. Distefano

IPC分类号： H01L2352

CPC分类号： H01L24/50 ,  H01L23/49572 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/00

摘要： A connection component for a semiconductor chip includes a support structure having a top surface including a dielectric material and a bottom surface. The support structure includes a central portion, a peripheral portion and one or more gaps extending substantially between the central portion and the peripheral portion. A bus overlies the top surface of the support structure. The each bus has an outer edge which overlies the peripheral portion of the support structure and an inner edge which overlies the one or more gaps. The support structure also includes one or more electrically conductive leads having first ends secured to the central portion and second ends overlying the gaps and being secured to the inner edge of the bus. The second ends of the leads are displaceable relative to the bus in response to bonding forces being applied to the leads for engaging contacts on a semiconductor chip.

摘要翻译： 用于半导体芯片的连接部件包括具有包括电介质材料和底面的顶表面的支撑结构。 支撑结构包括中心部分，周边部分和基本上在中心部分和周边部分之间延伸的一个或多个间隙。 公共汽车覆盖在支撑结构的顶面上。 每个总线具有覆盖支撑结构的周边部分的外边缘和覆盖在一个或多个间隙上的内边缘。 支撑结构还包括一个或多个导电引线，其具有固定到中心部分的第一端和覆盖间隙的第二端并固定到总线的内边缘。 引线的第二端可以响应于施加到引线上的接合力而相对于母线移位，以接合半导体芯片上的触点。

公开(公告)号：US6133639A

公开(公告)日：2000-10-17

申请号：US842313

申请日：1997-04-24

申请人： Zlata Kovac ,  Craig Mitchell ,  Thomas H. Distefano ,  John W. Smith

发明人： Zlata Kovac ,  Craig Mitchell ,  Thomas H. Distefano ,  John W. Smith

IPC分类号： H01L23/12 ,  H01L21/56 ,  H01L21/60 ,  H01L23/28 ,  H01L23/48 ,  H01L23/498 ,  H05K1/11 ,  H05K3/36 ,  H05K3/40 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/81 ,  H01L21/56 ,  H01L21/563 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/4985 ,  H01L24/72 ,  H01L24/75 ,  H05K3/4084 ,  H01L2224/16 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/75 ,  H01L2224/75301 ,  H01L2224/81801 ,  H01L2224/83136 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/16152 ,  H01L2924/19041 ,  H01L2924/19043 ,  H05K1/118 ,  H05K2201/0133 ,  H05K2201/0394 ,  H05K2201/0397 ,  H05K2201/09081 ,  H05K2201/091 ,  H05K2203/063 ,  H05K3/361 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49174

摘要： A method and an apparatus for providing a planar and compliant interface between a semiconductor chip and its supporting substrate to accommodate for the thermal coefficient of expansion mismatch therebetween. The complaint interface is comprised of a plurality of compliant pads defining channels between adjacent pads. The pads are typically compressed between a flexible film chip carrier and the chip. A compliant filler is further disposed within the channels to form a uniform encapsulation layer having a controlled thickness.

摘要翻译： 一种用于在半导体芯片和其支撑衬底之间提供平面和兼容接口以适应其间的热膨胀失配的方法和装置。 投诉界面由在相邻的焊盘之间限定通道的多个柔性焊盘构成。 垫通常在柔性膜芯片载体和芯片之间被压缩。 在通道内进一步布置柔顺填料以形成具有受控厚度的均匀包封层。

公开(公告)号：US5852326A

公开(公告)日：1998-12-22

申请号：US110527

申请日：1998-07-06

申请人： Igor Y. Khandros ,  Thomas H. Distefano

发明人： Igor Y. Khandros ,  Thomas H. Distefano

IPC分类号： H01L21/60 ,  H01L21/822 ,  H01L21/98 ,  H01L23/13 ,  H01L23/31 ,  H01L23/485 ,  H01L23/498 ,  H01L23/58 ,  H01L25/065 ,  H01L25/16 ,  H01L23/48 ,  H01L23/52

CPC分类号： H01L21/6836 ,  H01L21/822 ,  H01L22/32 ,  H01L23/13 ,  H01L23/3107 ,  H01L23/3164 ,  H01L23/485 ,  H01L23/49805 ,  H01L23/49827 ,  H01L23/4985 ,  H01L23/49861 ,  H01L24/27 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/16 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2224/16145 ,  H01L2224/274 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/4911 ,  H01L2224/73265 ,  H01L2224/81801 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06579 ,  H01L2225/06596 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/351

摘要： A semiconductor assembly having contacts on a peripheral region of the top surface of a chip and a backing element overlying the bottom surface of the chip. The backing element has terminals such that at least some of the terminals overlie the bottom surface of the chip. Leads including bonding wires extending alongside the edges of the chip connect the contacts and the terminals. The terminals of the assembly are movable with respect to the chip.

摘要翻译： 一种半导体组件，其在芯片顶表面的周边区域和覆盖芯片底表面的背衬元件上具有触点。 背衬元件具有端子，使得端子中的至少一些覆盖在芯片的底表面上。 包括沿芯片边缘延伸的接合线的引线连接触点和端子。 组件的端子可相对于芯片移动。