公开(公告)号：US20120074594A1

公开(公告)日：2012-03-29

申请号：US13075921

申请日：2011-03-30

申请人： Hisakazu MARUTANI ,  Yasunari Iwami ,  Tomoshige Chikai ,  Tomoko Takahashi ,  Osamu Yamagata ,  Shingo Mitsugi ,  Chunghao Chen

发明人： Hisakazu MARUTANI ,  Yasunari Iwami ,  Tomoshige Chikai ,  Tomoko Takahashi ,  Osamu Yamagata ,  Shingo Mitsugi ,  Chunghao Chen

IPC分类号： H01L23/48 ,  H01L21/78 ,  H01L21/50

CPC分类号： H01L23/3128 ,  H01L21/561 ,  H01L23/16 ,  H01L23/5389 ,  H01L23/562 ,  H01L24/04 ,  H01L24/13 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/82 ,  H01L24/97 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/21 ,  H01L2224/2101 ,  H01L2224/215 ,  H01L2224/22 ,  H01L2224/221 ,  H01L2224/24011 ,  H01L2224/24146 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/76155 ,  H01L2224/82101 ,  H01L2224/82102 ,  H01L2224/92244 ,  H01L2225/06524 ,  H01L2225/06548 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/014 ,  H01L2924/351 ,  H01L2924/00

摘要： A semiconductor device comprising a support plate, a semiconductor element mounted on the support plate and including a circuit element surface having a plurality of first electrodes, a first insulation layer covering the circuit element surface of the semiconductor element, and including a plurality of first apertures exposing the plurality of first electrodes, a second insulation layer covering an upper part of the support plate and side parts of the semiconductor element, and wirings formed on an upper part of the first insulation layer and on an upper part of the second insulation layer, and electrically connected to the corresponding first electrodes.

摘要翻译： 一种半导体器件，包括支撑板，安装在支撑板上并包括具有多个第一电极的电路元件表面的半导体元件，覆盖半导体元件的电路元件表面的第一绝缘层，并且包括多个第一孔 暴露多个第一电极，覆盖支撑板的上部和半导体元件的侧部的第二绝缘层以及形成在第一绝缘层的上部和第二绝缘层的上部上的布线， 并电连接到相应的第一电极。

公开(公告)号：US08786110B2

公开(公告)日：2014-07-22

申请号：US13075921

申请日：2011-03-30

申请人： Hisakazu Marutani ,  Yasunari Iwami ,  Tomoshige Chikai ,  Tomoko Takahashi ,  Osamu Yamagata ,  Shingo Mitsugi ,  Chunghao Chen

发明人： Hisakazu Marutani ,  Yasunari Iwami ,  Tomoshige Chikai ,  Tomoko Takahashi ,  Osamu Yamagata ,  Shingo Mitsugi ,  Chunghao Chen

IPC分类号： H01L23/48 ,  H01L23/02

CPC分类号： H01L23/3128 ,  H01L21/561 ,  H01L23/16 ,  H01L23/5389 ,  H01L23/562 ,  H01L24/04 ,  H01L24/13 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/82 ,  H01L24/97 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/21 ,  H01L2224/2101 ,  H01L2224/215 ,  H01L2224/22 ,  H01L2224/221 ,  H01L2224/24011 ,  H01L2224/24146 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/76155 ,  H01L2224/82101 ,  H01L2224/82102 ,  H01L2224/92244 ,  H01L2225/06524 ,  H01L2225/06548 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/014 ,  H01L2924/351 ,  H01L2924/00

摘要： A semiconductor device comprising a support plate, a semiconductor element mounted on the support plate and including a circuit element surface having a plurality of first electrodes, a first insulation layer covering the circuit element surface of the semiconductor element, and including a plurality of first apertures exposing the plurality of first electrodes, a second insulation layer covering an upper part of the support plate and side parts of the semiconductor element, and wirings formed on an upper part of the first insulation layer and on an upper part of the second insulation layer, and electrically connected to the corresponding first electrodes.

摘要翻译： 一种半导体器件，包括支撑板，安装在支撑板上并包括具有多个第一电极的电路元件表面的半导体元件，覆盖半导体元件的电路元件表面的第一绝缘层，并且包括多个第一孔 暴露多个第一电极，覆盖支撑板的上部和半导体元件的侧部的第二绝缘层以及形成在第一绝缘层的上部和第二绝缘层的上部上的布线， 并电连接到相应的第一电极。

公开(公告)号：US20130200523A1

公开(公告)日：2013-08-08

申请号：US13616549

申请日：2012-09-14

申请人： Shigenori SAWACHI ,  Osamu Yamagata ,  Hiroshi Inoue ,  Satoru Itakura ,  Tomoshige Chikai ,  Masahiko Hori ,  Akio Katsumata

发明人： Shigenori SAWACHI ,  Osamu Yamagata ,  Hiroshi Inoue ,  Satoru Itakura ,  Tomoshige Chikai ,  Masahiko Hori ,  Akio Katsumata

IPC分类号： H01L23/48 ,  H01L21/50

CPC分类号： H01L25/0657 ,  H01L23/49816 ,  H01L23/5384 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L24/97 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/06135 ,  H01L2224/12105 ,  H01L2224/24226 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/82031 ,  H01L2224/82039 ,  H01L2224/92244 ,  H01L2225/06524 ,  H01L2225/06548 ,  H01L2225/06562 ,  H01L2225/06586 ,  H01L2225/06589 ,  H01L2225/1023 ,  H01L2225/1029 ,  H01L2225/1035 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/15311 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor device containing: a semiconductor element; a support substrate; an insulating material layer for sealing the semiconductor element and a periphery thereof; a metal thin film wiring layer provided in the insulating material layer, with a part thereof being exposed on an external surface; and metal vias provided in the insulating material layer and electrically connected to the metal thin film wiring layer. The semiconductor element is provided in a plurality of units and the respective semiconductor elements are stacked via an insulating material such that a circuit surface of each semiconductor element faces the metal thin film wiring layer, and electrode pads of each semiconductor element are exposed without being hidden by the semiconductor element stacked thereabove.

摘要翻译： 一种半导体器件，包括：半导体元件; 支撑基板; 用于密封半导体元件的绝缘材料层及其周边; 设置在所述绝缘材料层中的金属薄膜布线层，其一部分露出在外表面上; 以及设置在绝缘材料层中并电连接到金属薄膜布线层的金属通孔。 半导体元件设置在多个单元中，并且各个半导体元件经由绝缘材料层叠，使得每个半导体元件的电路表面面对金属薄膜布线层，并且每个半导体元件的电极焊盘暴露而不被隐藏 通过堆叠在其上的半导体元件。

公开(公告)号：US08872350B2

公开(公告)日：2014-10-28

申请号：US13616549

申请日：2012-09-14

申请人： Shigenori Sawachi ,  Osamu Yamagata ,  Hiroshi Inoue ,  Satoru Itakura ,  Tomoshige Chikai ,  Masahiko Hori ,  Akio Katsumata

发明人： Shigenori Sawachi ,  Osamu Yamagata ,  Hiroshi Inoue ,  Satoru Itakura ,  Tomoshige Chikai ,  Masahiko Hori ,  Akio Katsumata

IPC分类号： H01L23/48 ,  H01L23/495 ,  H01L23/02 ,  H01L23/52

CPC分类号： H01L25/0657 ,  H01L23/49816 ,  H01L23/5384 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L24/97 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/06135 ,  H01L2224/12105 ,  H01L2224/24226 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/82031 ,  H01L2224/82039 ,  H01L2224/92244 ,  H01L2225/06524 ,  H01L2225/06548 ,  H01L2225/06562 ,  H01L2225/06586 ,  H01L2225/06589 ,  H01L2225/1023 ,  H01L2225/1029 ,  H01L2225/1035 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/15311 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor device containing: a semiconductor element; a support substrate; an insulating material layer for sealing the semiconductor element and a periphery thereof; a metal thin film wiring layer provided in the insulating material layer, with a part thereof being exposed on an external surface; and metal vias provided in the insulating material layer and electrically connected to the metal thin film wiring layer. The semiconductor element is provided in a plurality of units and the respective semiconductor elements are stacked via an insulating material such that a circuit surface of each semiconductor element faces the metal thin film wiring layer, and electrode pads of each semiconductor element are exposed without being hidden by the semiconductor element stacked thereabove.

摘要翻译： 一种半导体器件，包括：半导体元件; 支撑基板; 用于密封半导体元件的绝缘材料层及其周边; 设置在所述绝缘材料层中的金属薄膜布线层，其一部分露出在外表面上; 以及设置在绝缘材料层中并电连接到金属薄膜布线层的金属通孔。 半导体元件设置在多个单元中，并且各个半导体元件经由绝缘材料层叠，使得每个半导体元件的电路表面面对金属薄膜布线层，并且每个半导体元件的电极焊盘暴露而不被隐藏 通过堆叠在其上的半导体元件。

公开(公告)号：US07462511B2

公开(公告)日：2008-12-09

申请号：US11330155

申请日：2006-01-12

申请人： Osamu Yamagata

发明人： Osamu Yamagata

IPC分类号： H01L21/44 ,  H01L21/48

CPC分类号： H01L24/10 ,  H01L23/3114 ,  H01L23/5283 ,  H01L23/562 ,  H01L24/13 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05023 ,  H01L2224/05024 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05647 ,  H01L2224/13 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/94 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01021 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2224/13099 ,  H01L2224/11 ,  H01L2924/00 ,  H01L2924/00014

摘要： A SiP type semiconductor device and a method of producing the same is provided wherein curvature of a wafer is suppressed in the production steps, workability does not decline, and high throughput can be attained. An insulation layer is formed by stacking a plurality of resin layers on a semiconductor substrate, wiring layers are formed by being buried in the insulation layer so as to be connected to an electronic circuit, an insulating buffer layer is formed on the insulation layer, a conductive post is formed through the buffer layer and connected to the wiring layer, and a projecting electrode is formed projecting from a surface of the buffer layer and connected to the conductive post.

摘要翻译： 提供了一种SiP型半导体器件及其制造方法，其在制造步骤中抑制晶片的曲率，可加工性不下降，并且可以实现高生产率。 通过在半导体衬底上堆叠多个树脂层形成绝缘层，通过埋在绝缘层中形成布线层，以连接到电子电路，在绝缘层上形成绝缘缓冲层， 导电柱通过缓冲层形成并连接到布线层，并且突出电极形成为从缓冲层的表面突出并连接到导电柱。

公开(公告)号：US20070246165A1

公开(公告)日：2007-10-25

申请号：US11589130

申请日：2006-10-30

申请人： Osamu Yamagata

发明人： Osamu Yamagata

IPC分类号： G03D15/04

CPC分类号： H01L24/27 ,  H01L21/67132 ,  H01L24/29 ,  H01L24/83 ,  H01L2224/2919 ,  H01L2224/83101 ,  H01L2224/83191 ,  H01L2224/8385 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/00

摘要： A method of producing a semiconductor package enabling a sheet-like adhesive film to be used as it is and thereby reducing loss and enabling mounting without the piece of adhesive film sticking out from the semiconductor chip, comprising forming cutting-off notches in an adhesive film provided on a support film from the adhesive film side down to the surface of the support film or a depth D in the middle and cutting the adhesive film to pieces of predetermined size, then stretching the support film to separate the cut individual piece of the adhesive film, attaching semiconductor chip to the cut individual piece of the adhesive film, and mounting the semiconductor chip on a substrate by the piece of adhesive film, and an apparatus for producing a semiconductor package and adhesive film for use with that method.

公开(公告)号：US20060118959A1

公开(公告)日：2006-06-08

申请号：US11330155

申请日：2006-01-12

申请人： Osamu Yamagata

发明人： Osamu Yamagata

IPC分类号： H01L23/52

CPC分类号： H01L24/10 ,  H01L23/3114 ,  H01L23/5283 ,  H01L23/562 ,  H01L24/13 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05023 ,  H01L2224/05024 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05647 ,  H01L2224/13 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/94 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01021 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2224/13099 ,  H01L2224/11 ,  H01L2924/00 ,  H01L2924/00014

摘要： A SiP type semiconductor device and a method of producing the same is provided wherein curvature of a wafer is suppressed in the production steps, workability does not decline, and high throughput can be attained. An insulation layer is formed by stacking a plurality of resin layers on a semiconductor substrate, wiring layers are formed by being buried in the insulation layer so as to be connected to an electronic circuit, an insulating buffer layer is formed on the insulation layer, a conductive post is formed through the buffer layer and connected to the wiring layer, and a projecting electrode is formed projecting from a surface of the buffer layer and connected to the conductive post.

摘要翻译： 提供了一种SiP型半导体器件及其制造方法，其在制造步骤中抑制晶片的曲率，可加工性不下降，并且可以实现高生产率。 通过在半导体衬底上堆叠多个树脂层形成绝缘层，通过埋在绝缘层中形成布线层，以连接到电子电路，在绝缘层上形成绝缘缓冲层， 导电柱通过缓冲层形成并连接到布线层，并且突出电极形成为从缓冲层的表面突出并连接到导电柱。

公开(公告)号：US20050093095A1

公开(公告)日：2005-05-05

申请号：US10998651

申请日：2004-11-30

申请人： Osamu Yamagata

发明人： Osamu Yamagata

IPC分类号： H01L23/12 ,  H01L23/50 ,  H01L23/538 ,  H01L25/04 ,  H01L25/065 ,  H01L25/18 ,  H01L21/44

CPC分类号： H01L23/645 ,  H01L23/50 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/48 ,  H01L24/82 ,  H01L25/0652 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/05025 ,  H01L2224/05548 ,  H01L2224/16225 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01056 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/04953 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/85399 ,  H01L2224/45099 ,  H01L2224/05647 ,  H01L2224/05099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A SiP (System-in-Package) having large-capacity passive elements incorporated therein or mounted thereon is provided. On an interposer made of a silicon substrate, metal substrate or glass substrate having via-holes formed therein, IC chips, or a plurality of chips, passive elements formed on a silicon substrate, metal substrate or glass substrate, are mounted in a face-up manner and re-wired en bloc on the chip. Because all of the silicon substrate, metal substrate and glass substrate are durable against high-temperature annealing for crystallizing a high-dielectric-constant material, large-capacity passive elements can be formed on the substrate which serves as an interposer or on the re-wiring of the chips to be mounted. It is also allowable that large-capacity passive elements formed on the silicon substrate, metal substrate or glass substrate is divided into chips, and that the resultant chips are mounted together with the IC chips.

摘要翻译： 提供了具有并入其中或安装在其上的大容量无源元件的SiP（系统级封装）。 在由硅基板，具有形成有通孔的金属基板或玻璃基板的内插件，形成在硅基板，金属基板或玻璃基板上的无芯元件，IC芯片或多个芯片安装在面板上， 在芯片上整体重新布线。 因为所有的硅衬底，金属衬底和玻璃衬底都耐高温退火以使高介电常数材料结晶，所以可以在用作插入件的衬底上或者重新形成大尺寸的无源元件， 要安装的芯片的接线。 也可以将形成在硅基板，金属基板或玻璃基板上的大容量无源元件分割成芯片，并且将所得芯片与IC芯片一起安装。

公开(公告)号：US07892887B2

公开(公告)日：2011-02-22

申请号：US12656621

申请日：2010-02-04

申请人： Osamu Yamagata

发明人： Osamu Yamagata

IPC分类号： H01L21/66 ,  H01L21/00 ,  H01L21/50 ,  H01L21/48 ,  H01L21/44 ,  H01L21/4763

CPC分类号： H01L24/82 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/24 ,  H01L25/0655 ,  H01L25/165 ,  H01L25/50 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05024 ,  H01L2224/05026 ,  H01L2224/05027 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05548 ,  H01L2224/05571 ,  H01L2224/05647 ,  H01L2224/12105 ,  H01L2224/24011 ,  H01L2224/24137 ,  H01L2224/24226 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/83132 ,  H01L2224/92244 ,  H01L2224/94 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2224/03

摘要： A semiconductor device and a fabrication method thereof are provided. A semiconductor device which is packaged as it includes a semiconductor in which an electronic circuit is disposed, the semiconductor device including: a substrate; a semiconductor chip which has a semiconductor main body having the electronic circuit formed thereon, a pad electrode formed on the semiconductor main body and a projected electrode that is connected to the pad electrode and projected from a surface of the semiconductor main body, wherein the semiconductor chip is mounted on the substrate from the back side of the surface to form the projected electrode thereon; and an insulating layer which is formed as the semiconductor chip buried therein and is polished from a top surface of the insulating layer to a height at which a top of the projected electrode is exposed.

摘要翻译： 提供半导体器件及其制造方法。 一种半导体器件，其被封装为包括其中设置电子电路的半导体，所述半导体器件包括：衬底; 半导体芯片，具有形成在其上的电子电路的半导体主体，形成在半导体主体上的焊盘电极和与焊盘电极连接并从半导体主体的表面突出的突出电极，其中半导体 芯片从表面的背面安装在基板上，以在其上形成突出的电极; 以及绝缘层，其形成为埋入其中的半导体芯片，并且从绝缘层的顶表面抛光到突出电极的顶部暴露的高度。

公开(公告)号：US07510910B2

公开(公告)日：2009-03-31

申请号：US11588315

申请日：2006-10-27

申请人： Osamu Yamagata

发明人： Osamu Yamagata

IPC分类号： H01L21/44 ,  H01L21/48

CPC分类号： H01L21/78 ,  H01L23/53238 ,  H01L23/53295 ,  H01L2924/0002 ,  Y10S257/92 ,  H01L2924/00

摘要： A semiconductor device and a production method thereof capable of reducing warps of a semiconductor wafer when packaging at a wafer level in a SiP-type semiconductor device, which is configured so that an insulating layer is formed by stacking a plurality of resin layers on a semiconductor chip formed with an electronic circuit, wiring layers are buried in the insulating layer and electrically connected to electrodes, and formation areas of the plurality of resin layers become gradually smaller from an area of an upper surface of the semiconductor chip as they get farther from the semiconductor chip, so that a side surface and an upper surface of each of the resin layers and the upper surface of the semiconductor chip form a stepwise shape.

摘要翻译： 一种半导体器件及其制造方法，其能够在SiP型半导体器件中的晶片级封装时减少半导体晶片的翘曲，SiP型半导体器件被构造为通过在半导体上层叠多个树脂层形成绝缘层 芯片由电子电路形成，布线层被埋在绝缘层中并电连接到电极，并且多个树脂层的形成区域从半导体芯片的上表面的区域逐渐变小， 半导体芯片，使得树脂层的侧表面和上表面以及半导体芯片的上表面形成阶梯状。