公开(公告)号：US06683377B1

公开(公告)日：2004-01-27

申请号：US09583183

申请日：2000-05-30

申请人： Il Kwon Shim ,  Vincent DiCaprio

发明人： Il Kwon Shim ,  Vincent DiCaprio

IPC分类号： H01L2334

CPC分类号： H01L25/0657 ,  H01L23/5387 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/16 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2225/0651 ,  H01L2225/06575 ,  H01L2225/06579 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2224/05599 ,  H01L2924/00

摘要： A multiple chip package and method of making the package allow multiple same size or different size chips to be stacked over each other, thereby creating a thin profile multi-chip package. Chips are attached to one surface of a continuous flexible substrate. The substrate has a metallization layer, which is electrically connected to the chips, such as via bond wires attached to center bond pads of the chips and to bond fingers on the metallization layer. Interconnections, such as solder balls, are attached to the other surface of the substrate and only at the portion opposite to the first chip. The substrate is folded to bring the first chip toward a second chip, which are then attached, such as with an insulative adhesive spacer. If any additional chips remain on the substrate, the substrate is folded to sequentially bring each additional chip toward the surface of the substrate opposite to the preceding chip and is secured thereto.

摘要翻译： 制造封装的多芯片封装和方法允许多个相同尺寸或​​不同尺寸的芯片彼此堆叠，从而形成薄型多芯片封装。 芯片连接到连续柔性基板的一个表面。 衬底具有电连接到芯片的金属化层，例如连接到芯片的中心接合焊盘的通孔接合线，并且在金属化层上粘合指状物。 诸如焊球之类的互连连接到衬底的另一表面，并且仅在与第一芯片相对的部分处。 将基板折叠以将第一芯片朝向第二芯片，然后将其连接，例如用绝缘粘合剂间隔件。 如果在基板上剩余另外的芯片，则将基板折叠成顺序地使每个附加芯片朝向与先前芯片相对的基板的表面并固定到其上。

公开(公告)号：US06531784B1

公开(公告)日：2003-03-11

申请号：US09585915

申请日：2000-06-02

申请人： Il Kwon Shim ,  Kambhampati Ramakrishna ,  Vincent DiCaprio

发明人： Il Kwon Shim ,  Kambhampati Ramakrishna ,  Vincent DiCaprio

IPC分类号： H01L2348

CPC分类号： H01L24/48 ,  H01L23/49833 ,  H01L24/45 ,  H01L24/49 ,  H01L25/0657 ,  H01L2224/05553 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48095 ,  H01L2224/4813 ,  H01L2224/48472 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/4899 ,  H01L2224/4911 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2225/0651 ,  H01L2225/06572 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10162 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/85399 ,  H01L2224/05599

摘要： A semiconductor package incorporates spacer strips enabling one or more semiconductor dies having central terminal pads to be stacked on top of one another within the package and reliably wire bonded to an associated substrate without shorting of the bonded wires. Each of the spacer strips comprises a flat, elongated strip of an insulative material that mount at edges of a surface of a die such that they straddle the central terminal pads thereon. The die is electrically connected to the substrate by a plurality of fine conductive wires having a first end bonded to one of the central terminal pad on the die, a second end bonded to a terminal pad on the substrate, and an intermediate portion between the first and second ends that passes transversely across the top surface of one of the spacer strips. The spacer strips have spaced pads or grooves on or in their top surfaces that captivate the individual wires and thereby redistribute the wires and prevent them from contacting the die and each other.

摘要翻译： 半导体封装包括间隔条，使得一个或多个具有中心端子焊盘的半导体管芯能够在封装内堆叠在彼此的顶部，并且可靠地引线键合到相关联的衬底而不会使接合的引线短路。 每个间隔条包括平坦的，细长的绝缘材料条，其安装在管芯的表面的边缘处，使得它们跨越其上的中心端子焊盘。 芯片通过多个细导电线电连接到基板上，该细导电线具有与芯片上的一个中心端子焊盘接合的第一端，接合到基板上的端子焊盘的第二端和第一端 并且横向穿过一个间隔条的顶表面的第二端。 间隔条在其顶表面上或其顶表面上具有间隔的垫或凹槽，其吸引各个线，从而重新分布电线并防止它们与管芯和彼此接触。

公开(公告)号：US06982488B2

公开(公告)日：2006-01-03

申请号：US10600931

申请日：2003-06-20

申请人： Won Sun Shin ,  Do Sung Chun ,  Soon Goo Lee ,  Il Kwon Shim ,  Vincent DiCaprio

发明人： Won Sun Shin ,  Do Sung Chun ,  Soon Goo Lee ,  Il Kwon Shim ,  Vincent DiCaprio

IPC分类号： H01L23/02 ,  H01L23/12 ,  H01L23/34 ,  H01L23/64 ,  H01L23/52 ,  H01L23/48

CPC分类号： H01L24/97 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49816 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/26175 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06555 ,  H01L2225/06568 ,  H01L2225/06586 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01057 ,  H01L2924/01079 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599

摘要： A semiconductor package and method for fabricating the same is disclosed. In one embodiment, the semiconductor package includes a circuit board, at least two semiconductor chips, electric connection means, an encapsulant, and a plurality of conductive balls. The circuit board has a resin layer and a circuit pattern. The resin layer is provided with an opening at its center portion. The circuit pattern is formed on at least one of upper and lower surfaces of the resin layer and includes one or more bond fingers and ball lands exposed to the outside. The semiconductor chips have a plurality of input/output pads on an active surface thereof. The semiconductor chips are stacked at a position of the opening of the circuit board, with at least one of the chips being within the opening. Alternatively, both chips are in the opening. The electric connection means connects the input/output pads of the semiconductor chips to the bond fingers of the circuit board. The encapsulant surrounds the semiconductor chips so as to protect the chips from the external environment. The conductive balls are fusion-bonded on the ball lands of the circuit board.

摘要翻译： 公开了半导体封装及其制造方法。 在一个实施例中，半导体封装包括电路板，至少两个半导体芯片，电连接装置，密封剂和多个导电球。 电路板具有树脂层和电路图案。 树脂层在其中心部分设置有开口。 电路图案形成在树脂层的上表面和下表面中的至少一个上，并且包括暴露于外部的一个或多个粘合指状物和球状区域。 半导体芯片在其有效表面上具有多个输入/输出焊盘。 半导体芯片堆叠在电路板的开口的位置，其中至少一个芯片在开口内。 或者，两个芯片都在开口中。 电连接装置将半导体芯片的输入/输出焊盘连接到电路板的键合指状物。 密封剂围绕半导体芯片，以保护芯片免受外部环境的影响。 导电球熔接在电路板的球面上。

公开(公告)号：US06489667B1

公开(公告)日：2002-12-03

申请号：US09422115

申请日：1999-10-20

申请人： Il Kwon Shim ,  Chang Kyu Park ,  Byung Joon Han ,  Vincent DiCaprio ,  Paul Hoffman

发明人： Il Kwon Shim ,  Chang Kyu Park ,  Byung Joon Han ,  Vincent DiCaprio ,  Paul Hoffman

IPC分类号： H01L23495

CPC分类号： H01L23/4334 ,  H01L23/3121 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/0401 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/4824 ,  H01L2224/484 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48739 ,  H01L2224/73215 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/48744

摘要： Semiconductor devices and methods of manufacturing such devices are disclosed. In one embodiment of this invention, a semiconductor chip is bonded to a first surface of a substrate. The substrate extends beyond the edge of the chip. Signal input/output pads on the chip are juxtaposed with an opening in the substrate. A molded support is formed on the portion of the first surface of the substrate that extends beyond between the sidewall of the edge of the chip. The support prevents bending of the substrate, and allows solder balls to be formed on the entire area of a second surface of the substrate opposite the first surface of the substrate. A heat dissipating plate is mounted on a surface of the chip opposite the substrate. The heat dissipating plate is attached to the support.

摘要翻译： 公开了半导体器件及其制造方法。 在本发明的一个实施例中，半导体芯片被接合到基板的第一表面。 衬底延伸超过芯片的边缘。 芯片上的信号输入/输出焊盘与衬底中的开口并置。 在衬底的第一表面的延伸超过芯片边缘的侧壁的部分之间形成模制支撑件。 支撑件防止基板的弯曲，并且允许在与基板的第一表面相对的基板的第二表面的整个区域上形成焊球。 散热板安装在与基板相对的芯片的表面上。 散热板附着在支架上。

公开(公告)号：US06414396B1

公开(公告)日：2002-07-02

申请号：US09490317

申请日：2000-01-24

申请人： Il Kwon Shim ,  Vincent DiCaprio ,  Paul Hoffman ,  Byung Joon Han

发明人： Il Kwon Shim ,  Vincent DiCaprio ,  Paul Hoffman ,  Byung Joon Han

IPC分类号： H01L2940

CPC分类号： H01L25/0657 ,  H01L23/3114 ,  H01L23/49575 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45164 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48247 ,  H01L2224/48624 ,  H01L2224/48647 ,  H01L2224/48724 ,  H01L2224/48747 ,  H01L2224/48824 ,  H01L2224/48847 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/83101 ,  H01L2224/85424 ,  H01L2224/85447 ,  H01L2224/92147 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06568 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/0665 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00015

摘要： Embodiments of integrated circuit packages for housing a plurality of integrated circuits are disclosed, along with methods of making the packages. One integrated circuit package comprises a substrate having a first surface having first metallizations thereon, an opposite second surface, and a plurality of apertures between the first and second surfaces. A first integrated circuit having a first surface with first bond pads thereon and an opposite second surface is mounted on the second surface of the substrate so that the first bond pads are superimposed with an aperture. Each first bond pad is electrically connected by a first bond wire extending through the superimposing aperture to a first metallization. A second integrated circuit having a first surface with conductive second bond pads thereon is mounted on the second surface of the first integrated circuit. In particular, the first surface of the second integrated circuit is placed on the second surface of the first integrated circuit so that the second bond pads are superimposed with one or more of the apertures through the substrate. Each second bond pad is electrically connected by a second bond wire extending through the superimposing aperture to a first metallization.

摘要翻译： 公开了用于容纳多个集成电路的集成电路封装的实施例以及制造封装的方法。 一个集成电路封装包括具有其上具有第一金属化的第一表面，相对的第二表面以及第一和第二表面之间的多个孔的基板。 具有第一表面的第一集成电路，其上具有第一接合焊盘并且相对的第二表面安装在基板的第二表面上，使得第一接合焊盘与孔重叠。 每个第一接合焊盘通过延伸穿过叠加孔的第一接合线电连接到第一金属化。 具有其上具有导电第二接合焊盘的第一表面的第二集成电路安装在第一集成电路的第二表面上。 特别地，第二集成电路的第一表面被放置在第一集成电路的第二表面上，使得第二接合焊盘与通过衬底的一个或多个孔叠加。 每个第二接合焊盘通过延伸穿过叠加孔的第二接合线电连接到第一金属化。

公开(公告)号：US06462274B1

公开(公告)日：2002-10-08

申请号：US09422027

申请日：1999-10-20

申请人： Il Kwon Shim ,  Chang Kyu Park ,  Byung Joon Han ,  Vincent DiCaprio ,  Paul Hoffman

发明人： Il Kwon Shim ,  Chang Kyu Park ,  Byung Joon Han ,  Vincent DiCaprio ,  Paul Hoffman

IPC分类号： H01L2302

CPC分类号： H01L24/97 ,  H01L21/561 ,  H01L23/3114 ,  H01L23/49822 ,  H01L23/5389 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/05554 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/48465 ,  H01L2224/73215 ,  H01L2224/92 ,  H01L2224/92147 ,  H01L2224/97 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/92247 ,  H01L2924/00

摘要： Chip-scale semiconductor packages of the fan-out type and methods of manufacturing such packages are disclosed. In one package embodiment within the invention, the package substrate is stiff enough to effectively carry an increased number of solder balls on an exterior area outside the edge of a semiconductor chip, in addition to the area above the chip. In another package embodiment, a molded support is mounted to the lower surface of the exterior area. The methods of the present invention include making a plurality of packages on a substrate. Prior to sawing a wafer to obtain chips for the assembly method, the wafer is inspected so as to discriminate between good chips and the defective chips. Only good chips are mounted to a wafer-shaped or strip-shaped substrate.

摘要翻译： 公开了扇出型的芯片级半导体封装和制造这种封装的方法。 在本发明的一个封装实施例中，除了芯片上方的区域之外，封装衬底足够坚固以有效地承载在半导体芯片的边缘外部的外部区域上增加数量的焊球。 在另一个包装实施例中，模制支撑件安装到外部区域的下表面。 本发明的方法包括在基板上制造多个封装。 在锯切晶片以获得用于组装方法的芯片之前，检查晶片以便区分好的芯片和有缺陷的芯片。 只有良好的芯片安装在晶片形或条形基片上。

公开(公告)号：US07211900B2

公开(公告)日：2007-05-01

申请号：US11129596

申请日：2005-05-13

申请人： Won Sun Shin ,  Do Sung Chun ,  Seon Goo Lee ,  Il Kwon Shim ,  Vincent DiCaprio

发明人： Won Sun Shin ,  Do Sung Chun ,  Seon Goo Lee ,  Il Kwon Shim ,  Vincent DiCaprio

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/34

CPC分类号： H01L24/97 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49816 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/26175 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06555 ,  H01L2225/06568 ,  H01L2225/06586 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01057 ,  H01L2924/01079 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599

摘要： A semiconductor package and method for fabricating the same is disclosed. In one embodiment, the semiconductor package includes a circuit board, at least two semiconductor chips, electric connection means, an encapsulant, and a plurality of conductive balls. The circuit board has a resin layer and a circuit pattern. The resin layer is provided with an opening at its center portion. The circuit pattern is formed on at least one of upper and lower surfaces of the resin layer and includes one or more bond fingers and ball lands exposed to the outside. The semiconductor chips have a plurality of input/output pads on an active surface thereof. The semiconductor chips are stacked at a position of the opening of the circuit board, with at least one of the chips being within the opening. Alternatively, both chips are in the opening. The electric connection means connects the input/output pads of the semiconductor chips to the bond fingers of the circuit board. The encapsulant surrounds the semiconductor chips so as to protect the chips from the external environment. The conductive balls are fusion-bonded on the ball lands of the circuit board.

摘要翻译： 公开了半导体封装及其制造方法。 在一个实施例中，半导体封装包括电路板，至少两个半导体芯片，电连接装置，密封剂和多个导电球。 电路板具有树脂层和电路图案。 树脂层在其中心部分设置有开口。 电路图案形成在树脂层的上表面和下表面中的至少一个上，并且包括暴露于外部的一个或多个粘合指状物和球状区域。 半导体芯片在其有效表面上具有多个输入/输出焊盘。 半导体芯片堆叠在电路板的开口的位置，其中至少一个芯片在开口内。 或者，两个芯片都在开口中。 电连接装置将半导体芯片的输入/输出焊盘连接到电路板的键合指状物。 密封剂围绕半导体芯片，以保护芯片免受外部环境的影响。 导电球熔接在电路板的球面上。

公开(公告)号：US06798049B1

公开(公告)日：2004-09-28

申请号：US09648284

申请日：2000-08-24

申请人： Won Sun Shin ,  Do Sung Chun ,  Seon Goo Lee ,  Il Kwon Shim ,  Vincent DiCaprio

发明人： Won Sun Shin ,  Do Sung Chun ,  Seon Goo Lee ,  Il Kwon Shim ,  Vincent DiCaprio

IPC分类号： H01L2302

CPC分类号： H01L24/97 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49816 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/26175 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06555 ,  H01L2225/06568 ,  H01L2225/06586 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01057 ,  H01L2924/01079 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599

摘要： A semiconductor package and method for fabricating the same is disclosed. In one embodiment, the semiconductor package includes a circuit board, at least two semiconductor chips, electric connection means, an encapsulant, and a plurality of conductive balls. The circuit board has a resin layer and a circuit pattern. The resin layer is provided with an opening at its center portion. The circuit pattern is formed on at least one of upper and lower surfaces of the resin layer and includes one or more bond fingers and ball lands exposed to the outside. The semiconductor chips have a plurality of input/output pads on an active surface thereof. The semiconductor chips are stacked at a position of the opening of the circuit board, with at least one of the chips being within the opening. Alternatively, both chips are in the opening. The electric connection means connects the input/output pads of the semiconductor chips to the bond fingers of the circuit board. The encapsulant surrounds the semiconductor chips so as to protect the chips from the external environment. The conductive balls are fusion-bonded on the ball lands of the circuit board.

摘要翻译： 公开了半导体封装及其制造方法。 在一个实施例中，半导体封装包括电路板，至少两个半导体芯片，电连接装置，密封剂和多个导电球。 电路板具有树脂层和电路图案。 树脂层在其中心部分设置有开口。 电路图案形成在树脂层的上表面和下表面中的至少一个上，并且包括暴露于外部的一个或多个粘合指状物和球状区域。 半导体芯片在其有效表面上具有多个输入/输出焊盘。 半导体芯片堆叠在电路板的开口的位置，其中至少一个芯片在开口内。 或者，两个芯片都在开口中。 电连接装置将半导体芯片的输入/输出焊盘连接到电路板的键合指状物。 密封剂围绕半导体芯片，以保护芯片免受外部环境的影响。 导电球熔接在电路板的球面上。

公开(公告)号：US09059157B2

公开(公告)日：2015-06-16

申请号：US13842582

申请日：2013-03-15

申请人： Yaojian Lin ,  Il Kwon Shim ,  JunMo Koo ,  Jose Alvin Caparas

发明人： Yaojian Lin ,  Il Kwon Shim ,  JunMo Koo ,  Jose Alvin Caparas

IPC分类号： H01L23/498 ,  H01L21/768 ,  H01L23/00 ,  H01L23/16

CPC分类号： H01L23/49811 ,  H01L21/76885 ,  H01L23/16 ,  H01L23/49816 ,  H01L24/19 ,  H01L2223/6677 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/73267 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2924/00

摘要： An integrated circuit packaging system and method of manufacture thereof includes: a substrate having a top insulation layer and a top conductive layer; an inter-react layer on the substrate; an integrated circuit die on the substrate; a package body on the inter-react layer and the integrated circuit die; and a top solder bump on the top conductive layer, the top solder bump in a 3D via formed through the package body, the inter-react layer, and the top insulation layer for exposing the top conductive layer in the 3D via.

摘要翻译： 集成电路封装系统及其制造方法包括：具有顶部绝缘层和顶部导电层的衬底; 基板上的反应间层; 集成电路裸片在基板上; 反应层间和集成电路管芯上的封装体; 以及顶部导电层上的顶部焊料凸块，通过封装主体，反应间层和顶部绝缘层形成的3D通孔中的顶部焊料凸块，用于暴露3D通孔中的顶部导电层。

公开(公告)号：US09034693B2

公开(公告)日：2015-05-19

申请号：US13247890

申请日：2011-09-28

申请人： Il Kwon Shim ,  Kwee Lan Tan ,  Jian Jun Li ,  Dario S. Filoteo, Jr.

发明人： Il Kwon Shim ,  Kwee Lan Tan ,  Jian Jun Li ,  Dario S. Filoteo, Jr.

IPC分类号： H01L21/00 ,  H01L25/065 ,  H01L21/48 ,  H01L23/13 ,  H01L23/498 ,  H01L25/10 ,  H01L23/00

CPC分类号： H01L25/0657 ,  H01L21/4857 ,  H01L23/13 ,  H01L23/49816 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48237 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2225/06572 ,  H01L2225/06586 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/3511 ,  Y10S438/928 ,  H01L2924/00012 ,  H01L2924/01031 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method of manufacturing an integrated circuit package includes: forming a substrate including: forming a core layer, and forming vias in the core layer; forming a conductive layer having a predetermined thickness on the core layer and having substantially twice the predetermined thickness in the vias; and forming connections between an integrated circuit die and the conductive layer.

摘要翻译： 制造集成电路封装的方法包括：形成衬底，包括：形成芯层，并在芯层中形成通孔; 在芯层上形成具有预定厚度的导电层，并且在通孔中基本上具有预定厚度的两倍; 以及在集成电路管芯和导电层之间形成连接。