公开(公告)号：US20110042797A1

公开(公告)日：2011-02-24

申请号：US12857928

申请日：2010-08-17

申请人： Ji-hyun Park ,  Heungkyu Kwon ,  Min-Ok Na ,  Taehwan Kim

发明人： Ji-hyun Park ,  Heungkyu Kwon ,  Min-Ok Na ,  Taehwan Kim

IPC分类号： H01L23/00 ,  H01L23/488 ,  H01L23/498

CPC分类号： H01L21/56 ,  H01L21/563 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/3142 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/26175 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/83051 ,  H01L2224/83385 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/01078 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/00

摘要： A semiconductor package includes a substrate having an insulation layer. The insulation layer has a first region having a first surface roughness and a second region having a second surface roughness. A semiconductor chip is mounted in the first region, and an underfill resin solution is filled into the space between the semiconductor chip and the insulation layer. The roughness of the second region prevents the underfill resin from flowing out from the semiconductor chip to thereby reduce a size of the semiconductor package.

摘要翻译： 半导体封装包括具有绝缘层的衬底。 绝缘层具有第一表面粗糙度的第一区域和具有第二表面粗糙度的第二区域。 半导体芯片安装在第一区域中，底部填充树脂溶液填充到半导体芯片和绝缘层之间的空间中。 第二区域的粗糙度防止底部填充树脂从半导体芯片流出，从而减小半导体封装的尺寸。

公开(公告)号：US08426959B2

公开(公告)日：2013-04-23

申请号：US12857928

申请日：2010-08-17

申请人： Ji-hyun Park ,  Heungkyu Kwon ,  Min-Ok Na ,  Taehwan Kim

发明人： Ji-hyun Park ,  Heungkyu Kwon ,  Min-Ok Na ,  Taehwan Kim

IPC分类号： H01L23/28

CPC分类号： H01L21/56 ,  H01L21/563 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/3142 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/26175 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/83051 ,  H01L2224/83385 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/01078 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/00

摘要： A semiconductor package includes a substrate having an insulation layer. The insulation layer has a first region having a first surface roughness and a second region having a second surface roughness. A semiconductor chip is mounted in the first region, and an underfill resin solution is filled into the space between the semiconductor chip and the insulation layer. The roughness of the second region prevents the underfill resin from flowing out from the semiconductor chip to thereby reduce a size of the semiconductor package.

摘要翻译： 半导体封装包括具有绝缘层的衬底。 绝缘层具有第一表面粗糙度的第一区域和具有第二表面粗糙度的第二区域。 半导体芯片安装在第一区域中，底部填充树脂溶液填充到半导体芯片和绝缘层之间的空间中。 第二区域的粗糙度防止底部填充树脂从半导体芯片流出，从而减小半导体封装的尺寸。

公开(公告)号：US08709879B2

公开(公告)日：2014-04-29

申请号：US13835683

申请日：2013-03-15

申请人： Ji-hyun Park ,  Heungkyu Kwon ,  Min-Ok Na ,  Taehwan Kim

发明人： Ji-hyun Park ,  Heungkyu Kwon ,  Min-Ok Na ,  Taehwan Kim

IPC分类号： H01L21/56

CPC分类号： H01L21/56 ,  H01L21/563 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/3142 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/26175 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/83051 ,  H01L2224/83385 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/01078 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/00

摘要： A semiconductor package includes a substrate having an insulation layer. The insulation layer has a first region having a first surface roughness and a second region having a second surface roughness. A semiconductor chip is mounted in the first region, and an underfill resin solution is filled into the space between the semiconductor chip and the insulation layer. The roughness of the second region prevents the underfill resin from flowing out from the semiconductor chip to thereby reduce a size of the semiconductor package.

摘要翻译： 半导体封装包括具有绝缘层的衬底。 绝缘层具有第一表面粗糙度的第一区域和具有第二表面粗糙度的第二区域。 半导体芯片安装在第一区域中，底部填充树脂溶液填充到半导体芯片和绝缘层之间的空间中。 第二区域的粗糙度防止底部填充树脂从半导体芯片流出，从而减小半导体封装的尺寸。

公开(公告)号：US09214441B2

公开(公告)日：2015-12-15

申请号：US14283833

申请日：2014-05-21

申请人： Heungkyu Kwon ,  Kyoungmook Lim

发明人： Heungkyu Kwon ,  Kyoungmook Lim

IPC分类号： H01L23/48 ,  H01L23/00 ,  H01L25/065 ,  H01L25/10

CPC分类号： H01L24/30 ,  H01L24/06 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05571 ,  H01L2224/06131 ,  H01L2224/06134 ,  H01L2224/06155 ,  H01L2224/14131 ,  H01L2224/14134 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/26175 ,  H01L2224/29036 ,  H01L2224/3001 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45139 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/13099 ,  H01L2924/00011 ,  H01L2224/45099

摘要： According to example embodiments, a semiconductor package includes a first and a second semiconductor package. The first semiconductor package includes a first package substrate, first and second memory chips spaced apart from each other on the first package substrate in a first direction, third and fourth memory chips on the first and second memory chips, respectively, and first and second jumper chips on the first and second memory chips, respectively. The first and second jumper chips are spaced apart from the third and fourth memory chips, respectively, in a second direction crossing the first direction. The second semiconductor package may include a second package substrate and a logic chip on the second package substrate. The first semiconductor package may be on the second semiconductor package.

摘要翻译： 根据示例性实施例，半导体封装包括第一和第二半导体封装。 第一半导体封装包括第一封装衬底，在第一方向上在第一封装衬底上彼此间隔开的第一和第二存储器芯片，分别在第一和第二存储器芯片上的第三和第四存储器芯片，以及第一和第二跳线 分别在第一和第二存储器芯片上的芯片。 第一和第二跳线芯片分别与第三和第四存储器芯片在与第一方向交叉的第二方向上分开。 第二半导体封装可以包括第二封装衬底和第二封装衬底上的逻辑芯片。 第一半导体封装可以在第二半导体封装上。

公开(公告)号：US20150014862A1

公开(公告)日：2015-01-15

申请号：US14289814

申请日：2014-05-29

申请人： Heungkyu Kwon ,  Sangho An

发明人： Heungkyu Kwon ,  Sangho An

IPC分类号： H01L23/00 ,  H01L23/528

CPC分类号： H01L23/3128 ,  H01L23/49816 ,  H01L23/552 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06537 ,  H01L2225/06568 ,  H01L2225/06572 ,  H01L2225/06582 ,  H01L2225/06586 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/15156 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00012 ,  H01L2924/0665 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Semiconductor packages are provided. A semiconductor package may include a wiring board and a first semiconductor chip on the wiring board. Moreover, the semiconductor package may include a metal layer on the first semiconductor chip and a second semiconductor chip on the metal layer. The metal layer may be between the first and second semiconductor chips.

摘要翻译： 提供半导体封装。 半导体封装可以包括布线​​板和布线板上的第一半导体芯片。 此外，半导体封装可以包括第一半导体芯片上的金属层和金属层上的第二半导体芯片。 金属层可以在第一和第二半导体芯片之间。

公开(公告)号：US20120074595A1

公开(公告)日：2012-03-29

申请号：US13191843

申请日：2011-07-27

申请人： JeongOh Ha ,  Heungkyu Kwon ,  YunSeok Choi ,  Jong-Won Lee

发明人： JeongOh Ha ,  Heungkyu Kwon ,  YunSeok Choi ,  Jong-Won Lee

IPC分类号： H01L23/522

CPC分类号： H01L25/105 ,  H01L23/5386 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package includes a first substrate on which a first semiconductor chip is mounted, a second substrate spaced apart from the first substrate and on which a second semiconductor chip is mounted, first pads disposed on the first substrate, second pads disposed on the second substrate to be opposite to the first pads, and connection patterns electrically connecting the opposite first and second pads to each other, respectively. The first pads are disposed asymmetrically with respect to the central axis of the first substrate.

摘要翻译： 半导体封装包括：第一衬底，其上安装有第一半导体芯片;第二衬底，与第一衬底间隔开并且安装有第二半导体芯片;第一焊盘，设置在第一衬底上;第二焊盘，设置在第二衬底上; 与第一焊盘相对，以及将相对的第一焊盘和第二焊盘彼此电连接的连接图案。 第一衬垫相对于第一衬底的中心轴非对称地设置。

公开(公告)号：US20140374900A1

公开(公告)日：2014-12-25

申请号：US14242094

申请日：2014-04-01

申请人： Heungkyu Kwon ,  Jongkook Kim

发明人： Heungkyu Kwon ,  Jongkook Kim

IPC分类号： H01L23/498

CPC分类号： H01L25/50 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/481 ,  H01L23/49816 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/05025 ,  H01L2224/05026 ,  H01L2224/05027 ,  H01L2224/05553 ,  H01L2224/05564 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/06181 ,  H01L2224/06517 ,  H01L2224/131 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/17517 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06568 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2224/05552 ,  H01L2924/00

摘要： A semiconductor package includes memory I/O bumps and power/ground voltage bumps which are disposed at different positions from each other. In the semiconductor package, memory chips are disposed side by side, and a passivation layer is interposed between a conductive pad and a bump.

摘要翻译： 半导体封装包括设置在彼此不同位置的存储器I / O凸块和电源/接地电压凸块。 在半导体封装中，存储芯片并排布置，并且钝化层插入在导电焊盘和凸块之间。

公开(公告)号：US09606591B2

公开(公告)日：2017-03-28

申请号：US13617619

申请日：2012-09-14

申请人： Heungkyu Kwon ,  Jae Choon Kim ,  Eunseok Cho ,  Jichul Kim

发明人： Heungkyu Kwon ,  Jae Choon Kim ,  Eunseok Cho ,  Jichul Kim

IPC分类号： G06F1/20

CPC分类号： G06F1/206 ,  G01J5/10 ,  G05B15/02

摘要： A surface temperature management method of mobile device is provided. The method includes sensing a temperature of an application processor in an operation mode of the mobile device; and controlling the application processor using the sensed temperature and a surface temperature management table to manage a surface temperature of a target part of the mobile device. The surface temperature management table includes information related to the temperature of the application processor corresponding to the surface temperature of the target part in the operation mode.

公开(公告)号：US09390992B2

公开(公告)日：2016-07-12

申请号：US14289814

申请日：2014-05-29

申请人： Heungkyu Kwon ,  Sangho An

发明人： Heungkyu Kwon ,  Sangho An

IPC分类号： H01L23/13 ,  H01L23/31 ,  H01L23/498 ,  H01L23/552 ,  H01L25/065 ,  H01L25/10 ,  H01L23/00

CPC分类号： H01L23/3128 ,  H01L23/49816 ,  H01L23/552 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06537 ,  H01L2225/06568 ,  H01L2225/06572 ,  H01L2225/06582 ,  H01L2225/06586 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/15156 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00012 ,  H01L2924/0665 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Semiconductor packages are provided. A semiconductor package may include a wiring board and a first semiconductor chip on the wiring board. Moreover, the semiconductor package may include a metal layer on the first semiconductor chip and a second semiconductor chip on the metal layer. The metal layer may be between the first and second semiconductor chips.

摘要翻译： 提供半导体封装。 半导体封装可以包括布线​​板和布线板上的第一半导体芯片。 此外，半导体封装可以包括第一半导体芯片上的金属层和金属层上的第二半导体芯片。 金属层可以在第一和第二半导体芯片之间。