公开(公告)号：US20180265462A1

公开(公告)日：2018-09-20

申请号：US15759588

申请日：2012-05-23

申请人： Mi Ock LEE ,  Hyeung Geun PARK ,  Eun Jin KIM ,  Ho Young SON ,  Hyo Jun JUNG ,  Suck Chang HONG ,  Tae Young NA

发明人： Mi Ock LEE ,  Hyeung Geun PARK ,  Eun Jin KIM ,  Ho Young SON ,  Hyo Jun JUNG ,  Suck Chang HONG ,  Tae Young NA

IPC分类号： C07C335/12 ,  A61P29/00 ,  A61P3/06 ,  A61P1/16 ,  A61P9/10

CPC分类号： C07C335/12 ,  A61P1/16 ,  A61P3/06 ,  A61P9/10 ,  A61P29/00

摘要： Provided is a compound activating RORα gene, particularly a JC1 compound containing CGP52608 thiazolidinedione as a lead substance, and a pharmaceutically acceptable salt thereof. The compound is a lipid accumulation inhibitor and applicable to the treatment of metabolic diseases or inflammatory diseases.

公开(公告)号：US20110304036A1

公开(公告)日：2011-12-15

申请号：US13012877

申请日：2011-01-25

申请人： Ho Young SON

发明人： Ho Young SON

IPC分类号： H01L23/48

CPC分类号： H01L23/3675 ,  H01L23/3128 ,  H01L23/3736 ,  H01L23/42 ,  H01L23/49816 ,  H01L25/0657 ,  H01L2224/16145 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06565 ,  H01L2225/06589 ,  H01L2924/09701

摘要： A semiconductor package includes a first semiconductor chip having a first surface and a second surface which faces away from the first surface, a heat dissipation member, defined with a cavity, disposed on the first surface of the first semiconductor chip and having a plurality of metal pillars which contact the first semiconductor chip, and one or more second semiconductor chips stacked on the first surface of the first semiconductor chip in the cavity to be electrically connected with one another and with the first semiconductor chip.

摘要翻译： 半导体封装包括具有第一表面和远离第一表面的第二表面的第一半导体芯片，设置在第一半导体芯片的第一表面上并具有多个金属的散热构件，其限定有空腔 与第一半导体芯片接触的支柱和堆叠在空腔中的第一半导体芯片的第一表面上的彼此电连接并与第一半导体芯片的一个或多个第二半导体芯片。

公开(公告)号：US20130099360A1

公开(公告)日：2013-04-25

申请号：US13586199

申请日：2012-08-15

申请人： Ho Young SON

发明人： Ho Young SON

IPC分类号： H01L23/48 ,  H01L21/28

CPC分类号： H01L21/76898 ,  H01L23/481 ,  H01L24/11 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/13 ,  H01L2224/14181 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2224/05552 ,  H01L2924/00

摘要： A semiconductor package includes a semiconductor chip having a front surface and a back surface facing away from the front surface; a through electrode formed in the semiconductor chip and passing through the front surface and the back surface; and a contamination preventing layer formed in the semiconductor chip, the through electrode passing through the contamination preventing layer.

摘要翻译： 半导体封装包括半导体芯片，其具有前表面和背表面背离前表面; 形成在半导体芯片中并穿过前表面和后表面的通孔; 以及形成在半导体芯片中的防污染层，穿通电极穿过防污染层。

公开(公告)号：US20120112360A1

公开(公告)日：2012-05-10

申请号：US13243638

申请日：2011-09-23

申请人： Ho Young SON

发明人： Ho Young SON

IPC分类号： H01L23/48 ,  H01L21/56 ,  H01L25/03 ,  H01L21/60

CPC分类号： H01L21/56 ,  H01L23/3114 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L24/92 ,  H01L25/0657 ,  H01L2224/16145 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/29387 ,  H01L2224/2939 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2224/83102 ,  H01L2224/83855 ,  H01L2224/92125 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06593 ,  H01L2225/06596 ,  H01L2924/14 ,  H01L2924/1434 ,  H01L2924/00

摘要： A semiconductor chip includes a semiconductor chip body including a peripheral region, a first region and a second region, and having a plurality of memory banks formed in each of the first region and the second region; a plurality of first through electrodes formed in the peripheral region; and a plurality of second through electrodes formed in the first and second regions along a direction parallel to a minor axis of the semiconductor chip body.

摘要翻译： 半导体芯片包括半导体芯片本体，其包括周边区域，第一区域和第二区域，并且具有形成在第一区域和第二区域中的每一个中的多个存储体; 形成在周边区域的多个第一贯通电极; 以及沿着与半导体芯片主体的短轴平行的方向在第一和第二区域中形成的多个第二贯通电极。

公开(公告)号：US20130161826A1

公开(公告)日：2013-06-27

申请号：US13566118

申请日：2012-08-03

申请人： Ho Young SON

发明人： Ho Young SON

IPC分类号： H01L23/48

CPC分类号： H01L25/0657 ,  H01L21/7682 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/5222 ,  H01L23/5226 ,  H01L23/53295 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/03 ,  H01L25/105 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/06181 ,  H01L2224/13022 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor chip includes a substrate, through-electrodes passing through the substrate, and a dielectric layer formed between the substrate and the through-electrodes and having a dielectric constant decreasing structure.

公开(公告)号：US20120205816A1

公开(公告)日：2012-08-16

申请号：US13371090

申请日：2012-02-10

申请人： Ho Young SON ,  Tac Keun OH

发明人： Ho Young SON ,  Tac Keun OH

IPC分类号： H01L23/48 ,  H01L21/44

CPC分类号： H01L29/40 ,  H01L21/4763 ,  H01L21/76898 ,  H01L23/293 ,  H01L23/3171 ,  H01L23/3192 ,  H01L23/481 ,  H01L24/05 ,  H01L24/06 ,  H01L25/0657 ,  H01L2224/0346 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05078 ,  H01L2224/05562 ,  H01L2224/0557 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05616 ,  H01L2224/05618 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05669 ,  H01L2224/05671 ,  H01L2224/05684 ,  H01L2224/0603 ,  H01L2224/06051 ,  H01L2224/06181 ,  H01L2224/06505 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16235 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01055 ,  H01L2924/12044 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/1438 ,  H01L2924/1441 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2224/05552 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor chip includes a substrate having a front surface and a back surface opposite the front surface, a conductive column part passing through the substrate from the front surface to the back surface, a cavity formed by removing a part of the back surface around an end portion of the conductive column part such that the end portion of the conductive column part protrudes from the cavity, a first insulation layer formed in the cavity such that a portion of the end portion of the conductive column part is exposed, and a back electrode electrically connected to the exposed end portion of the conductive column part.

摘要翻译： 半导体芯片包括具有与前表面相对的前表面和后表面的基板，从前表面到后表面穿过基板的导电柱部分，通过将末端的一部分背面去除而形成的空腔 导电柱部分的部分，使得导电柱部分的端部从空腔突出;形成在腔中的第一绝缘层，使得导电柱部分的端部的一部分露出;以及背电极， 连接到导电柱部分的暴露端部。

公开(公告)号：US20100276795A1

公开(公告)日：2010-11-04

申请号：US12493321

申请日：2009-06-29

申请人： Ho Young SON ,  Jun Gi CHOI ,  Seung Taek YANG

发明人： Ho Young SON ,  Jun Gi CHOI ,  Seung Taek YANG

IPC分类号： H01L23/52 ,  H01L21/50 ,  H01L21/60 ,  H01L23/48

CPC分类号： H01L25/0657 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L24/29 ,  H01L25/50 ,  H01L2224/05547 ,  H01L2224/0557 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2225/06541 ,  H01L2225/06575 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2924/14 ,  H01L2224/05552

摘要： A semiconductor package capable of being efficiently stacked and a method of manufacturing the same is presented. The semiconductor package includes a semiconductor chip, an insulation layer, and a through-electrode. The semiconductor chip has a first surface and a second surface, a circuit section in the semiconductor chip, an internal circuit pattern electrically connected to the circuit section, and a through-hole that passes through the internal circuit pattern and through the first and second surfaces. The insulation layer is on a through-hole of the semiconductor chip and has an opening which exposes the internal circuit pattern which was exposed by the through-hole. The through-electrode is in the through-hole and electrically coupled to the internal circuit pattern which is exposed through the opening of the insulation layer.

摘要翻译： 提出了一种能够有效堆叠的半导体封装及其制造方法。 半导体封装包括半导体芯片，绝缘层和通孔。 半导体芯片具有第一表面和第二表面，半导体芯片中的电路部分，电连接到电路部分的内部电路图案，以及穿过内部电路图案并穿过第一和第二表面的通孔 。 绝缘层位于半导体芯片的通孔上，并且具有露出由通孔露出的内部电路图案的开口。 贯通电极在通孔中并且电耦合到通过绝缘层的开口暴露的内部电路图案。

公开(公告)号：US20100258936A1

公开(公告)日：2010-10-14

申请号：US12491651

申请日：2009-06-25

申请人： Jong Hoon KIM ,  Ho Young SON

发明人： Jong Hoon KIM ,  Ho Young SON

IPC分类号： H01L23/498

CPC分类号： H01L24/92 ,  H01L23/3128 ,  H01L23/3157 ,  H01L23/481 ,  H01L24/03 ,  H01L24/06 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05555 ,  H01L2224/0557 ,  H01L2224/056 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/06136 ,  H01L2224/13009 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/29 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/29298 ,  H01L2224/83194 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/00013 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/10158 ,  H01L2924/15311 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/2929

摘要： A stacked semiconductor package is presented which includes multiple semiconductor chips and through-electrodes. Each semiconductor chip has bonding pads formed on a first surface of the semiconductor chip and has a projection which projects from a portion of a second surface of the semiconductor chip. The first and second surfaces of the semiconductor chip face away from each other the first surface. The through-electrodes pass through the first surface and through the projection on the second surface.

摘要翻译： 提出了一种堆叠的半导体封装，其包括多个半导体芯片和通孔。 每个半导体芯片具有形成在半导体芯片的第一表面上的接合焊盘，并且具有从半导体芯片的第二表面的一部分突出的突起。 半导体芯片的第一和第二表面相对于第一表面。 贯通电极穿过第一表面并穿过第二表面上的突起。