公开(公告)号：US06326561B1

公开(公告)日：2001-12-04

申请号：US08675069

申请日：1996-07-03

申请人： Ryuji Watanabe ,  Takeyuki Itabashi ,  Osamu Miura ,  Akio Takahashi ,  Yukio Ookoshi ,  Hitoshi Suzuki ,  Masahiro Suzuki ,  Tsutomu Imai

发明人： Ryuji Watanabe ,  Takeyuki Itabashi ,  Osamu Miura ,  Akio Takahashi ,  Yukio Ookoshi ,  Hitoshi Suzuki ,  Masahiro Suzuki ,  Tsutomu Imai

IPC分类号： H01R909

CPC分类号： H01L23/49861 ,  H01L21/486 ,  H01L23/5384 ,  H01L2224/16225 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15312 ,  H05K3/0035 ,  H05K3/0041 ,  H05K3/422 ,  H05K3/467 ,  H05K2203/0554 ,  Y10T156/1052 ,  Y10T156/1093

摘要： A thin-film multilayer wiring board with first and second metallic wiring layers formed on a substrate and an organic insulating layer interposed between the metallic wiring layers. The insulating layer has the first metallic wiring layer and via holes in a thickness of the insulating layer. The lands of the first and second metallic wiring layers are electrically connected by via studs which are made of a conductive metal filled in the via holes.

摘要翻译： 一种薄膜多层布线板，其具有形成在基板上的第一和第二金属布线层以及置于金属布线层之间的有机绝缘层。 绝缘层具有第一金属布线层和绝缘层厚度的通孔。 第一和第二金属布线层的焊盘通过由填充在通孔中的导电金属制成的通孔螺栓电连接。

公开(公告)号：US06190493B1

公开(公告)日：2001-02-20

申请号：US08975172

申请日：1997-11-20

申请人： Ryuji Watanabe ,  Takeyuki Itabashi ,  Osamu Miura ,  Akio Takahashi ,  Yukio Ookoshi ,  Hitoshi Suzuki ,  Masahiro Suzuki ,  Tsutomu Imai

发明人： Ryuji Watanabe ,  Takeyuki Itabashi ,  Osamu Miura ,  Akio Takahashi ,  Yukio Ookoshi ,  Hitoshi Suzuki ,  Masahiro Suzuki ,  Tsutomu Imai

IPC分类号： H05K300

CPC分类号： H01L23/49861 ,  H01L21/486 ,  H01L23/5384 ,  H01L2224/16225 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15312 ,  H05K3/0035 ,  H05K3/0041 ,  H05K3/422 ,  H05K3/467 ,  H05K2203/0554 ,  Y10T156/1052 ,  Y10T156/1093

摘要： A thin-film multilayer wiring board comprising a first and a second metallic wiring layers formed on a substrate with an organic insulating layer interposed between the metallic wiring layers, wherein the lands of the first and second metallic wiring layers are electrically connected by via studs made of a conductive metal filler formed by electroless plating, and the difference between the top end diameter and the base diameter of each via stud is 10% or less, or the angle made by the taper of the interface between the insulating layer and each via stud against the axis thereof is 5° or less, can provide a high wiring density and signal transmission performance.

摘要翻译： 一种薄膜多层布线板，包括形成在基板上的第一和第二金属布线层，其中介于金属布线层之间的有机绝缘层，其中第一和第二金属布线层的焊盘通过螺柱电连接 通过无电镀形成的导电金属填料，并且每个通孔螺柱的顶端直径和底部直径之间的差异为10％或更小，或绝缘层和每个通孔螺柱之间的界面的锥度形成的角度 相对于其轴线为5°以下，可以提供高的布线密度和信号传输性能。

公开(公告)号：US5565706A

公开(公告)日：1996-10-15

申请号：US407081

申请日：1995-03-20

申请人： Osamu Miura ,  Akio Takahashi ,  Takao Miwa ,  Masahiro Suzuki ,  Ryuji Watanabe ,  Junichi Katagiri ,  Yoichi Daiko ,  Tsutomu Imai ,  Haruo Akahoshi

发明人： Osamu Miura ,  Akio Takahashi ,  Takao Miwa ,  Masahiro Suzuki ,  Ryuji Watanabe ,  Junichi Katagiri ,  Yoichi Daiko ,  Tsutomu Imai ,  Haruo Akahoshi

IPC分类号： H01L23/13 ,  H01L23/538 ,  H01L25/065 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L23/13 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L25/0655 ,  H01L2224/04105 ,  H01L2224/16225 ,  H01L2224/2402 ,  H01L2224/24137 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30107 ,  H01L2924/3011

摘要： A thin and high-density package board used with general-purpose mainframe computers and high-speed processors is provided. On a ceramic substrate on which memory LSIs and a logic LSI with only elements formed without multilayer wiring are mounted, a multilayer wiring layer insuring signal transfer of the LSIs is formed, providing a thin package board.

摘要翻译： 提供了一种用于通用大型计算机和高速处理器的薄型和高密度封装板。 在其上安装有仅具有不具有多层布线的元件的存储器LSI和逻辑LSI的陶瓷基板上，形成确保LSI的信号传输的多层布线层，从而提供薄的封装板。

公开(公告)号：US5497545A

公开(公告)日：1996-03-12

申请号：US34372

申请日：1993-03-18

申请人： Ryuji Watanabe ,  Osamu Miura ,  Kunio Miyazaki ,  Yukio Ookoshi ,  Akio Takahashi

发明人： Ryuji Watanabe ,  Osamu Miura ,  Kunio Miyazaki ,  Yukio Ookoshi ,  Akio Takahashi

IPC分类号： H01L21/60 ,  H01L21/48 ,  H01L21/58 ,  H01L23/12 ,  H01L23/538 ,  H01R12/51 ,  H05K3/32 ,  H05K3/40 ,  H05K3/46 ,  H05K3/36 ,  H01R9/09

CPC分类号： H05K3/4046 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/5384 ,  H01L23/5385 ,  H01R12/523 ,  H01L2224/1134 ,  H01L2224/13099 ,  H01L2224/45144 ,  H01L2224/78301 ,  H01L2924/00013 ,  H01L2924/01014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15312 ,  H05K2201/0382 ,  H05K2201/10234 ,  H05K2201/10287 ,  H05K2201/10416 ,  H05K2203/0195 ,  H05K2203/0278 ,  H05K3/328 ,  H05K3/4644 ,  Y10T29/49126 ,  Y10T29/49149 ,  Y10T29/49151

摘要： A multi-layer wiring assembly including a stack of insulating layers, e.g. of polyimide, alternating with wiring patterns, typically of copper. To establish the circuit pattern, successive wiring patterns are connected to one another through the intervening insulating layers at predetermined locations, by metal stud connections. The studs are formed during assembly of the stack by wire-bonding a stud onto an underlying wiring pattern through a through-hole of the insulating layer above, and then stamping the exposed end of the wire-bonded stud to spread it into contact with the uppermost wiring pattern. The wire-bonded studs e.g. of Au, form strong bonds with the underlying conductor and are quick to apply in an automated process using a wire-bonding machine.

摘要翻译： 一种多层布线组件，包括一层绝缘层，例如 的聚酰亚胺，与布线图案交替，通常为铜。 为了建立电路图案，连续的布线图案通过金属螺柱连接在预定位置处通过中间绝缘层彼此连接。 通过将螺柱通过上面的绝缘层的通孔将螺柱线接合到下面的布线图案上，并且然后冲压引线接合的螺柱的暴露的端部以使其与 最上面的布线图案。 例如， 的Au与底层导体形成牢固的结合，并且使用引线接合机快速地应用于自动化过程中。

公开(公告)号：US5768108A

公开(公告)日：1998-06-16

申请号：US720028

申请日：1996-09-27

申请人： Osamu Miura ,  Kunio Miyazaki ,  Akio Takahashi ,  Motoyo Wajima ,  Ryuji Watanabe ,  Takao Miwa ,  Yuichi Satsu ,  Shigeo Amagi

发明人： Osamu Miura ,  Kunio Miyazaki ,  Akio Takahashi ,  Motoyo Wajima ,  Ryuji Watanabe ,  Takao Miwa ,  Yuichi Satsu ,  Shigeo Amagi

IPC分类号： H05K1/05 ,  H01L21/48 ,  H01L23/538 ,  H05K1/11 ,  H05K3/40 ,  H05K3/42 ,  H05K3/46 ,  H05K1/00 ,  H05K1/09 ,  H05K1/16

CPC分类号： H01L21/4857 ,  H01L23/5385 ,  H05K3/4641 ,  H01L2224/16225 ,  H05K1/113 ,  H05K2201/068 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K3/4069 ,  H05K3/429 ,  H05K3/4623

摘要： A multi-layer wiring structure for mounting electronic devices is provided to be used in an electronic computer, a work station or the like, and more particularly a multi-layer packaging board having microscopic wiring layers, which board has an excellent dimensional stability and a high reliability, and also a method of producing such a board are provided. The multi-layer wiring structure includes a complex of at least two sub-assemblies each having wiring layers formed respectively on opposite sides of a core material of a low thermal expansive metal through an insulation layer in such a manner that the wiring layers correspond in area ratio to each other. The sub-assemblies are connected to one another by conductors via through holes. In this structure, the wiring structure having the core material of a low thermal expansive metal is used as a base, and therefore a dimensional change of a board is small, and microscopic wiring layers can be formed, and the reliability of connection between the sub-assemblies is enhanced. Furthermore, the board can be produced at low costs.

摘要翻译： 在电子计算机，工作站等中使用用于安装电子装置的多层布线结构，特别是具有微细布线层的多层封装板，该板具有优异的尺寸稳定性和 高可靠性，以及制造这种基板的方法。 多层布线结构包括至少两个子组件的复合体，每个子组件具有通过绝缘层分别形成在低热膨胀金属的芯材的相对侧上的布线层，使得布线层对应于区域 相互之间的比例。 子组件通过导体经由通孔彼此连接。 在这种结构中，将具有低热膨胀金属的芯材的布线结构用作基底，因此板的尺寸变化小，并且可以形成微细的布线层，并且子层之间的连接的可靠性 大会组合得到增强。 此外，该板可以低成本生产。

公开(公告)号：US5457079A

公开(公告)日：1995-10-10

申请号：US124076

申请日：1993-09-21

申请人： Takeyuki Itabashi ,  Fujiko Kinosaki ,  Akio Takahashi ,  Haruo Akahoshi

发明人： Takeyuki Itabashi ,  Fujiko Kinosaki ,  Akio Takahashi ,  Haruo Akahoshi

IPC分类号： B01J23/74 ,  B01J37/02 ,  C02F1/461 ,  C02F1/467 ,  C23C18/28 ,  C23C18/40 ,  C25B3/02 ,  H01M4/90 ,  B01J23/72

CPC分类号： B01J23/74 ,  B01J37/0221 ,  B01J37/0225 ,  H01M4/90 ,  C02F1/46109 ,  C02F1/4672 ,  Y02W10/37

摘要： A copper-based oxidation catalyst comprising a substrate of copper or copper alloy and regions of a metal composed mainly of a group VIII element in close contact with the substrate, the surface of the substrate being partly exposed to the outside, has a high catalytic activity on the carbonyl oxidation reaction and is effective as a catalyst for electroless plating, a fuel cell electrode material, a catalyst for treating waste water or waste liquor or an oxidation reaction catalyst.

摘要翻译： 一种铜基氧化催化剂，其包含铜或铜合金的基体以及主要由与基板紧密接触的VIII族元素的金属区域，基板的表面部分地暴露于外部，具有高的催化活性 在羰基氧化反应中，作为无电镀的催化剂，燃料电池电极材料，废水或废液的处理催化剂或氧化反应催化剂是有效的。

公开(公告)号：US5294291A

公开(公告)日：1994-03-15

申请号：US947543

申请日：1992-09-21

申请人： Haruo Akahoshi ,  Toshinari Takada ,  Fujiko Yutani ,  Takeyuki Itabashi ,  Shin Nishimura ,  Satoru Amo ,  Akio Takahashi ,  Rituji Toba ,  Masashi Miyazaki

发明人： Haruo Akahoshi ,  Toshinari Takada ,  Fujiko Yutani ,  Takeyuki Itabashi ,  Shin Nishimura ,  Satoru Amo ,  Akio Takahashi ,  Rituji Toba ,  Masashi Miyazaki

IPC分类号： G03F7/40 ,  H05K3/06 ,  H05K3/10 ,  H05K3/38 ,  B44C1/22 ,  C23F1/00

CPC分类号： H05K3/108 ,  G03F7/40 ,  H05K2203/0285 ,  H05K2203/0392 ,  H05K2203/072 ,  H05K2203/0769 ,  H05K2203/0783 ,  H05K2203/0789 ,  H05K2203/1476 ,  H05K3/062 ,  H05K3/383

摘要： A process is provided for the formation of a conductive circuit pattern on a base metal formed on a substrate. On the base metal, a plating resist is first provided in a pattern corresponding to the circuit to be formed and a circuit pattern is then formed by plating. The plating resist is treated with a stripper and then with a stripping residue remover to cut off chemical bonds in the resist by a dehydrating decomposition reaction. The base metal is treated with an etchant for the base metal, whereby any resist residue still remaining after the treatment with the stripping residue remover is removed and the base metal are etched at areas which were covered by the plating resist.

摘要翻译： 提供了一种在形成在基板上的基底金属上形成导电电路图案的工艺。 在基体金属上，首先以与要形成的电路对应的图案设置电镀抗蚀剂，然后通过电镀形成电路图案。 用剥离剂处理电镀抗蚀剂，然后用汽提残渣去除剂通过脱水分解反应来切断抗蚀剂中的化学键。 用贱金属的蚀刻剂处理贱金属，除去在用剥离残渣去除剂处理后仍然残留的任何抗蚀剂残渣，并在被电镀抗蚀剂覆盖的区域上蚀刻贱金属。

公开(公告)号：US5788821A

公开(公告)日：1998-08-04

申请号：US815068

申请日：1997-03-11

申请人： Takeyuki Itabashi ,  Fujiko Kinosaki ,  Akio Takahashi ,  Haruo Akahoshi

发明人： Takeyuki Itabashi ,  Fujiko Kinosaki ,  Akio Takahashi ,  Haruo Akahoshi

IPC分类号： B01J23/74 ,  B01J37/02 ,  C02F1/461 ,  C02F1/467 ,  C23C18/28 ,  C23C18/40 ,  C25B3/02 ,  H01M4/90

CPC分类号： B01J23/74 ,  B01J37/0221 ,  B01J37/0225 ,  H01M4/90 ,  C02F1/46109 ,  C02F1/4672 ,  Y02W10/37

摘要： A copper-based oxidation catalyst comprising a substrate of copper or copper alloy and regions of a metal composed mainly of a group VIII element in close contact with the substrate, the surface of the substrate being partly exposed to the outside, has a high catalytic activity on the carbonyl oxidation reaction and is effective as a catalyst for electroless plating, a fuel cell electrode material, a catalyst for treating waste water or waste liquor or an oxidation reaction catalyst.

摘要翻译： 一种铜基氧化催化剂，其包含铜或铜合金的基体以及主要由与基板紧密接触的VIII族元素的金属区域，基板的表面部分地暴露于外部，具有高的催化活性 在羰基氧化反应中，作为无电镀的催化剂，燃料电池电极材料，废水或废液的处理催化剂或氧化反应催化剂是有效的。

公开(公告)号：US5595943A

公开(公告)日：1997-01-21

申请号：US495021

申请日：1995-06-27

申请人： Takeyuki Itabashi ,  Haruo Akahoshi ,  Akio Takahashi

发明人： Takeyuki Itabashi ,  Haruo Akahoshi ,  Akio Takahashi

IPC分类号： C23C18/36 ,  C23C18/40 ,  H01L21/288 ,  H01L21/768 ,  H05K3/18 ,  H01L21/28

CPC分类号： C23C18/36 ,  C23C18/405 ,  H01L21/288 ,  H01L21/76877 ,  H05K3/184

摘要： A method for forming a conductor circuit is provided which comprises depositing and filling a conductor metal in recessions of insulator in the form of grooves or holes using an electroless plating solution, the conductor metal being deposited and filled in the recession to the same level as the surface of the insulator, wherein said electroless plating solution contains an inhibitor which inhibits the cathodic partial reaction which is a metal deposition reaction and the electroless plating is carried out with stirring the plating solution. Since the plating reaction automatically stops when the metal conductor 1 is formed up to the level of the surface of the insulator 2, a conductor circuit in which the surface of the metal conductor 1 and that of the insulator 2 are even and at the same level can be easily obtained. Furthermore, since the conductor circuits differing in thickness can be simultaneously formed on one substrate, the number of lamination in making multilayer circuit can be reduced and a multilayer circuit board of low electric resistance can be obtained.

摘要翻译： 提供一种用于形成导体电路的方法，其包括使用化学镀溶液沉积并填充凹槽或孔形式的绝缘体凹陷中的导体金属，将导体金属沉积并填充在与经济衰退相同的水平上 表面，其中所述化学镀溶液含有抑制作为金属沉积反应的阴极部分反应的抑制剂，并且通过搅拌电镀液进行化学镀。 由于当金属导体1形成到绝缘体2的表面的高度时，电镀反应自动停止，其中金属导体1的表面和绝缘体2的表面均匀并处于相同水平的导体电路 可以很容易地获得。 此外，由于可以在一个基板上同时形成厚度不同的导体电路，因此可以减少制造多层电路中的层压次数，并且可以获得低电阻的多层电路板。

公开(公告)号：US5350886A

公开(公告)日：1994-09-27

申请号：US659672

申请日：1991-02-25

申请人： Kunio Miyazaki ,  Yutaka Sugita ,  Akio Mukoh ,  Tadahiko Miyoshi ,  Osamu Miura ,  Akio Takahashi ,  Shunichi Numata ,  Satoru Ogihara ,  Kazuji Yamada ,  Hirokazu Inoue ,  Fumiyuki Kobayashi

发明人： Kunio Miyazaki ,  Yutaka Sugita ,  Akio Mukoh ,  Tadahiko Miyoshi ,  Osamu Miura ,  Akio Takahashi ,  Shunichi Numata ,  Satoru Ogihara ,  Kazuji Yamada ,  Hirokazu Inoue ,  Fumiyuki Kobayashi

IPC分类号： H01L23/538 ,  H05K1/03 ,  H05K3/46 ,  H05K1/00

CPC分类号： H01L23/5385 ,  H05K3/462 ,  H05K3/4629 ,  H01L2924/0002 ,  H05K1/0306 ,  H05K2201/0379 ,  H05K2203/061

摘要： An LSI mounting substrate having a multilayered thin film wiring portion, with the thin film wiring portion being divided into wiring units each composed of a plurality of wiring layers, with the wirings between the units being electrically connected through connecting pads defined in the same surface as that of a surface conductive layer of the unit.

摘要翻译： 一种具有多层薄膜布线部分的LSI安装基板，薄膜布线部分被分成多个布线层的布线单元，各单元之间的布线通过与 该单元的表面导电层的那个。