公开(公告)号：US5852388A

公开(公告)日：1998-12-22

申请号：US901258

申请日：1997-07-28

申请人： Shinya Nakai ,  Masashi Katsumata ,  Yasuyuki Hattori ,  Kenta Nagai ,  Yoshiaki Fukumitsu ,  Takehiko Ishizuka

发明人： Shinya Nakai ,  Masashi Katsumata ,  Yasuyuki Hattori ,  Kenta Nagai ,  Yoshiaki Fukumitsu ,  Takehiko Ishizuka

IPC分类号： H03B1/00 ,  H03B5/12 ,  H03B5/18

CPC分类号： H03B5/1847 ,  H03B5/1203 ,  H03B5/1231 ,  H03B5/124 ,  H03B5/1243 ,  H03B5/1256 ,  H03B5/1293 ,  H03B2200/0024 ,  H03B2200/004 ,  H03B2201/011 ,  H03B2201/012 ,  H03B2201/0208 ,  H03B2201/03

摘要： A voltage controlled oscillator including a resonator which generates an oscillation signal, a frequency of which is in response to a control signal, and an amplifier which amplifies the oscillation signal. Also included is a frequency adjusting mechanism, as well as a voltage control sensitivity mechanism. In one example, the resonator includes an input terminal to which the control signal is applied, a variable capacitance diode and a main inductor. The oscillation frequency adjusting mechanism includes a first variable capacitor, arranged in parallel with the main inductor of the resonator. In addition, the voltage control sensitivity adjusting mechanism includes a second variable capacitor arranged between the input terminal and the amplifying mechanism, and also arranged between a hot terminal of the variable capacitance diode and a hot terminal of the main inductor.

摘要翻译： 一种压控振荡器，包括产生其频率响应于控制信号的振荡信号的谐振器和放大振荡信号的放大器。 还包括频率调节机构以及电压控制灵敏度机构。 在一个示例中，谐振器包括施加控制信号的输入端子，可变电容二极管和主电感器。 振荡频率调节机构包括与谐振器的主电感并联布置的第一可变电容器。 此外，电压控制灵敏度调节机构包括布置在输入端子和放大机构之间的第二可变电容器，并且还布置在可变电容二极管的热端子和主电感器的热端子之间。

公开(公告)号：US20080079146A1

公开(公告)日：2008-04-03

申请号：US11902620

申请日：2007-09-24

申请人： Yasuyuki Hattori ,  Toshikazu Endo ,  Masashi Katsumata ,  Takaaki Morita ,  Kenichi Kawabata

发明人： Yasuyuki Hattori ,  Toshikazu Endo ,  Masashi Katsumata ,  Takaaki Morita ,  Kenichi Kawabata

IPC分类号： H01L23/36

CPC分类号： H01L23/3735 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/16 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/3025 ,  H01L2924/351 ,  H05K1/0206 ,  H05K1/0224 ,  H05K1/0298 ,  H05K1/185 ,  H05K3/0058 ,  H05K2201/09681 ,  H05K2201/09781 ,  H01L2924/00 ,  H01L2224/0401

摘要： A semiconductor-embedded substrate device according to the present invention can relax a thermal stress during fabrication or use and therefore has sufficient heat radiation properties and reliability. A semiconductor-embedded substrate (100) is a multilayer substrate obtained by stacking resin layers and has, inside of the resin layer (2), a semiconductor device (30) having a bump (32) connected to a terminal electrode (11) via an internal wiring (13) and connection plug (12). A heat radiation member (20) having an opening P in which one or more openings H have been formed is arranged immediately above and opposite to the back surface (30b) of the semiconductor device (30) and heat generated therein is transferred to and released from the heat radiation member (20).

摘要翻译： 根据本发明的半导体嵌入式衬底器件可以在制造或使用期间放松热应力，因此具有足够的散热性能和可靠性。 半导体嵌入式基板（100）是通过层叠树脂层而获得的多层基板，并且在树脂层（2）内部具有通过连接到端子电极（11）的具有凸块（32）的半导体装置（30） 内部布线（13）和连接插头（12）。 在半导体装置（30）的背面（30b）的正上方且相对配置有具有形成有一个或多个开口H的开口P的散热构件（20），并且将其中产生的热量转移到 从散热构件（20）释放。

公开(公告)号：US20070075767A1

公开(公告)日：2007-04-05

申请号：US11608609

申请日：2006-12-08

申请人： Toshiyuki Abe ,  Yoshihiro Suzuki ,  Masashi Katsumata

发明人： Toshiyuki Abe ,  Yoshihiro Suzuki ,  Masashi Katsumata

IPC分类号： H03F1/00

CPC分类号： H05K1/0265 ,  H01L2924/1423 ,  H03F3/195 ,  H03F2200/294 ,  H05K1/165 ,  H05K3/243 ,  H05K3/4644 ,  H05K2201/0352 ,  H05K2201/09736 ,  H05K2201/09881 ,  H05K2203/0542

摘要： An inductor element containing circuit board of the present invention comprises a plurality of conductive layers, and a conductor having an inductor function (inductor conductor segment) in one or more of the conductive layers, wherein at least part of the inductor conductor segment is made thicker than other conductors disposed within the circuit board. The at least part of the inductor conductor segment extends through an insulating layer disposed between the conductive layers, or is embedded in the insulating layer, wherein the part of the inductor conductor segment has a thickness one-half or more the thickness of the insulating layer. A power amplifier module of the present invention comprises the multi-layer circuit board, a semiconductor amplifier fabricated in the multi-layer circuit board, and an impedance matching circuit coupled to the output of the semiconductor amplifier. The impedance matching circuit has a portion thereof formed of the inductor conductor segment.

摘要翻译： 本发明的电感器元件电路板包括多个导电层，以及在一个或多个导电层中具有电感器功能（电感器导体段）的导体，其中电感器导体段的至少一部分变厚 而不是设置在电路板内的其它导线。 电感器导体段的至少一部分延伸穿过设置在导电层之间的绝缘层，或者嵌入在绝缘层中，其中电感器导体段的一部分具有绝缘层的厚度的一半或更多的厚度 。 本发明的功率放大器模块包括多层电路板，在多层电路板中制造的半导体放大器和耦合到半导体放大器的输出的阻抗匹配电路。 阻抗匹配电路具有由电感器导体段形成的部分。

公开(公告)号：US07120394B2

公开(公告)日：2006-10-10

申请号：US10702645

申请日：2003-11-07

申请人： Yoshihiro Suzuki ,  Atsushi Ajioka ,  Masashi Katsumata

发明人： Yoshihiro Suzuki ,  Atsushi Ajioka ,  Masashi Katsumata

IPC分类号： H04B1/44

CPC分类号： H04B1/48 ,  H04B1/0475

摘要： A small-sized, front-end module is offered which is for use in a wireless communication device such as a mobile phone and which can suppress harmonics to a sufficiently low level. The front-end module has at least a switching circuit for switching one antenna between a transmiting system and a receiving system, a power amplifier for power-amplifying a transmission signal, and a low-pass filter inserted between the switching circuit and power amplifier. These components are integrated. A first kind of harmonics is produced from the switching circuit toward the power amplifier and reflected by the low-pass filter. A second kind of harmonics is produced from the power amplifier toward the antenna. A third kind of harmonics is produced from the switching circuit toward the antenna. The third kind of harmonics is canceled by the reflected first kind of harmonics and the second kind of harmonics.

摘要翻译： 提供了一种小型的前端模块，其用于诸如移动电话的无线通信设备中，并且可以将谐波抑制到足够低的水平。 前端模块至少具有用于在发送系统和接收系统之间切换一个天线的开关电路，用于对发送信号进行功率放大的功率放大器以及插入在开关电路和功率放大器之间的低通滤波器。 这些组件是集成的。 第一种谐波从开关电路产生到功率放大器并被低通滤波器反射。 从功率放大器向天线产生第二种谐波。 从开关电路向天线产生第三种谐波。 第三种谐波被反射的第一种谐波和第二种谐波消除。

公开(公告)号：US20060057341A1

公开(公告)日：2006-03-16

申请号：US11229394

申请日：2005-09-15

申请人： Kenichi Kawabata ,  Hisayuki Abe ,  Masashi Katsumata

发明人： Kenichi Kawabata ,  Hisayuki Abe ,  Masashi Katsumata

IPC分类号： B32B3/00 ,  C25D5/02

CPC分类号： H05K1/0265 ,  C25D5/022 ,  H05K3/0032 ,  H05K3/06 ,  H05K3/064 ,  H05K3/107 ,  H05K3/108 ,  H05K3/20 ,  H05K3/243 ,  H05K3/421 ,  H05K3/4652 ,  H05K2201/0355 ,  H05K2201/0376 ,  H05K2201/0394 ,  H05K2201/09036 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09736 ,  H05K2203/0384 ,  H05K2203/0542 ,  H05K2203/1476 ,  Y10T428/24917

摘要： A multilayer substrate according to the present invention includes a plurality of laminated insulating layers and conductive patterns formed between the respective insulating layers. The conductive patterns include a first conductive pattern having a predetermined thickness and a second conductive pattern thicker than the first conductive pattern. The first and second conductive patterns are located in the same layer. The first conductive pattern is formed by pattern-etching a conductive layer having a uniform thickness by the subtractive method. The second conductive pattern is formed by forming a pattern-forming groove and then filling the inside of the pattern-forming groove with a conductive material simultaneously with forming a via hole. The first conductive pattern is suitable for an LC pattern for a high-frequency circuit requiring small variations in the width and the thickness of the pattern as well as accuracy in the thickness relative to an insulating pattern, and for a normal conductive pattern requiring impedance matching. The second conductive pattern is suitable for an L pattern for a choke coil.

摘要翻译： 根据本发明的多层基板包括多个层叠绝缘层和形成在各绝缘层之间的导电图案。 导电图案包括具有预定厚度的第一导电图案和比第一导电图案更厚的第二导电图案。 第一和第二导电图案位于同一层中。 通过减法法对具有均匀厚度的导电层进行图案蚀刻来形成第一导电图案。 第二导电图案通过形成图案形成槽，然后在形成通孔的同时用导电材料填充图案形成槽的内部而形成。 第一导电图案适用于要求图案的宽度和厚度的小变化以及相对于绝缘图案的厚度精度的高频电路的LC图案，以及需要阻抗匹配的正常导电图案 。 第二导电图案适用于扼流线圈的L图案。

公开(公告)号：US07868464B2

公开(公告)日：2011-01-11

申请号：US11229394

申请日：2005-09-15

申请人： Kenichi Kawabata ,  Hisayuki Abe ,  Masashi Katsumata

发明人： Kenichi Kawabata ,  Hisayuki Abe ,  Masashi Katsumata

IPC分类号： H01L23/485

CPC分类号： H05K1/0265 ,  C25D5/022 ,  H05K3/0032 ,  H05K3/06 ,  H05K3/064 ,  H05K3/107 ,  H05K3/108 ,  H05K3/20 ,  H05K3/243 ,  H05K3/421 ,  H05K3/4652 ,  H05K2201/0355 ,  H05K2201/0376 ,  H05K2201/0394 ,  H05K2201/09036 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09736 ,  H05K2203/0384 ,  H05K2203/0542 ,  H05K2203/1476 ,  Y10T428/24917

摘要： A multilayer substrate according to the present invention includes a plurality of laminated insulating layers and conductive patterns formed between the respective insulating layers. The conductive patterns include a first conductive pattern having a predetermined thickness and a second conductive pattern thicker than the first conductive pattern. The first and second conductive patterns are located in the same layer. The first conductive pattern is formed by pattern-etching a conductive layer having a uniform thickness by the subtractive method. The second conductive pattern is formed by forming a pattern-forming groove and then filling the inside of the pattern-forming groove with a conductive material simultaneously with forming a via hole. The first conductive pattern is suitable for an LC pattern for a high-frequency circuit requiring small variations in the width and the thickness of the pattern as well as accuracy in the thickness relative to an insulating pattern, and for a normal conductive pattern requiring impedance matching. The second conductive pattern is suitable for an L pattern for a choke coil.

摘要翻译： 根据本发明的多层基板包括多个层叠绝缘层和形成在各绝缘层之间的导电图案。 导电图案包括具有预定厚度的第一导电图案和比第一导电图案更厚的第二导电图案。 第一和第二导电图案位于同一层中。 通过减法法对具有均匀厚度的导电层进行图案蚀刻来形成第一导电图案。 第二导电图案通过形成图案形成槽，然后在形成通孔的同时用导电材料填充图案形成槽的内部而形成。 第一导电图案适用于要求图案的宽度和厚度的小变化以及相对于绝缘图案的厚度精度的高频电路的LC图案，以及需要阻抗匹配的正常导电图案 。 第二导电图案适用于扼流线圈的L图案。

公开(公告)号：US07812444B2

公开(公告)日：2010-10-12

申请号：US11521156

申请日：2006-09-14

申请人： Masashi Katsumata ,  Kenichi Kawabata ,  Toshikazu Endo

发明人： Masashi Katsumata ,  Kenichi Kawabata ,  Toshikazu Endo

IPC分类号： H01L23/34

CPC分类号： H01L25/18 ,  H01L23/5386 ,  H01L24/24 ,  H01L24/25 ,  H01L24/82 ,  H01L25/0655 ,  H01L2224/24137 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/0216 ,  H05K1/0218 ,  H05K1/0231 ,  H05K1/0233 ,  H05K1/0298 ,  H05K1/0373 ,  H05K1/185 ,  H05K3/4688 ,  H05K2201/0715 ,  H05K2201/086 ,  H05K2201/09236 ,  H05K2201/09245 ,  H05K2201/09618 ,  H05K2201/10015 ,  H05K2201/10022 ,  H05K2201/1003 ,  H05K2201/10674

摘要： A semiconductor IC-embedded module 100 comprises a multilayer substrate 101 having first and second insulating layers 101a and 101b, and a controller IC 012 and memory IC 103 that are embedded in the multilayer substrate 101. A wiring layer 104 is formed as an internal layer in the multilayer substrate 101. Part of the wiring layer 104 constitutes a bus line 104X. The controller IC 102 or memory IC 103 is embedded in the second insulating layer 101b. First and second ground layers 105a and 105b are provided respectively in the first and second insulating layers 101a and 101b. The effect of noise generated by bus lines is reduced, and an additional reduction in noise and a decrease in size and thickness are achieved by laying out bus lines that connect the semiconductor ICs so that distances are minimized.

摘要翻译： 半导体IC嵌入式模块100包括具有嵌入在多层基板101中的第一绝缘层101a和第二绝缘层101b以及控制器IC 012和存储器IC 103的多层基板101.布线层104形成为内层 在多层基板101中。布线层104的一部分构成总线104X。 控制器IC 102或存储器IC 103嵌入在第二绝缘层101b中。 第一和第二接地层105a和105b分别设置在第一和第二绝缘层101a和101b中。 由总线产生的噪声的影响减小，通过布置连接半导体IC的总线，使得距离最小化，可以实现额外的噪声降低和尺寸和厚度的减小。

公开(公告)号：US07176756B2

公开(公告)日：2007-02-13

申请号：US11010327

申请日：2004-12-14

申请人： Toshiyuki Abe ,  Yoshihiro Suzuki ,  Masashi Katsumata

发明人： Toshiyuki Abe ,  Yoshihiro Suzuki ,  Masashi Katsumata

IPC分类号： H03F1/00 ,  H05K1/00

CPC分类号： H05K1/0265 ,  H01L2924/1423 ,  H03F3/195 ,  H03F2200/294 ,  H05K1/165 ,  H05K3/243 ,  H05K3/4644 ,  H05K2201/0352 ,  H05K2201/09736 ,  H05K2201/09881 ,  H05K2203/0542

摘要： An inductor element containing circuit board of the present invention comprises a plurality of conductive layers, and a conductor having an inductor function (inductor conductor segment) in one or more of the conductive layers, wherein at least part of the inductor conductor segment is made thicker than other conductors disposed within the circuit board. The at least part of the inductor conductor segment extends through an insulating layer disposed between the conductive layers, or is embedded in the insulating layer, wherein the part of the inductor conductor segment has a thickness one-half or more the thickness of the insulating layer. A power amplifier module of the present invention comprises the multi-layer circuit board, a semiconductor amplifier fabricated in the multi-layer circuit board, and an impedance matching circuit coupled to the output of the semiconductor amplifier. The impedance matching circuit has a portion thereof formed of the inductor conductor segment.

摘要翻译： 本发明的电感器元件电路板包括多个导电层，以及在一个或多个导电层中具有电感器功能（电感器导体段）的导体，其中电感器导体段的至少一部分变厚 而不是设置在电路板内的其它导线。 电感器导体段的至少一部分延伸穿过设置在导电层之间的绝缘层，或者嵌入在绝缘层中，其中电感器导体段的一部分具有绝缘层的厚度的一半或更多的厚度 。 本发明的功率放大器模块包括多层电路板，在多层电路板中制造的半导体放大器和耦合到半导体放大器的输出的阻抗匹配电路。 阻抗匹配电路具有由电感器导体段形成的部分。

公开(公告)号：US06373714B1

公开(公告)日：2002-04-16

申请号：US09412757

申请日：1999-10-05

申请人： Kazuo Kudoh ,  Masashi Katsumata

发明人： Kazuo Kudoh ,  Masashi Katsumata

IPC分类号： H05K702

CPC分类号： H05K1/145 ,  H05K1/141 ,  H05K3/3442 ,  H05K3/368 ,  H05K2201/09181 ,  H05K2201/10371 ,  H05K2201/10636 ,  Y02P70/611

摘要： The present invention is to provide a surface mounting part, capable of corresponding to high density mounting of a mother board and capable of achieving a small size, to be mounted on a mother board by reflow. Electronic parts are mounted on both sides of a printed board. Terminal electrodes of the electronic parts mounted on the rear side are provided as terminals for connecting with the mother board.

摘要翻译： 本发明提供一种表面安装部件，其能够对应于母板的高密度安装并且能够实现小尺寸，以通过回流安装在母板上。 电子部件安装在印刷电路板的两侧。 安装在后侧的电子部件的端子电极被设置为用于与母板连接的端子。

公开(公告)号：US4972191A

公开(公告)日：1990-11-20

申请号：US385593

申请日：1989-07-24

申请人： Ken Ishino ,  Taro Miura ,  Takashi Watanabe ,  Masashi Katsumata

发明人： Ken Ishino ,  Taro Miura ,  Takashi Watanabe ,  Masashi Katsumata

IPC分类号： G12B17/02 ,  E04B1/92 ,  G01R29/08 ,  G01R29/10 ,  H01Q17/00 ,  H05K9/00

CPC分类号： G01R29/105 ,  H01Q17/00

摘要： A flat wave absorber having a conductive plate, a dielectric plate on the conductive plate, and, a ferrite plate on said dielectric plate, provides a wide operational frequency range from 30 MHz to 1 GHz with excellent attenuation characteristics, and an anechoic chamber mounting said wave absorber on inside surface of the chamber is provided. Thickness of said dielectric plate is less than 25 mm, the thickness of said ferrite plate is less than 7.5 mm, and real part of complex impedance of said ferrite plate on the conductive plate is less than 1.0 and close to 1.0. Said ferrite plate is attached to said dielectric plate in the form of tiles.