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1.发明授权公开(公告)号：US12027350B2
公开(公告)日：2024-07-02
申请号：US17004432
申请日：2020-08-27
Inventor： Jing-Cheng Liao , Chang-Ming Wu , Lee-Chuan Tseng
IPC: H01L21/02 , C23C16/44 , H01J37/32 , H01L21/3065 , H01L21/3213 , H01L21/683
CPC classification number: H01J37/32862 , C23C16/4405 , H01J37/3244 , H01L21/02271 , H01L21/3065 , H01L21/32136 , H01J2237/334 , H01J2237/335 , H01L21/6831
Abstract: In some embodiments, a method for cleaning a processing chamber is provided. The method may be performed by introducing a processing gas into a processing chamber that has a by-product disposed along sidewalls of the processing chamber. A plasma is generated from the processing gas using a radio frequency signal. A lower electrode is connected to a first electric potential. Concurrently, a bias voltage having a second electric potential is applied to a sidewall electrode to induce ion bombardment of the by-product, in which the second electric potential has a larger magnitude than the first electric potential. The processing gas is evacuated from the processing chamber.
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公开(公告)号：US09878899B2
公开(公告)日：2018-01-30
申请号：US14873243
申请日：2015-10-02
Inventor： Lee-Chuan Tseng , Chang-Ming Wu , Shih-Chang Liu , Yuan-Chih Hsieh
CPC classification number: B81B3/001 , B81C1/0092 , B81C1/00936 , B81C1/00944 , B81C1/00952 , B81C1/0096 , B81C1/00984 , B81C1/00992 , B81C2201/0132 , B81C2201/056
Abstract: The present disclosure involves forming a method of fabricating a Micro-Electro-Mechanical System (MEMS) device. A plurality of openings is formed in a first side of a first substrate. A dielectric layer is formed over the first side of the substrate. A plurality of segments of the dielectric layer fills the openings. The first side of the first substrate is bonded to a second substrate that contains a cavity. The bonding is performed such that the segments of the dielectric layer are disposed over the cavity. A portion of the first substrate disposed over the cavity is transformed into a plurality of movable components of a MEMS device. The movable components are in physical contact with the dielectric the layer. Thereafter, a portion of the dielectric layer is removed without using liquid chemicals.
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公开(公告)号：US09293303B2
公开(公告)日：2016-03-22
申请号：US14015556
申请日：2013-08-30
Inventor： Ping-Yin Liu , Xin-Hua Huang , Lee-Chuan Tseng , Lan-Lin Chao
IPC: H01J37/32 , H01L21/3065 , C23C16/455
CPC classification number: H01J37/32834 , C23C16/45565 , C23C16/50 , C23C16/52 , H01J37/3244 , H01J37/32449 , H01J37/32568 , H01J37/32853 , H01J37/32862 , H01J37/32917 , H01J37/32972 , H01L21/3065 , H01L21/67017
Abstract: An embodiment low contamination chamber includes a gas inlet, an adjustable top electrode, an adjustable bottom electrode, and an outlet. The chamber is configured to adjust a distance between the adjustable top and bottom electrodes in accordance with a desired density of plasma disposed between the top electrode and the bottom electrode.
Abstract translation: 一个实施方案的低污染室包括气体入口，可调顶部电极，可调底部电极和出口。 腔室被配置为根据设置在顶部电极和底部电极之间的等离子体的期望密度来调整可调节顶部和底部电极之间的距离。
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4.发明公开公开(公告)号：US20240331988A1
公开(公告)日：2024-10-03
申请号：US18675236
申请日：2024-05-28
Inventor： Jing-Cheng Liao , Chang-Ming Wu , Lee-Chuan Tseng
IPC: H01J37/32 , C23C16/44 , H01L21/02 , H01L21/3065 , H01L21/3213 , H01L21/683
CPC classification number: H01J37/32862 , C23C16/4405 , H01J37/3244 , H01L21/02271 , H01L21/3065 , H01L21/32136 , H01J2237/334 , H01J2237/335 , H01L21/6831
Abstract: In some embodiments, the present disclosure relates to a semiconductor processing apparatus. The semiconductor processing apparatus includes an electrostatic chuck disposed within an interior cavity of a processing chamber and a lower electrode disposed in the interior cavity below the electrostatic chuck. A first sidewall electrode is adjacent to a sidewall of the processing chamber and is outside of the processing chamber. The first sidewall electrode vertically extends from below a top of the electrostatic chuck to a top of the interior cavity of the processing chamber. A first sidewall voltage generator is electrically coupled to the first sidewall electrode and a power generator is electrically coupled to the lower electrode.
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公开(公告)号：US12094989B2
公开(公告)日：2024-09-17
申请号：US18350813
申请日：2023-07-12
Inventor： Chih-Ming Chen , Lee-Chuan Tseng , Ming Chyi Liu , Po-Chun Liu
IPC: H01L31/0352 , H01L31/02 , H01L31/0216 , H01L31/028 , H01L31/0312 , H01L31/103 , H01L31/105 , H01L31/18
CPC classification number: H01L31/035281 , H01L31/02005 , H01L31/02019 , H01L31/02161 , H01L31/028 , H01L31/0312 , H01L31/103 , H01L31/1037 , H01L31/105 , H01L31/1808 , H01L31/1812 , Y02E10/547
Abstract: Some embodiments relate to an integrated circuit (IC) disposed on a silicon substrate, which includes a well region having a first conductivity type. An epitaxial pillar of SiGe or Ge extends upward from the well region. The epitaxial pillar includes a lower epitaxial region having the first conductivity type and an upper epitaxial region having a second conductivity type, which is opposite the first conductivity type. A dielectric layer is arranged over an upper surface of the substrate and is disposed around the lower epitaxial region to extend over outer edges of the well region. The dielectric layer has inner sidewalls that contact outer sidewalls of the epitaxial pillar. A dielectric sidewall structure has a bottom surface that rests on an upper surface of the dielectric layer and has inner sidewalls that extend continuously from the upper surface of the dielectric layer to a top surface of the epitaxial pillar.
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Patent Agency Ranking
公开(公告)号：US20240266196A1
公开(公告)日：2024-08-08
申请号：US18640118
申请日：2024-04-19
Inventor： Lee-Chuan Tseng
CPC classification number: H01L21/67265 , B65G47/905 , G01V8/12
Abstract: A method includes generating a first beam of radiation toward a first slot of a workpiece carrier. The first beam of radiation has a first beam area that is greater than or equal to an area of an opening of the first slot. The method further includes measuring a reflected portion of the first beam of radiation that is reflected toward, and impinges on, a radiation sensor. The method further includes determining if the first slot of the workpiece carrier is holding a workpiece based on the measured reflected portion of the first beam of radiation.
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公开(公告)号：US20230369024A1
公开(公告)日：2023-11-16
申请号：US18357370
申请日：2023-07-24
Inventor： Te-Hsien Hsieh , Lee-Chuan Tseng
IPC: H01J37/32 , H01L21/3213 , H01L21/3065 , C23C14/02 , H01L21/311 , C23C14/58 , C23C16/02 , H01L21/687 , C23C14/46
CPC classification number: H01J37/32633 , C23C14/022 , C23C14/46 , C23C14/5873 , C23C16/0245 , H01J37/32431 , H01J37/32449 , H01J37/32522 , H01J37/32715 , H01J37/32724 , H01J37/32834 , H01J37/32871 , H01L21/3065 , H01L21/31116 , H01L21/32136 , H01L21/68785 , C23C14/564
Abstract: In some embodiments, the present disclosure relates to a method of performing an etching process. The method includes generating a plasma within a plasma chamber in communication with a processing chamber. Ions from the plasma are accelerated toward a workpiece within the processing chamber to generate an ion beam. The ion beam performs an etching process that etches a material on the workpiece. A by-product from the etching process is moved to directly below one or more baffles within the processing chamber.
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公开(公告)号：US20240021513A1
公开(公告)日：2024-01-18
申请号：US18149783
申请日：2023-01-04
Inventor： Yung-Chang Chang , Lee-Chuan Tseng , Chia-Hua Lin , Shu-Hui Su
IPC: H01L23/522 , H01L21/768
CPC classification number: H01L23/5223 , H01L23/5226 , H01L21/76832 , H01L28/40
Abstract: Various embodiments of the present disclosure are directed towards an integrated circuit (IC) including a plurality of conductive contacts overlying a semiconductor substrate. A plurality of first conductive wires is disposed on the plurality of conductive contacts. A plurality of conductive vias overlies the first conductive wires. An etch stop structure is disposed on the first conductive wires. The plurality of conductive vias extend through the etch stop structure. The etch stop structure includes a first etch stop layer, a first insulator layer, and a second etch stop layer. The first insulator layer is disposed between the first etch stop layer and the second etch stop layer.
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公开(公告)号：US20210331915A1
公开(公告)日：2021-10-28
申请号：US17371502
申请日：2021-07-09
Inventor： Lee-Chuan Tseng , Yuan-Chih Hsieh
Abstract: A system includes a semiconductor substrate having a first cavity. The semiconductor substrate forms a pedestal adjacent the first cavity. A device overlays the pedestal and is bonded to the semiconductor substrate by metal within the first cavity. A plurality of second cavities are formed in a surface of the pedestal beneath the device, wherein the second cavities are smaller than the first cavity. In some of these teachings, the second cavities are voids. In some of these teachings, the metal in the first cavity comprises a eutectic mixture. The structure relates to a method of manufacturing in which a layer providing a mask to etch the first cavity is segmented to enable easy removal of the mask-providing layer from the area over the pedestal.
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公开(公告)号：US10522429B2
公开(公告)日：2019-12-31
申请号：US15088127
申请日：2016-04-01
Inventor： Lee-Chuan Tseng , Chang-Ming Wu
IPC: H01L21/66 , B81C99/00 , B81C1/00 , H01L21/3065 , H01J37/32
Abstract: A method of manufacturing a semiconductor device is provided. The method includes the following operations. (a) A substrate is patterned. (b) A polymer layer is formed on the patterned substrate. (c) The polymer layer is patterned. Steps (a), (b) and (c) are repeated alternatingly. An intensity of an emission light generated by a reaction of a plasma and a product produced in steps (a), (b) and (c) is detected. An endpoint in patterning the substrate is determined according to the intensity of the emission light generated by the reaction of the plasma and the product produced in only one step of steps (a), (b) and (c). A sampling rate of the intensity is ranged from 1 pt/20 ms to 1 pt/100 ms. A smooth function is used to process the intensity of the emission light generated by the reaction of the plasma and the product.
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