公开(公告)号：US20240276632A1

公开(公告)日：2024-08-15

申请号：US18625063

申请日：2024-04-02

申请人： CelLink Corporation

发明人： Kevin Michael Coakley ,  Malcolm Parker Brown ,  Dongao Yang ,  Michael Lawrence Miller ,  Paul Henry Lego

IPC分类号： H05K1/02 ,  H01M50/519 ,  H05K1/11 ,  H05K3/00 ,  H05K3/04 ,  H05K3/06 ,  H05K3/20 ,  H05K3/28 ,  H05K3/44 ,  H05K3/46

CPC分类号： H05K1/0201 ,  H01M50/519 ,  H05K1/118 ,  H05K3/007 ,  H05K3/0073 ,  H05K3/06 ,  H05K3/20 ,  H05K3/281 ,  H05K3/4623 ,  H05K3/046 ,  H05K3/064 ,  H05K3/44 ,  H05K3/445 ,  H05K2201/0145 ,  H05K2201/015 ,  H05K2201/0154 ,  H05K2201/10037 ,  H05K2203/066 ,  Y02E60/10 ,  Y10T29/49156

摘要： A method of forming a flexible interconnect circuit is described. A method may involve laminating a substrate to a conductive layer followed by patterning the conductive layer. This patterning operation forms individual conductive portions, which may be also referred to as traces or conductive islands. The substrate supports these portions relative to each other during and after patterning. After patterning, an insulator may be laminated to the exposed surface of the patterned conductive layer. At this point, the conductive layer portions are also supported by the insulator, and the substrate may optionally be removed, e.g., together with undesirable portions of the conductive layer. Alternatively, the substrate may be retained as a component of the circuit and the undesirable portions of the patterned conductive layer may be removed separately. These approaches allow using new patterning techniques as well as new materials for substrates and/or insulators.

公开(公告)号：US20240260187A1

公开(公告)日：2024-08-01

申请号：US18423833

申请日：2024-01-26

申请人： SHINKO ELECTRIC INDUSTRIES CO., LTD.

发明人： Hiroshi YOKOTA

IPC分类号： H05K1/11 ,  H05K3/06 ,  H05K3/24

CPC分类号： H05K1/113 ,  H05K3/062 ,  H05K3/067 ,  H05K3/244 ,  H05K2201/0338 ,  H05K2201/0347 ,  H05K2201/099

摘要： A wiring board includes an insulating layer, first and second pads provided on the insulating layer and including a first surface in contact with the insulating layer, a second surface opposite to the first surface, and a side surface connecting the first and second surfaces, respectively, and a protective insulating layer provided above the insulating layer. The first and second pads have a portion exposed inside an opening in the protective insulating layer. The first pad has a portion opposing the second pad without the protective insulating layer interposed between the first and second pads. A region of the second surface of the first and second pads exposed from the protective insulating layer is covered with a plating layer. A region of the side surface of the first and second pads exposed from the protective insulating layer is exposed from the plating layer.

公开(公告)号：US20240260185A1

公开(公告)日：2024-08-01

申请号：US18017902

申请日：2022-02-24

申请人： BOE Technology Group Co., Ltd.

发明人： Jiaxiang Zhang ,  Nianqi Yao ,  Ke Wang

IPC分类号： H05K1/11 ,  H01L21/48 ,  H01L23/498 ,  H01L25/075 ,  H01L25/16 ,  H01L27/12 ,  H05K1/09 ,  H05K1/18 ,  H05K3/06

CPC分类号： H05K1/111 ,  H01L21/4846 ,  H01L23/49838 ,  H01L27/124 ,  H05K3/067 ,  H01L23/49866 ,  H01L25/0753 ,  H01L25/167 ,  H05K1/09 ,  H05K1/181 ,  H05K2201/10106 ,  H05K2201/10151

摘要： A circuit board and a method for manufacturing the circuit board, a functional backplate, a backlight module, a display apparatus, and a display panel are provided. The circuit board includes: a base substrate; a wire arranged on the base substrate, where the wire includes a first conductive layer; and at least one insulating layer arranged on a side of the first conductive layer away from the base substrate, where the at least one insulating layer covers the first conductive layer. The first conductive layer includes a first stacked structure on a side away from the base substrate and a second stacked structure proximate to the base substrate, and the first stacked structure includes at least an etch stop layer covering the second stacked structure.

公开(公告)号：US12035481B2

公开(公告)日：2024-07-09

申请号：US17878288

申请日：2022-08-01

申请人： NICHIA CORPORATION

发明人： Masakazu Sakamoto

IPC分类号： H05K3/06 ,  H05K1/05 ,  H05K1/18 ,  H05K3/46

CPC分类号： H05K3/06 ,  H05K1/05 ,  H05K1/181 ,  H05K3/4644 ,  H05K2201/10113

摘要： A method for manufacturing a circuit board includes: preparing a first substrate and a second substrate, wherein: the first substrate comprises a convex post member formed at a top surface of the first substrate, and the second substrate including a first surface and a second surface opposite to the first surface, and comprising: a first metal layer formed on at least the first surface, and an opening through which a top surface of the post member is uncovered in a plan view; bonding at least a portion of a top surface of the first substrate excluding the post member and the second surface of the second substrate so that the top surface of the post member is uncovered through the opening; and forming a circuit pattern by removing a first portion of the first metal layer.

公开(公告)号：US20240206062A1

公开(公告)日：2024-06-20

申请号：US18565613

申请日：2022-06-27

申请人： Lotte Energy Materials Corporation

发明人： Chang Yol YANG ,  Won Jin BEOM ,  Hyung Cheol KIM ,  Kideok SONG

IPC分类号： H05K1/09 ,  H05K3/06

CPC分类号： H05K1/09 ,  H05K3/062 ,  H05K2201/0338 ,  H05K2201/0344 ,  H05K2201/0355 ,  H05K2203/0323 ,  H05K2203/0353 ,  H05K2203/0384

摘要： Disclosed are an ultra-thin copper foil with a carrier foil and a method for manufacturing an embedded substrate by using the same, the ultra-thin copper foil with a carrier foil including: a carrier foil; a non-etching release layer on the carrier foil; a first ultra-thin copper foil layer on the non-etching release layer; an etch stop layer on the first ultra-thin copper foil layer; and a second ultra-thin copper foil layer on the etch stop layer.

公开(公告)号：US12004307B2

公开(公告)日：2024-06-04

申请号：US17342626

申请日：2021-06-09

申请人： International Business Machines Corporation

发明人： Colin Edward Masterson ,  John R. Dangler ,  Tory Johnson ,  Austin Carter ,  Gunnar Mills

IPC分类号： H05K3/22 ,  H05K3/06

CPC分类号： H05K3/225 ,  H05K3/064 ,  H05K3/068 ,  H05K2203/0126 ,  H05K2203/0746 ,  H05K2203/0753 ,  H05K2203/0766 ,  H05K2203/175

摘要： Embodiments are directed to short and/or near short etch rework. A microfluidic device is positioned on a portion of a circuit having a defect. The microfluidic device is caused to dispense etchant that removes the defect of the circuit, where a flow of the etchant is controlled to access the portion of the circuit having the defect to thereby etch away the defect, the flow of the etchant being obstructed from accessing other portions of the circuit. The microfluidic device is used to extract the etchant from the portion of the circuit such that the etchant avoids contact with the other portions of the circuit. The microfluidic device is removed from the circuit.

公开(公告)号：US12004304B2

公开(公告)日：2024-06-04

申请号：US17442373

申请日：2020-03-17

申请人： MITSUI MINING & SMELTING CO., LTD.

发明人： Yoshinori Shimizu ,  Hiroto Iida ,  Misato Mizoguchi ,  Akitoshi Takanashi ,  Makoto Hosokawa

IPC分类号： H05K3/06 ,  C23C18/16 ,  C23C28/02 ,  C25D5/02 ,  C25D7/00 ,  G03F7/20 ,  G03F7/42

CPC分类号： H05K3/064 ,  C23C18/1646 ,  C23C18/1689 ,  C23C28/023 ,  C25D5/022 ,  C25D7/00 ,  G03F7/20 ,  G03F7/42 ,  H05K2203/072 ,  H05K2203/0723 ,  H05K2203/1152

摘要： There is provided a method for manufacturing a printed wiring board that effectively suppresses pattern failure and is also excellent in fine circuit forming properties. This method includes: providing an insulating substrate including a roughened surface; performing electroless plating on the roughened surface of the insulating substrate to form an electroless plating layer less than 1.0 μm thick having a surface having an arithmetic mean waviness Wa of 0.10 μm or more and 0.25 μm or less as measured in accordance with JIS B0601-2001 and a kurtosis Sku of 2.0 or more and 3.5 or less as measured in accordance with ISO 25178; laminating a photoresist on the surface of the electroless plating layer; performing exposure and development to form a resist pattern; applying electroplating to the electroless plating layer; stripping the resist pattern; and etching away an unnecessary portion of the electroless plating layer to form a wiring pattern.

公开(公告)号：US11991836B2

公开(公告)日：2024-05-21

申请号：US18102060

申请日：2023-01-26

申请人： Board of Regents, The University of Texas System

发明人： Romil Modi ,  Jonathan Reeder ,  Gregory T. Ellson ,  Walter E. Voit ,  Alexandra Joshi Imre

IPC分类号： H05K1/09 ,  H05K1/11 ,  H05K3/00 ,  H05K3/04 ,  H05K3/06 ,  H05K3/12 ,  H05K3/40 ,  H01L21/033 ,  H05K1/03 ,  H05K3/34

CPC分类号： H05K3/4007 ,  H05K1/09 ,  H05K1/111 ,  H05K3/0041 ,  H05K3/048 ,  H05K3/064 ,  H05K3/067 ,  H05K3/1216 ,  H05K3/1225 ,  H01L21/0331 ,  H05K1/0393 ,  H05K3/1283 ,  H05K3/3463 ,  H05K2203/043 ,  H05K2203/087 ,  H05K2203/166

摘要： An electrical device, comprising a softening polymer layer, an electrode layer on a surface of the softening polymer layer and a cover polymer layer on the surface of the softening polymer layer. An opening in the polymer cover layer is filled with a reflowed solder, one end of the reflowed solder, located inside the opening, contacts a contact pad site portion of the electrode layer, and another end of the reflowed solder contacts an electrical connector electrode of the device.

公开(公告)号：US11985762B2

公开(公告)日：2024-05-14

申请号：US17157695

申请日：2021-01-25

申请人： UBE EXSYMO CO., LTD.

发明人： Eisuke Tachibana ,  Taro Suzuki ,  Makoto Totani ,  Kouji Kondoh ,  Eijirou Miyagawa ,  Junya Kasahara ,  Takao Arima

IPC分类号： B32B15/08 ,  B29C43/48 ,  B29C48/88 ,  B32B3/08 ,  B32B7/04 ,  B32B7/06 ,  B32B15/088 ,  B32B15/09 ,  B32B15/098 ,  B32B15/18 ,  B32B15/20 ,  B32B27/28 ,  B32B27/36 ,  B32B27/42 ,  B32B37/06 ,  B32B37/08 ,  B32B37/10 ,  H05K1/03 ,  H05K1/09 ,  H05K1/11 ,  H05K3/02 ,  H05K3/46 ,  B65G15/12 ,  H05K3/06 ,  H05K3/22

CPC分类号： H05K1/0393 ,  B29C48/9145 ,  B32B3/08 ,  B32B7/04 ,  B32B7/06 ,  B32B15/08 ,  B32B15/088 ,  B32B15/09 ,  B32B15/098 ,  B32B15/18 ,  B32B15/20 ,  B32B27/28 ,  B32B27/281 ,  B32B27/283 ,  B32B27/36 ,  B32B27/42 ,  B32B37/06 ,  B32B37/08 ,  B32B37/10 ,  B32B37/1027 ,  H05K1/09 ,  H05K1/115 ,  H05K3/022 ,  H05K3/4655 ,  B29C43/48 ,  B32B2250/02 ,  B32B2250/03 ,  B32B2250/40 ,  B32B2307/30 ,  B32B2307/302 ,  B32B2307/306 ,  B32B2307/50 ,  B32B2307/538 ,  B32B2307/546 ,  B32B2307/732 ,  B32B2307/734 ,  B32B2307/748 ,  B32B2309/02 ,  B32B2309/04 ,  B32B2405/00 ,  B32B2457/08 ,  B32B2457/20 ,  B65G15/12 ,  H05K3/067 ,  H05K3/227 ,  H05K2201/0141 ,  H05K2201/0191 ,  H05K2201/068 ,  H05K2203/066 ,  H05K2203/1194 ,  H05K2203/1545

摘要： A flexible laminated sheet manufacturing method includes thermocompression-bonding an insulation film formed of a liquid crystal polymer onto a metal foil between endless belts to form a flexible laminated sheet. The thermocompression bonding includes heating the flexible laminated sheet so that the maximum temperature of the sheet is in the range from a temperature that is 45° C. lower than the melting point of the liquid crystal polymer to a temperature that is 5° C. lower than the melting point. The thermocompression bonding also includes slowly cooling the flexible laminated sheet so that an exit temperature, which is a temperature of the sheet when transferred out of the endless belts, is in the range from a temperature that is 235° C. lower than the melting point of the liquid crystal polymer to a temperature that is 100° C. lower than the melting point.

公开(公告)号：US20240134277A1

公开(公告)日：2024-04-25

申请号：US18262276

申请日：2022-12-21

申请人： Resonac Corporation

发明人： Yuta DAIJIMA ,  Shuji NOMOTO ,  Akihiro NAKAMURA ,  Naomitsu KOMORI

IPC分类号： G03F7/033 ,  G03F7/028 ,  H05K3/06 ,  H05K3/12

CPC分类号： G03F7/033 ,  G03F7/028 ,  H05K3/064 ,  H05K3/1283 ,  H05K2203/0582

摘要： A photosensitive resin composition according to the present disclosure, contains an acid-modified vinyl group-containing resin (A), a thermosetting resin (B), a photopolymerization initiator (C), and a photopolymerizable compound (D), in which the photopolymerizable compound includes a photopolymerizable compound having a polyoxyalkylene chain and an ethylenically unsaturated group.