公开(公告)号：WO2007089206A1

公开(公告)日：2007-08-09

申请号：PCT/SE2007/050052

申请日：2007-01-31

Applicant: SILEX MICROSYSTEMS AB ,  KÄLVESTEN, Edvard ,  BAUER, Tomas

Inventor： KÄLVESTEN, Edvard ,  BAUER, Tomas

IPC: H01L21/768 ,  H01L23/48 ,  H01L21/283 ,  H01L23/522

CPC classification number: H01L23/49827 ,  H01L21/76898 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48237 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/12043 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: The invention relates to a method of providing a planar substrate with electrical through connections (vias). The method comprises providing a hole in said substrate and a treatment to render the substrate surface exhibiting a lower wettability than the walls inside the hole. The planar substrate is exposed to a molten material with low resistivity, whereby the molten material is drawn into the hole(s). It also relates to a semiconductor wafer as a starting substrate for electronic packaging applications, comprising low resistivity wafer through connections having closely spaced vias.

Abstract translation: 本发明涉及一种提供具有电穿透连接（通孔）的平面基板的方法。 所述方法包括在所述基底中提供孔，并且使得所述基底表面的表面具有比所述孔内的壁更低的润湿性的处理。 将平面基板暴露于具有低电阻率的熔融材料，由此将熔融材料拉入孔中。 它还涉及作为用于电子封装应用的起始衬底的半导体晶片，其包括具有紧密间隔的通孔的低电阻率晶片通过连接。

公开(公告)号：WO2008091221A2

公开(公告)日：2008-07-31

申请号：PCT/SE2008/050093

申请日：2008-01-25

Applicant: SILEX MICROSYSTEMS AB ,  EBEFORS, Thorbjörn ,  KÄLVESTEN, Edvard ,  BAUER, Tomas

Inventor： EBEFORS, Thorbjörn ,  KÄLVESTEN, Edvard ,  BAUER, Tomas

IPC: B81B7/00 ,  B81C3/00 ,  H01L23/043

CPC classification number: H01L21/762 ,  B81C1/00246 ,  H01L21/823481 ,  H01L23/055 ,  H01L23/147 ,  H01L23/26 ,  H01L23/49838 ,  H01L23/552 ,  H01L23/66 ,  H01L2223/6622 ,  H01L2223/6688 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/1433 ,  H01L2924/1461 ,  H01L2924/15153 ,  H01L2924/16195 ,  H01L2924/16251 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2224/0401

Abstract: The invention relates in one aspect to a method of micro-packaging a component. At least a first and a second semi-conductor substrate are provided, one of which has electrical through connections (vias). A depression in either one of said substrates or in both is etched. A component is provided above vias and connected thereto. The substrates are joined to form a sealed package. The invention also relates to a micro-packaged electronic or micromechanic device, comprising a thin-walled casing of a semi-conductor material having electrical through connections through the bottom of the casing. An electronic or micromechanic component is attached to said electrical through connections, and the package is hermetically sealed for maintaining a desired atmosphere, suitably vacuum inside the box.

Abstract translation: 本发明在一个方面涉及一种微型封装组件的方法。 提供至少一个第一和第二半导体衬底，其中一个具有电穿透连接（通孔）。 蚀刻所述基板中的任一个或两者中的凹陷。 在通孔上面提供一个组件并与之连接。 基板接合形成密封的包装。 本发明还涉及一种微型封装的电子或微机械装置，其包括半导体材料的薄壁壳体，其具有通过壳体底部的电穿透连接。 电子或微机械部件附接到所述电气通过连接件，并且封装件被气密地密封以保持期望的气氛，适当地在箱内真空。

公开(公告)号：WO2007089207A1

公开(公告)日：2007-08-09

申请号：PCT/SE2007/050053

申请日：2007-01-31

Applicant: SILEX MICROSYSTEMS AB ,  KÄLVESTEN, Edvard ,  BAUER, Tomas

Inventor： KÄLVESTEN, Edvard ,  BAUER, Tomas

IPC: H01L21/768 ,  H01L23/48 ,  H01L23/498 ,  H01L23/532

CPC classification number: H01L23/49827 ,  H01L21/76898 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48237 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/12043 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: The invention relates to a method of making a starting substrate wafer for semiconductor engineering having electrical wafer through connections (140; 192). It comprises providing a wafer (110; 150) having a front side and a back side and having a base of low resistivity silicon and a layer of high resistivity material on the front side. On the wafer there are islands of low resistiviy material in the layer of high resistivity material. The islands are in contact with the silicon base material. Trenches are etched from the back side of the wafer but not all the way through the wafer to provide insulating enclosures defining the wafer through connections(140; 192). The trenches are filled with insulating material. Then the front side of the wafer is grinded to expose the insulating material to create the wafer through connections. Also there is provided a wafer substrate for making integrated electronic circuits and/or components, comprising a low resisitivity silicon base (110) having a high resistivity top layer (122) suitable for semiconductor engineering, characterized by having low resistivity wafer through connections (140).

Abstract translation: 本发明涉及一种通过连接（140; 192）制造具有电晶片的用于半导体工程的起始衬底晶片的方法。 它包括提供具有前侧和后侧的具有低电阻率硅基底和前侧的高电阻率材料层的晶片（110,150）。 在晶片上，在高电阻率材料层中存在低电阻材料岛。 这些岛与硅基材料接触。 沟槽从晶片的背面蚀刻，但并不全部穿过晶片，以提供通过连接（140; 192）限定晶片的绝缘外壳。 沟槽填充有绝缘材料。 然后研磨晶片的前侧以露出绝缘材料，以通过连接产生晶片。 还提供了一种用于制造集成电子电路和/或部件的晶片衬底，其包括具有适于半导体工程的高电阻率顶层（122）的低电阻率硅基底（110），其特征在于具有低电阻率晶圆通过连接（140 ）。

公开(公告)号：WO2010074649A1

公开(公告)日：2010-07-01

申请号：PCT/SE2009/051496

申请日：2009-12-23

Applicant: SILEX MICROSYSTEMS AB ,  EBEFORS, Thorbjörn ,  KÄLVESTEN, Edvard ,  ÅGREN, Peter ,  SVEDIN, Niklas

Inventor： EBEFORS, Thorbjörn ,  KÄLVESTEN, Edvard ,  ÅGREN, Peter ,  SVEDIN, Niklas

IPC: H01L23/522 ,  B61B7/00 ,  B81C1/00 ,  H01L21/768 ,  G02B26/08

CPC classification number: G02B26/0833 ,  B81B7/0006 ,  B81B7/007 ,  B81B2207/092 ,  B81B2207/095 ,  G02B6/3518 ,  G02B6/3584 ,  G02B26/0841 ,  H01L21/76898 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/00012 ,  H01L2924/00

Abstract: The invention relates to a layered micro-electronic and/or micro-mechanic structure, comprising at least three alternating electrically conductive layers with insulating layers between the conductive layers. There is also provided a via in a first outer layer, said via comprising an insulated conductive connection made of wafer native material through the layer, an electrically conductive plug extending through the other layers and into said via in the first outer layer in order to provide conductivity through the layers, and an insulating enclosure surrounding said conductive plug in at least one selected layer of said other layers for insulating said plug from the material in said selected layer. It also relates to micro-electronic and/or micro-mechanic device comprising a movable member provided above a cavity such that it is movable in at least one direction. The device has a layered structure according to the invention. Methods of making such a layered MEMS structure is also provided.

Abstract translation: 本发明涉及分层的微电子和/或微机械结构，其包括在导电层之间具有绝缘层的至少三个交替的导电层。 还提供了在第一外层中的通孔，所述通孔包括由穿过该层的晶片天然材料制成的绝缘导电连接，在第一外层中延伸穿过其它层并进入所述通孔的导电插塞，以便提供 通过层的导电性，以及围绕所述其它层的至少一个所选层的所述导电插塞的绝缘外壳，用于使所述插塞与所述选定层中的材料绝缘。 它还涉及微电子和/或微机械装置，其包括设置在空腔上方的可动构件，使得其可在至少一个方向上移动。 该装置具有根据本发明的分层结构。 还提供了制造这种分层MEMS结构的方法。

公开(公告)号：WO2010059118A1

公开(公告)日：2010-05-27

申请号：PCT/SE2009/051311

申请日：2009-11-19

Applicant: SILEX MICROSYSTEMS AB ,  EBEFORS, Thorbjörn ,  KÄLVESTEN, Edvard ,  BAUER, Thomas

Inventor： EBEFORS, Thorbjörn ,  KÄLVESTEN, Edvard ,  BAUER, Thomas

IPC: B81C1/00 ,  B81B7/00 ,  H01L21/50 ,  H01L23/48

CPC classification number: H01L21/50 ,  B81B7/007 ,  B81B2207/095 ,  B81C1/00301 ,  H01L21/6835 ,  H01L21/76898 ,  H01L21/78 ,  H01L23/04 ,  H01L23/10 ,  H01L23/481 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/552 ,  H01L23/585 ,  H01L23/642 ,  H01L23/645 ,  H01L23/66 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/30 ,  H01L24/32 ,  H01L24/33 ,  H01L24/81 ,  H01L24/83 ,  H01L2221/68363 ,  H01L2221/68372 ,  H01L2223/6616 ,  H01L2223/6622 ,  H01L2223/6655 ,  H01L2223/6677 ,  H01L2224/02311 ,  H01L2224/02313 ,  H01L2224/02371 ,  H01L2224/02372 ,  H01L2224/0239 ,  H01L2224/03462 ,  H01L2224/0401 ,  H01L2224/05073 ,  H01L2224/05155 ,  H01L2224/05548 ,  H01L2224/05573 ,  H01L2224/05644 ,  H01L2224/1146 ,  H01L2224/13009 ,  H01L2224/13024 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13155 ,  H01L2224/29009 ,  H01L2224/29011 ,  H01L2224/29012 ,  H01L2224/29018 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/29144 ,  H01L2224/30051 ,  H01L2224/3012 ,  H01L2224/81005 ,  H01L2224/81203 ,  H01L2224/81801 ,  H01L2224/83005 ,  H01L2224/83203 ,  H01L2224/83801 ,  H01L2224/83805 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01072 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/1461 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/3512

Abstract: A wafer level method of making a micro-electronic and/or micro-mechanic device, having a capping with electrical wafer through connections (vias), comprising the steps of providing a first wafer of a semiconductor material having a first and a second side and a plurality of holes and/or recesses in the first side, and a barrier structure extending over the wafer on the second side, said barrier comprising an inner layer an insulating material, such as oxide, and an outer layer of another material. Then, metal is applied in said holes so as to cover the walls in the holes and the bottom of the holes. The barrier structure is removed and contacts are provided to the wafer through connections on the back-side of the wafer. Bonding structures are provided on either of said first side or the second side of the wafer. The wafer is bonded to another wafer carrying electronic and micro-electronic/mechanic components, such that the first wafer forms a capping structure covering the second wafer. Finally the wafer is singulated to individual devices.

Abstract translation: 一种制造微电子和/或微机械装置的晶片级方法，其具有通过连接（通孔）的电晶片的封盖，包括以下步骤：提供具有第一和第二侧的半导体材料的第一晶片，以及 第一侧中的多个孔和/或凹部，以及在第二侧上延伸到晶片上方的阻挡结构，所述屏障包括绝缘材料（例如氧化物）和另一材料的外层的内层。 然后，将金属施加在所述孔中，以覆盖孔中的壁和孔的底部。 去除阻挡结构，并且通过晶片背面上的连接将接触提供给晶片。 粘合结构设置在晶片的所述第一侧或第二侧中的任一个上。 晶片接合到承载电子和微电子/机械部件的另一个晶片，使得第一晶片形成覆盖第二晶片的封盖结构。 最后，将晶片单个化为单个器件。

公开(公告)号：WO2007043963A1

公开(公告)日：2007-04-19

申请号：PCT/SE2006/050381

申请日：2006-10-05

Applicant: SILEX MICROSYSTEMS AB ,  KÄLVESTEN, Edvard

Inventor： KÄLVESTEN, Edvard

IPC: B81C1/00 ,  B81B1/00

CPC classification number: B81B7/0061 ,  B81B2201/058

Abstract: The invention relates to a method of making a fluid communication channel between a micro mechanical structure provided on a front side of a device and the back side of said device. It comprises making the required structural components by lithographic and etching processes on said front side. Holes are then drilled from the back side of said device in precise alignment with the structures on said front side, to provide inlets and/or outlets to and/or from said micromechanical structure.

Abstract translation: 本发明涉及在设置在设备的前侧的微机械结构与所述设备的背面之间制造流体连通通道的方法。 它包括在所述前侧通过光刻和蚀刻工艺制造所需的结构部件。 然后从所述装置的背面钻出孔，以与所述前侧上的结构精确对准，以向所述微机械结构提供入口和/或出口。

公开(公告)号：WO2004084300A1

公开(公告)日：2004-09-30

申请号：PCT/SE2004/000439

申请日：2004-03-22

Applicant: SILEX MICROSYSTEMS AB ,  KÄLVESTEN, Edvard ,  EBEFORS, Thorbjörn ,  SVEDIN, Niklas ,  RANGSTEN, Pelle ,  HUHTAOJA, Tommy

Inventor： KÄLVESTEN, Edvard ,  EBEFORS, Thorbjörn ,  SVEDIN, Niklas ,  RANGSTEN, Pelle ,  HUHTAOJA, Tommy

IPC: H01L21/768

CPC classification number: B81B7/0006 ,  H01L21/76898 ,  H01L23/481 ,  H01L2224/05573 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2924/00014 ,  H01L2924/1461 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/05599

Abstract: The invention relates to a method of making an electrical connection between a first (top) and a second (bottom) surface of a conducting or semi-conducting substrate. It comprising creating a trench in the first surface, and establishing an insulating enclosure entirely separating a portion of said substrate, defined by said trench. It also relates to a product usable as a starting substrate for the manufacture of micro-electronic and/or micro-mechanic devices, comprising a flat substrate of a semi-conducting or conducting material, and having a first and a second surface and at least one electrically conducting member extending through said substrate. The electrically conducting member is insulated from surrounding material of the flat substrate by a finite layer of an insulating material, and comprises the same material as the substrate, i.e. it is made from the wafer material.

Abstract translation: 本发明涉及一种在导电或半导体衬底的第一（顶部）和第二（底部）表面之间形成电连接的方法。 其包括在第一表面中形成沟槽，并且建立绝缘外壳，其将由所述沟槽限定的所述衬底的一部分完全分离。 它还涉及可用作制造微电子和/或微机械装置的起始衬底的产品，其包括半导体或导电材料的平坦衬底，并且具有第一表面和第二表面，并且至少 一个导电构件延伸穿过所述衬底。 导电构件通过绝缘材料的有限层与平坦基板的周围材料绝缘，并且包括与基板相同的材料，即由晶片材料制成。

公开(公告)号：WO2007070004A2

公开(公告)日：2007-06-21

申请号：PCT/SE2006/050582

申请日：2006-12-14

Applicant: SILEX MICROSYSTEMS AB ,  KÄLVESTEN, Edvard ,  EBEFORS, Thorbjörn ,  CORMAN, Thierry

Inventor： KÄLVESTEN, Edvard ,  EBEFORS, Thorbjörn ,  CORMAN, Thierry

IPC: A61B5/042 ,  A61B5/151 ,  A61B5/153 ,  A61M25/06 ,  A61M37/00 ,  A61M5/158 ,  A61N1/18 ,  G01N33/483

CPC classification number: A61M37/0015 ,  A61B5/053 ,  A61B5/150022 ,  A61B5/150282 ,  A61B5/150984 ,  A61M2037/003 ,  A61M2037/0046 ,  A61M2037/0053 ,  A61N1/0502 ,  A61N1/0551 ,  H01L2224/48091 ,  H01L2224/8592 ,  H01L2924/00014

Abstract: The invention relates in a general aspect to a method of making vertically protruding elements on a substrate, said elements having a tip comprising at least one inclined surface and an elongated body portion extending between said substrate and said tip. The method comprises an anisotropic, crystal plane dependent etch forming said inclined surface(s); and an anisotropic, non crystal plane dependent etch forming said elongated body portion; combined with suitable patterning processes defining said protruding elements to have a predetermined base geometry.

Abstract translation: 本发明在一般方面涉及在衬底上制造垂直突出元件的方法，所述元件具有包括至少一个倾斜表面的尖端和在所述基底和所述尖端之间延伸的细长主体部分。 该方法包括形成所述倾斜表面的各向异性的晶面依赖蚀刻; 以及形成所述细长主体部分的各向异性非晶面依赖蚀刻; 结合限定所述突出元件的合适的图案化工艺具有预定的基部几何形状。

公开(公告)号：WO2003069389A1

公开(公告)日：2003-08-21

申请号：PCT/SE2003/000253

申请日：2003-02-14

Applicant: SILEX MICROSYSTEMS AB ,  KÄLVESTEN, Edvard ,  EBEFORS, Thorbjörn ,  GRISS, Patrick ,  HAASL, Sjoerd ,  SOHLSTRÖM, Hans ,  STEMME, Göran

Inventor： KÄLVESTEN, Edvard ,  EBEFORS, Thorbjörn ,  GRISS, Patrick ,  HAASL, Sjoerd ,  SOHLSTRÖM, Hans ,  STEMME, Göran

IPC: G02B6/42

CPC classification number: G02B6/4238 ,  G02B6/4225 ,  G02B6/4226 ,  G02B6/4227

Abstract: ABSTRACTA system for achieving fixation of one or more moveable micro machined platforms for passively aligned optical components, comprising - a support structure containing structures for passive alignment of optical components- platform(s) containing structures for passive alignment of optical components- actuators for actively aligning the already passively aligned components on the platform(s) and the support structure to each other, where the actuators are strong enough while actuating to keep the platform(s) steady during fixation and weak enough while not actuating so as not to impede the fixation- a fixation mechanism to fixate the moveable platform(s) to the support structure.

Abstract translation: 用于实现用于被动对准的光学部件的一个或多个可移动微加工平台的固定的ABSTRACTA系统，包括：包含用于光学部件的被动对准的结构的支撑结构 - 包含用于光学部件的被动对准的结构的平台 - 用于主动对准已被动地 平台上的对准部件和支撑结构彼此相对，其中致动器足够坚固，同时致动以在固定期间保持平台稳定，并且在不致动的同时足够弱以便不妨碍固定 - 固定机构来固定可移动平台 到支撑结构。

公开(公告)号：WO2003068669A1

公开(公告)日：2003-08-21

申请号：PCT/SE2003/000252

申请日：2003-02-14

Applicant: SILEX MICROSYSTEMS AB ,  KÄLVESTEN, Edvard ,  EBEFORS, Thorbjörn ,  SVEDIN, Niklas ,  WESTIN, Håkan

Inventor： KÄLVESTEN, Edvard ,  EBEFORS, Thorbjörn ,  SVEDIN, Niklas ,  WESTIN, Håkan

IPC: B81B3/00

CPC classification number: B81C1/0015 ,  B81B2201/042 ,  B81C1/00142 ,  B81C3/002 ,  B81C2201/019 ,  B81C2201/0191 ,  B81C2203/058

Abstract: The invention relates to a method of making a deflectable, free hanging micro structure comprising at least one hinge member, the method comprising the steps of providing a first sacrificial wafer comprising a single crystalline material constituting material forming the micro structure. A second semiconductor wafer comprising necessary components for forming the structure in cooperation with said first wafer is provided. Finite areas of a structured bonding material is provided, on one or both of said wafers at selected locations, said finite areas defining points of connection for joining said wafers. The wafers are bonded using heat and optionally pressure. Sacrificial material is etched away from said sacrificial wafer, patterning the top wafer by lithography is performed to define the desired deflectable microstructures having hinges, and subsequently silicon etch to make the structures.

Abstract translation: 本发明涉及一种制造包括至少一个铰链构件的可偏转的自由悬挂微结构的方法，所述方法包括以下步骤：提供包括构成微结构的单晶材料构成材料的第一牺牲晶片。 提供了包括与所述第一晶片协作形成所述结构的必要部件的第二半导体晶片。 在选定位置的一个或两个所述晶片上提供结构化接合材料的有限区域，所述有限区域限定用于连接所述晶片的连接点。 使用热和任选的压力将晶片接合。 牺牲材料被蚀刻离开所述牺牲晶片，通过光刻来图案化顶部晶片以限定具有铰链的期望的可偏转微结构，并随后进行硅蚀刻以制造结构。