摘要:
A packaged microelectronic assembly includes a microelectronic element (104) joined to a substrate (102, 402). The microelectronic element (104) has a front surface (122) and a plurality of first solid metal posts (110) extending away from the front surface (122). Each of the first posts (110) has a width (W2) in a direction of the front surface (122) and a height (H2) extending from the front surface (122), wherein the height (H2) is at least half of the width (W2). The substrate (102, 402) has a top surface (101, 401) and a plurality of second solid metal posts (108) extending from the top surface (101, 401) and joined to the first solid metal posts (110) by a fusible metal (130), each second post (108) having a second width (W1) in a direction along the top surface (101, 401) and each projecting to a second height (H1) above the top surface (101, 401). The substrate (402) also has conductive interconnects (407) extending through the substrate (402) and electrically connecting terminals at a bottom surface (403) opposite the top surface (401) with the second solid metal posts (108). The plurality of first solid metal posts (110) and the plurality of second solid metal posts (108) are etched metal posts. The posts (110, 108) may have a frustoconical shape defined by the etching process.
摘要:
A microelectronic assembly 10 can include a substrate 20 having first and second surfaces 21, 22, at least two logic chips 30 overlying the first surface, and a memory chip 40 having a front surface 45 with contacts 44 thereon, the front surface of the memory chip confronting a rear surface 36 of each logic chip. Signal contacts 34 of each logic chip 30 can be directly electrically connected to signal contacts 34 of the other logic chips 30 through conductive structure 62 of the substrate 20 for transfer of signals between the logic chips. The logic chips 30 can be adapted to simultaneously execute a set of instructions of a given thread of a process. The contacts 44 of the memory chip 40 can be directly electrically connected to the signal contacts 34 of at least one of the logic chips 30 through the conductive structure 62.
摘要:
A microelectronic assembly 10 can include a substrate 30 having an aperture 39 extending between first and second surfaces 34, 32 thereof, substrate contacts 41 at the first surface, and terminals 36 at the second surface. The microelectronic assembly 10 can include a first microelectronic element 12 having a front surface 16 facing the first surface 34, a second microelectronic element 14 having a front surface 22 facing the first microelectronic element, and leads 50 electrically connecting contacts 26 of the second microelectronic element with the terminals 36. The contacts 26 of the second microelectronic element 14 can be exposed at the front surface 22 beyond an edge 29 of the first microelectronic element 12. The first microelectronic element 12 can be configured to regenerate at least some signals received by the microelectronic assembly 10 at the terminals 36 and to transmit said signals to the second microelectronic element 14.
摘要:
Disclosed are a microelectronic assembly of two elements and a method of forming same. A microelectronic element includes a major surface, and a dielectric layer and at least one bond pad exposed at the major surface. The microelectronic element may contain a plurality of active circuit elements. A first metal layer is deposited overlying the at least one bond pad and the dielectric layer. A second element having a second metal layer deposited thereon is provided, and the first metal layer is joined with the second metal layer. The assembly may be severed along dicing lanes into individual units each including a chip.
摘要:
A microelectronic assembly includes a dielectric element having first and second surfaces, first and second apertures extending between the first and second surfaces and defining a central region of the first surface between the first and second apertures, first and second microelectronic elements, and leads extending from contacts exposed at respective front surfaces of the first and second microelectronic elements to central terminals exposed at the central region. The front surface of the first microelectronic element can face the second surface of the dielectric element. The front surface of the second microelectronic element can face a rear surface of the first microelectronic element. The contacts of the second microelectronic element can project beyond an edge of the first microelectronic element. At least first and second ones of the leads can electrically interconnect a first central terminal of the central terminals with each of the first and second microelectronic elements.
摘要:
A capacitor 340 includes a substrate 320 having a first surface 321, a second surface 322 remote from the first surface, and a through opening 330 extending between the first and second surfaces, first and second metal elements 360, 370, and a capacitor dielectric layer 380 separating and insulating the first and second metal elements from one another at least within the through opening. The first metal element 360 is exposed at the first surface 321 and extends into the through opening 330. The second metal element 370 is exposed at the second surface 322 and extends into the through opening 330. The first and second metal elements 360, 370 are electrically connectable to first and second electric potentials. The capacitor dielectric layer 380 has an undulating shape.
摘要:
An apparatus for conditioning an emitter electrode (e.g., 208, 308, 408, 508, 608, 706) in electrohydrodynamic fluid accelerator (e.g., 920) and precipitator devices via movement of a conditioning device (e.g., 200, 500, 600, 700) including complementary contoured conditioning surfaces (e.g., 204, 206, 304, 306, 404, 406, 504, 506, 702) positioned to frictionally engage and elastically deform the emitter electrode. The opposing conditioning surfaces laterally distort an otherwise linear longitudinal extent of the electrode under tension. The opposing conditioning surfaces are subject to wear, but maintain frictional engagement despite wear depths that exceed a radius of the electrode due at least in part to the at least partially complementary surface contours engaging the electrode under tension. The conditioning device causes respective conditioning surfaces to travel along a longitudinal extent of the emitter electrode to condition the electrode to at least partially mitigate ozone, erosion, corrosion, oxidation, or dendrite formation on the electrode.
摘要:
A microelectronic unit 400 can include a semiconductor element 401 having a front surface, a microelectronic semiconductor device adjacent to the front surface, contacts 403 at the front surface and a rear surface remote from the front surface. The semiconductor element 401 can have through holes 410 extending from the rear surface through the semiconductor element 401 and through the contacts 403. A dielectric layer 411 can line the through holes 410. A conductive layer 412 may overlie the dielectric layer 411 within the through holes 410. The conductive layer 412 can conductively interconnect the contacts 403 with unit contacts.
摘要:
A method and apparatus for efficiently performing digital signal processing is provided. In one embodiment, kernel matrix computations are simplified by grouping similar kernel coefficients together. Each coefficient group contains only coefficients having the same value. At least one of the coefficient groups has at least two coefficients. Techniques are disclosed herein to efficiently apply successive first order difference operations to a data signal. The techniques allow for a low gate count. In particular, the techniques allow for a reduction of the number of multipliers without increasing clock frequency, in an embodiment. The techniques update pixels of a data signal at a rate of two clock cycles per each pixel, in an embodiment. The techniques allow hardware that is used to process a first pixel to be re-used to start the processing of a second pixel while the first pixel is still being processed.