公开(公告)号：US20100269336A1

公开(公告)日：2010-10-28

申请号：US12830805

申请日：2010-07-06

申请人： Romi O. Mayder

发明人： Romi O. Mayder

IPC分类号： H05K3/10

CPC分类号： H05K3/4617 ,  G01R31/2863 ,  H01L21/486 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2924/0002 ,  H01L2924/15311 ,  H05K1/0206 ,  H05K1/113 ,  H05K3/0047 ,  H05K3/0094 ,  H05K3/4061 ,  H05K3/4611 ,  H05K3/4679 ,  H05K2201/096 ,  H05K2203/0733 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T29/49172 ,  H01L2924/00

摘要： A method, and apparatus resulting from the method, for fabricating a circuit board suitable for mounting electronic components. The method includes drilling a plurality of through-holes in a plurality of dielectric sheets, forming a conductive film on at least one side of each of the plurality of dielectric sheets, and substantially filling each of the plurality of through holes with a conductive material. The conductive material is both electrically and thermally uninterrupted from a first face to a second face of each of the plurality of dielectric sheets. The plurality of dielectric sheets are then sequentially mounted, one atop another, to form the circuit board. The sequential mounting step is performed after the steps of drilling the plurality of through-holes, forming the conductive layer, and substantially filling the plurality of through-holes.

摘要翻译： 一种用于制造适于安装电子部件的电路板的由该方法得到的方法和装置。 该方法包括在多个电介质片中钻出多个通孔，在多个电介质片的每一个的至少一侧上形成导电膜，并且用导电材料基本上填充多个通孔中的每一个。 导电材料从多个电介质片的每一个的第一面到第二面都是电而且不间断的。 然后将多个电介质片依次安装在另一个之上以形成电路板。 在钻出多个通孔，形成导电层并基本上填充多个通孔的步骤之后执行顺序安装步骤。

公开(公告)号：US07800916B2

公开(公告)日：2010-09-21

申请号：US11783306

申请日：2007-04-09

申请人： Kim J. Blackwell ,  Frank D. Egitto ,  John M. Lauffer ,  Voya R. Markovich

发明人： Kim J. Blackwell ,  Frank D. Egitto ,  John M. Lauffer ,  Voya R. Markovich

IPC分类号： H01R12/16

CPC分类号： H05K1/186 ,  H01L23/4985 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16238 ,  H01L2224/73204 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81385 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2224/92125 ,  H01L2225/06513 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K3/4611 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/10515 ,  H05K2201/10681 ,  Y10T29/49126 ,  Y10T29/49151 ,  H01L2924/00 ,  H01L2224/48 ,  H01L2224/0401

摘要： A circuitized substrate assembly comprised of at least two circuitized substrates each including a thin dielectric layer and a conductive layer with a plurality of conductive members as part thereof, the conductive members of each substrate being electrically coupled to the conductive sites of a semiconductor chip. A dielectric layer is positioned between both substrates and the substrates are bonded together, such that the chips are internally located within the assembly and oriented in a stacked orientation. A method of making such an assembly is also provided, as is an electrical assembly utilizing same and an information handling system adapted for having such an electrical assembly as part thereof.

摘要翻译： 电路化衬底组件由至少两个电路化衬底组成，每个衬底均包括薄介电层和具有多个导电构件作为其一部分的导电层，每个衬底的导电构件电耦合到半导体芯片的导电部位。 电介质层位于两个基板之间，并且基板接合在一起，使得芯片在内部位于组件内并且以堆叠取向定向。 还提供了制造这种组件的方法，以及使用其的电组件以及适于将这种电组件作为其一部分的信息处理系统。

公开(公告)号：US07799156B2

公开(公告)日：2010-09-21

申请号：US12547621

申请日：2009-08-26

申请人： Akiyoshi Kawamura ,  Takako Sato ,  Osamu Chikagawa ,  Takaki Murata

发明人： Akiyoshi Kawamura ,  Takako Sato ,  Osamu Chikagawa ,  Takaki Murata

IPC分类号： B29C65/00 ,  C03B29/00

CPC分类号： H05K3/4611 ,  B32B18/00 ,  C03C3/091 ,  C03C8/02 ,  C03C8/14 ,  C04B2237/343 ,  C04B2237/562 ,  C04B2237/62 ,  C04B2237/68 ,  C04B2237/702 ,  C04B2237/704 ,  H05K1/0306 ,  H05K3/4629 ,  H05K2203/0285 ,  H05K2203/308 ,  Y10T428/24926 ,  Y10T428/252

摘要： When a ceramic substrate is manufactured through a constraint firing step that uses a constraining layer, the constraining layer is removed without causing significant damage to a sintered base layer or an electrode formed on the surface of the sintered base layer, and the electrode can be reliably exposed. A green stacked body having a base layer and a constraining layer disposed so as to be in contact with at least one principal surface of the base layer is formed. A fired stacked body having a sintered base layer and a green constraining layer is then obtained by firing the green stacked body to sinter the base layer. Subsequently, the constraining layer is removed from the sintered base layer by vibrating media that are disposed so as to be in contact with the constraining layer.

摘要翻译： 当通过使用约束层的约束烧制步骤制造陶瓷基板时，去除约束层而不会对烧结的基底层或形成在烧结的基底层的表面上的电极造成显着的损坏，并且电极可以可靠地 裸露。 形成具有设置成与基底层的至少一个主表面接触的基底层和约束层的绿色层叠体。 然后通过烧结生坯层叠体烧结基层，得到具有烧结基层和绿色约束层的烧制体。 随后，通过设置成与约束层接触的振动介质将约束层从烧结的基层除去。

公开(公告)号：US07740725B2

公开(公告)日：2010-06-22

申请号：US11999835

申请日：2007-12-07

申请人： Patricia J. Ollivier ,  Kenneth Warren Hang

发明人： Patricia J. Ollivier ,  Kenneth Warren Hang

IPC分类号： B32B18/00 ,  H01K3/22 ,  H05K1/09 ,  C03B29/00

CPC分类号： H05K1/092 ,  C03C3/064 ,  C03C3/066 ,  C03C8/14 ,  H05K3/4611 ,  H05K3/4629 ,  Y10T29/49163 ,  Y10T428/24331 ,  Y10T428/24926

摘要： This invention is related to thick film conductor compositions comprising electrically conductive gold powder, one or more glass frit or ceramic oxide compositions and an organic vehicle. It is further directed to the composition's uses for LTCC (low temperature co-fired ceramic) tape, for fabrication of multilayer electronic circuits and in high frequency microelectronic applications.

摘要翻译： 本发明涉及包含导电金粉末，一种或多种玻璃料或陶瓷氧化物组合物和有机载体的厚膜导体组合物。 进一步涉及组合物用于LTCC（低温共烧陶瓷）带，用于制造多层电子电路和在高频微电子应用中的用途。

公开(公告)号：US07732909B2

公开(公告)日：2010-06-08

申请号：US11797609

申请日：2007-05-04

申请人： Risto Tuominen

发明人： Risto Tuominen

IPC分类号： H01L21/52 ,  H01L21/60 ,  H01L23/055 ,  H01L23/08

CPC分类号： H05K1/0218 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/24137 ,  H01L2224/24227 ,  H01L2224/82039 ,  H01L2224/92144 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01057 ,  H01L2924/01061 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/3025 ,  H05K1/185 ,  H05K1/188 ,  H05K3/429 ,  H05K3/4602 ,  H05K3/4611 ,  H05K3/4652 ,  H05K2201/09981 ,  H05K2201/10674 ,  H05K2203/061 ,  H05K2203/063 ,  H05K2203/1469 ,  H01L2924/00

摘要： A method, in which the semiconductor components forming part of an electronic circuit, or at least some of them, are embedded in a base, such as a circuit board, during the manufacture of the base, when part of the base structure is, as it were, manufactured around the semiconductor components. Through-holes for the semiconductor components are made in the base, in such a way that the holes extend between the first and second surface of the base. After the making of the holes, a polymer film is spread over the second surface of the base structure, in such a way that the polymer film also covers the through-holes made for the semiconductor components from the side of the second surface of the base structure. Before the hardening, or after the partial hardening of the polymer film, the semiconductor components are placed in the holes made in the base, from the direction of the first surface of the base. The semiconductor components are pressed against the polymer film in such a way that they adhere to the polymer film.

摘要翻译： 一种方法，其中形成电子电路的一部分的半导体部件或其至少一部分的半导体部件在基体的制造期间嵌入基板（例如电路板）中，当基部结构的一部分为 它是在半导体元件周围制造的。 用于半导体部件的通孔在基座中以这样的方式制成，使得孔在基部的第一和第二表面之间延伸。 在制作孔之后，将聚合物膜分散在基底结构的第二表面上，使得聚合物膜也从基底的第二表面的一侧覆盖由半导体部件制成的通孔 结构体。 在硬化之前或在聚合物膜部分硬化之后，将半导体部件从基底的第一表面的方向放置在基底中制成的孔中。 将半导体部件压在聚合物膜上，使得它们粘附到聚合物膜上。

公开(公告)号：US07715164B2

公开(公告)日：2010-05-11

申请号：US11984559

申请日：2007-11-20

申请人： Chien-Hao Huang ,  Wen-Chih Li

发明人： Chien-Hao Huang ,  Wen-Chih Li

IPC分类号： H02H5/04

CPC分类号： H05K1/0234 ,  H05K1/0257 ,  H05K1/0259 ,  H05K1/141 ,  H05K1/167 ,  H05K1/185 ,  H05K3/3442 ,  H05K3/4611 ,  H05K3/4688 ,  H05K2201/09181 ,  H05K2201/09309 ,  H05K2201/10045 ,  Y10T428/239

摘要： An embedded type multifunctional integrated structure and a method for manufacturing the same are disclosed. The present invention utilizes the concept of multi-layer design to integrated more than two passive components on a component structure that would be adhered to a substrate. Hence, the embedded type multifunctional integrated structure has an OCP function, an OVP function, an anti-EMI function, and an anti-ESD function at the same time. Therefore, the present invention effectively integrated two or more than one passive components in order to increase function of the embedded type multifunctional integrated structure. Moreover, the present invention effectively reduces the size of the passive components on a PCB and reduces the number of solder joints.

摘要翻译： 公开了一种嵌入式多功能一体化结构及其制造方法。 本发明利用多层设计的概念将多于两个的无源部件集成在将粘附到基板上的部件结构上。 因此，嵌入式多功能一体化结构同时具有OCP功能，OVP功能，抗EMI功能和抗ESD功能。 因此，为了增加嵌入式多功能一体化结构的功能，本发明有效地集成了两个或多个无源部件。 此外，本发明有效地减小了PCB上的无源部件的尺寸，并且减少了焊点的数量。

公开(公告)号：US07698811B2

公开(公告)日：2010-04-20

申请号：US11959212

申请日：2007-12-18

申请人： Chih-Kang Yang ,  Cheng-Hsien Lin

发明人： Chih-Kang Yang ,  Cheng-Hsien Lin

IPC分类号： H05K3/00 ,  H05K3/36 ,  H05K3/30 ,  H01K3/10

CPC分类号： H05K3/0097 ,  H05K1/0393 ,  H05K3/06 ,  H05K3/242 ,  H05K3/4611 ,  H05K3/4635 ,  H05K3/4652 ,  H05K3/4691 ,  H05K2201/055 ,  H05K2201/09036 ,  H05K2201/09063 ,  H05K2201/1028 ,  H05K2203/1536 ,  H05K2203/1545 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49135 ,  Y10T29/49165 ,  Y10T428/15

摘要： An exemplary inner substrate for manufacturing multilayer printed circuit boards is provided. The inner substrate has a number of substrate units and a number of transverse folding portions alternately arranged along a longitudinal direction of the inner substrate. Each of the substrate units is configured for forming a unitary printed circuit board. Each of the folding portions is interconnected between neighboring substrate units. Each of the folding portions defines at least one line weakness perpendicular to the longitudinal direction of the inner substrate for facilitating folding and unfolding the neighboring substrate units to each other. An exemplary method for manufacturing multilayer printed circuit boards using the inner substrate is also provided. The method can improve efficiency of manufacturing multilayer printed circuit boards.

摘要翻译： 提供了用于制造多层印刷电路板的示例性内基板。 内部基板具有多个基板单元和沿着内部基板的纵向方向交替排列的多个横向折叠部。 每个基板单元被构造成用于形成一体的印刷电路板。 每个折叠部分在相邻的基板单元之间互连。 每个折叠部分限定垂直于内部基板的纵向方向的至少一条线弱点，以便于相邻的基板单元相互折叠和展开。 还提供了使用内部基板制造多层印刷电路板的示例性方法。 该方法可以提高制造多层印刷电路板的效率。

公开(公告)号：US07691469B2

公开(公告)日：2010-04-06

申请号：US12049848

申请日：2008-03-17

申请人： Masato Nomiya

发明人： Masato Nomiya

IPC分类号： B32B9/00

CPC分类号： H05K3/38 ,  H05K1/0306 ,  H05K1/092 ,  H05K3/4611 ,  H05K3/4629 ,  H05K2201/0195 ,  H05K2201/0269 ,  Y10T428/24917 ,  Y10T428/24926 ,  Y10T428/24942

摘要： A ceramic multilayer substrate exhibiting reduced pealing and breakage of an internal conductor disposed between a ceramic layer serving as a base member and a ceramic layer for restricting shrinkage includes a first ceramic layer 11, a second ceramic layer 12 laminated so as to come into contact with a principal surface of the first ceramic layer 11, and an internal conductor 13 disposed between the first ceramic layer 11 and the second ceramic layer 12, a phosphorus component layer 16a is disposed in the first ceramic layer 11 with a concentration gradient in which the concentration decreases in a direction away from the internal conductor 13.

摘要翻译： 表现出设置在用作基底的陶瓷层和用于限制收缩的陶瓷层之间的内部导体的减小的剥离和断裂的陶瓷多层基板包括层叠以与第二陶瓷层12接触的第一陶瓷层11，第二陶瓷层12 第一陶瓷层11的主表面和设置在第一陶瓷层11和第二陶瓷层12之间的内部导体13，在第一陶瓷层11中设置磷成分层16a，浓度梯度为浓度梯度， 在远离内部导体13的方向上减小。

公开(公告)号：US07687312B2

公开(公告)日：2010-03-30

申请号：US11856867

申请日：2007-09-18

申请人： Chih-kuang Yang

发明人： Chih-kuang Yang

IPC分类号： H01L21/00

CPC分类号： H05K1/147 ,  H01L23/13 ,  H01L23/5385 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/15311 ,  H05K1/142 ,  H05K3/361 ,  H05K3/4611 ,  H05K2201/058 ,  H05K2201/091 ,  H05K2201/09109 ,  H05K2201/0919 ,  Y10T428/31678 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： Disclosed is a method of manufacturing a hybrid structure of multi-layer substrates. The method comprises steps of: separating a border district of at least one metal layer connecting with a border district of the corresponding dielectric layer from adjacent metal layers and adjacent dielectric layers for each multi-layer substrate and connecting a separated border of a metal layer of one multi-layer substrate with a separated border district of a metal layer of another multi-layer substrate to form a connection section. The hybrid structure comprises at least a first multi-layer substrate and a second multi-layer substrate. At least one first metal layer is connected with at least one second metal layer to form a connection section.

摘要翻译： 公开了一种制造多层基板的混合结构的方法。 该方法包括以下步骤：将与相应电介质层的边界区连接的至少一个金属层的边界区域与相邻的金属层和相邻的电介质层分别用于每个多层基板并连接金属层的金属层的分离边界 一个多层基板，具有另一多层基板的金属层的分离边界区域，以形成连接部分。 所述混合结构至少包括第一多层基板和第二多层基板。 至少一个第一金属层与至少一个第二金属层连接以形成连接部分。

公开(公告)号：US07682998B2

公开(公告)日：2010-03-23

申请号：US12026219

申请日：2008-02-05

申请人： Ayumi Nozaki ,  Akira Yamada ,  Kiyoshi Saito

发明人： Ayumi Nozaki ,  Akira Yamada ,  Kiyoshi Saito

IPC分类号： C03C14/00 ,  B32B3/00

CPC分类号： C03C3/064 ,  C03C3/066 ,  C03C14/004 ,  H05K1/0306 ,  H05K3/4611 ,  H05K3/4629 ,  Y10T428/24926

摘要： Provided is a ceramic powder for a green sheet that gives a low-temperature fired ceramic substrate that can be fired at a temperature of 900° C. or lower and has excellent dielectric properties in the higher frequency bands such as microwave and millimeter-wave bands, has a low hygroscopicity, and has minor warping and creasing even in the case of co-firing with a silver-based conductor paste, the ceramic powder for a green sheet including a glass powder and an alumina powder, in which the glass powder contains 35 to 39% by weight of SiO2, 9 to 17% by weight of Al2O3, 21 to 40% by weight of B2O3, 10 to 20% by weight of R′O, wherein R′ is one or more kinds selected from the group consisting of Mg, Ca and Ba, 0.2 to 2% by weight of Li2O, and 0.5 to 2% by weight of MO2, wherein M is one or more kinds selected from the group consisting of Ti and Zr, so that the total is 100% by weight.

摘要翻译： 本发明提供一种生坯用陶瓷粉末，其能够在900℃以下的温度下焙烧的低温烧结陶瓷基板，并且在微波和毫米波带等较高频带中具有优异的介电性能 即使在与银基导体膏共烧的情况下也具有微小的翘曲和褶皱，包含玻璃粉末和氧化铝粉末的生片的陶瓷粉末，其中玻璃粉末含有 35〜39重量％的SiO 2，9〜17重量％的Al 2 O 3，21〜40重量％的B 2 O 3，10〜20重量％的R 10，其中R'为选自以下的一种或多种 由Mg，Ca和Ba组成，0.2〜2重量％的Li 2 O和0.5〜2重量％的MO 2，其中M为选自Ti和Zr中的一种或多种，​​使得总计为100 重量％。