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127 条记录 (耗时 0.043 秒)

    Composite Materials
    112.
    发明申请
    Composite Materials 审中-公开
    复合材料

    公开(公告)号：US20110003163A1

    公开(公告)日：2011-01-06

    申请号：US12919978

    申请日：2009-02-11

    申请人： Alan Wood

    发明人： Alan Wood

    IPC分类号： B32B27/28 ,  B32B27/04 ,  B32B27/06 ,  B32B5/02 ,  B32B37/02

    CPC分类号： B29C70/44 ,  B29C43/203 ,  B29C43/3642 ,  B29C70/086 ,  B29C2043/3644 ,  B29C2043/3647 ,  B29K2071/00 ,  B29K2081/00 ,  B29K2101/10 ,  B29K2101/12 ,  B29K2105/0854 ,  B29L2031/7156 ,  Y10T156/10 ,  Y10T428/31504 ,  Y10T428/31942 ,  Y10T428/31946

    摘要： A polyetheretherketone film is used in the consolidation of a prepreg so that the film becomes incorporated into the consolidated prepreg, defines an outer layer of the consolidated prepreg and therefore provides the consolidated prepreg with advantageous properties. In one embodiment, a film may be used as a bagging material. In this embodiment, prepreg is positioned in a mould to define a precursor of a composite material. A bagging film is positioned next to the prepreg and a vacuum is applied via port to evacuate the space between the prepreg and film and induction heating is used to cause the resin in the prepreg to melt. In addition, the film yields and draws and this stretched film will cover the prepreg and act as a bagging material. Another embodiment addresses the problem of insertion and/or removal of an inflatable bladder in the manufacture of hollow articles and utilizes a gas filled thermoplastic bag.

    摘要翻译： 将聚醚醚酮薄膜用于固化预浸料，使得薄膜变成掺入固结的预浸料中，限定固结预浸料的外层，因此为固结预浸料提供有利的性能。 在一个实施例中，膜可以用作装袋材料。 在该实施例中，将预浸料坯定位在模具中以限定复合材料的前体。 袋装薄膜位于预浸料坯的旁边，通过端口进行真空抽真空，预浸料和薄膜之间的空间进行感应加热，使预浸料坯中的树脂熔化。 此外，薄膜产生和拉伸，并且该拉伸的薄膜将覆盖预浸料并充当装袋材料。 另一个实施例解决了在制造中空制品时插入和/或移除可充气囊的问题，并利用气体填充的热塑性袋。

    Enhancing throughput and fault-tolerance in a parallel-processing system
    114.
    发明申请
    Enhancing throughput and fault-tolerance in a parallel-processing system 有权
    提高并行处理系统的吞吐量和容错能力

    公开(公告)号：US20070214394A1

    公开(公告)日：2007-09-13

    申请号：US11371998

    申请日：2006-03-08

    申请人： Kenny Gross ,  Alan Wood

    发明人： Kenny Gross ,  Alan Wood

    IPC分类号： G06F11/00

    CPC分类号： G06F11/2041 ,  G06F11/1471 ,  G06F11/2025 ,  G06F11/203 ,  G06F11/2046

    摘要： One embodiment of the present invention provides a system that enhances throughput and fault-tolerance in a parallel-processing system. During operation, the system first receives a task. Next, the system partitions N computing nodes into M set-aside nodes and N-M primary computing nodes, wherein M≧1. The system then processes the task in parallel across the N-M primary computing nodes. While doing so, the system proactively monitors the health of each of the N-M primary computing nodes. If the system detects a node in the N-M primary computing nodes to be at risk of failure, the system copies the portion of the task associated with the at-risk node to a subset of the M set-aside nodes. The system then processes the portion of the task in parallel across the subset of the M set-aside nodes while the N-M primary computing nodes continue executing.

    摘要翻译： 本发明的一个实施例提供一种提高并行处理系统中的吞吐量和容错能力的系统。 在操作过程中，系统首先接收到一个任务。 接下来，系统将N个计算节点划分为M个置换节点和N-M个主要计算节点，其中M> = 1。 然后，系统在N-M主计算节点上并行处理任务。 在这样做的同时，系统主动监控每个N-M主计算节点的运行状况。 如果系统检测到N-M主计算节点中的节点处于故障风险，则系统将与风险中节点相关联的任务的一部分复制到M个备用节点的子集。 然后，在N-M主计算节点继续执行的同时，系统跨M个备用节点的子集并行地处理任务的该部分。

    Semiconductor test board having laser patterned conductors
    117.
    发明申请
    Semiconductor test board having laser patterned conductors 失效
    具有激光图案导体的半导体测试板

    公开(公告)号：US20050084986A1

    公开(公告)日：2005-04-21

    申请号：US10983111

    申请日：2004-11-05

    申请人： David Hembree ,  Alan Wood

    发明人： David Hembree ,  Alan Wood

    IPC分类号： H01L21/66 ,  H01L21/00

    CPC分类号： H01L22/20 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05548 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/0568 ,  H01L2224/05681 ,  H01L2224/05684 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2224/05099 ,  H01L2924/013

    摘要： A method for fabricating semiconductor components is performed using a laser scanner and a laser imaging process. A substrate, such as a semiconductor wafer, containing multiple semiconductor components, such as dice or packages, is provided. The components include integrated circuits, and component contacts in electrical communication with the integrated circuits. Initially, the components are tested to identify and locate good components and defective components on the substrate. Using data from the testing step and the laser scanner, patterns of conductors are then formed to either repair the defective components, to electrically isolate the defective components for burn-in, or to form component clusters containing only the good components. Alternately, using data from the testing step and the laser scanner, a matching test board can be fabricated, and used to electrically engage the good components, while the defective components remain isolated.

    摘要翻译： 使用激光扫描仪和激光成像处理来执行制造半导体部件的方法。 提供了诸如骰子或包装之类的诸如半导体晶片的衬底，其包含多个半导体元件。 这些部件包括集成电路和与集成电路进行电气通信的部件触点。 最初，对组件进行测试以识别和定位衬底上的良好组件和缺陷组件。 使用来自测试步骤和激光扫描仪的数据，然后形成导体图案，以修复有缺陷的部件，将缺陷部件电隔离以进行老化，或形成仅包含良好部件的组件簇。 或者，使用来自测试步骤和激光扫描仪的数据，可以制造匹配的测试板，并且用于电气接合良好部件，同时有缺陷的部件保持隔离。