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公开(公告)号：US07500306B2
公开(公告)日：2009-03-10
申请号：US10912257
申请日：2004-08-05
CPC分类号： H05K1/115 , H05K1/0268 , H05K3/4602 , H05K3/4623 , H05K2201/09518 , H05K2201/09536 , H05K2201/096 , H05K2203/162 , Y10T29/49004 , Y10T29/49126 , Y10T29/49128 , Y10T29/4913 , Y10T29/49155 , Y10T29/49165
摘要： A method of forming an electrical structure that includes a complex power-signal (CPS) substructure. The CPS substructure is formed and tested to determine whether the CPS substructure satisfies electrical performance acceptance requirements. The testing includes testing for electrical shorts, electrical opens, erroneous impedances, and electrical signal delay. If the CPS substructure passes the testes, then a dielectric-metallic (DM) laminate is formed on an external surface of the CPS substructure. The DM laminate includes an alternating sequence of an equal number N of dielectric layers and metallic layers such that a first dielectric layer of the N dielectric layers is formed on an external surface of the CPS substructure. N is at least 2. A multilevel conductive via is formed through the DM laminate and is electrically coupled to a metal layer of the CPS substructure.
摘要翻译： 一种形成包括复合功率信号（CPS）子结构的电气结构的方法。 形成和测试CPS子结构以确定CPS子结构是否满足电气性能验收要求。 测试包括测试电气短路，电气开路，错误阻抗和电信号延迟。 如果CPS子结构通过睾丸，则在CPS子结构的外表面上形成介电金属（DM）层压体。 DM层压板包括相等数量的N个介电层和金属层的交替序列，使得N个介电层的第一介电层形成在CPS子结构的外表面上。 N至少为2.通过DM层压体形成多层导电通孔，并电耦合到CPS子结构的金属层。
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公开(公告)号：US06810583B2
公开(公告)日：2004-11-02
申请号：US09924204
申请日：2001-08-07
IPC分类号： H01K310
CPC分类号： H05K1/115 , H05K1/0268 , H05K3/4602 , H05K3/4623 , H05K2201/09518 , H05K2201/09536 , H05K2201/096 , H05K2203/162 , Y10T29/49004 , Y10T29/49126 , Y10T29/49128 , Y10T29/4913 , Y10T29/49155 , Y10T29/49165
摘要： An electrical structure that includes a complex power-signal (CPS) substructure. The CPS substructure is formed and tested to determine whether the CPS substructure satisfies electrical performance acceptance requirements. The testing includes testing for electrical shorts, electrical opens, erroneous impedances, and electrical signal delay. If the CPS substructure passes the tests, then a dielectric-metallic (DM) laminate is formed on an external surface of the CPS substructure. The DM laminate includes an alternating sequence of an equal number N of dielectric layers and metallic layers such that a first dielectric layer of the N dielectric layers is formed on an external surface of the CPS substructure. N is at least 2. A multilevel conductive via is formed through the DM laminate and is electrically coupled to a metal layer of the CPS substructure.
摘要翻译： 包括复合功率信号（CPS）子结构的电气结构。 形成和测试CPS子结构以确定CPS子结构是否满足电气性能验收要求。 测试包括测试电气短路，电气开路，错误阻抗和电信号延迟。 如果CPS子结构通过测试，则在CPS子结构的外表面上形成介电金属（DM）层压体。 DM层压板包括相等数量的N个介电层和金属层的交替序列，使得N个介电层的第一介电层形成在CPS子结构的外表面上。 N至少为2.通过DM层压体形成多层导电通孔，并电耦合到CPS子结构的金属层。
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13.发明授权Circuitized substrate with internal cooling structure and electrical assembly utilizing same 失效具有内部冷却结构的电路化基板和利用其的电气组件公开(公告)号：US07738249B2
公开(公告)日：2010-06-15
申请号：US11976468
申请日：2007-10-25
申请人： Benson Chan , Frank D. Egitto , How T. Lin , Roy H. Magnuson , Voya R. Markovich , David L. Thomas
发明人： Benson Chan , Frank D. Egitto , How T. Lin , Roy H. Magnuson , Voya R. Markovich , David L. Thomas
IPC分类号： H05K7/20
CPC分类号： H05K1/0206 , H01L2924/0002 , H05K1/0272 , H05K3/0061 , H05K3/44 , H05K2201/064 , H05K2201/09745 , H05K2201/10674 , Y10S428/901 , Y10T29/49126 , Y10T29/4913 , Y10T428/24917 , H01L2924/00
摘要： An electrical assembly which includes a circuitized substrate including a first plurality of dielectric and electrically conductive circuit layers alternatively oriented in a stacked orientation, a thermal cooling structure bonded to one of the dielectric layers and at least one electrical component mounted on the circuitized substrate. The circuitized substrate includes a plurality of electrically conductive and thermally conductive thru-holes located therein, selected ones of the thermally conductive thru-holes thermally coupled to the electrical component(s) and extending through the first plurality of dielectric and electrically conductive circuit layers and being thermally coupled to the thermal cooling structure, each of these selected ones of thermally conductive thru-holes providing a thermal path from the electrical component to the thermal cooling structure during assembly operation. The thermal cooling structure is adapted for having cooling fluid pass there-through during operation of the assembly. A method of making the substrate is also provided.
摘要翻译： 一种电气组件，其包括电路化衬底，其包括以层叠取向交替取向的第一多个电介质和导电电路层，结合到所述电介质层之一的热冷结构和安装在所述电路化衬底上的至少一个电气部件。 电路化衬底包括位于其中的多个导电和导热通孔，选择的导热通孔热耦合到电气部件并延伸穿过第一多个电介质和导电电路层，并且 热耦合到热冷却结构，这些选择的导热通孔中的每一个在组装操作期间提供从电气部件到热冷却结构的热路径。 热冷却结构适于在组件的操作期间使冷却流体通过。 还提供了制造基板的方法。
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14.发明授权Circuitized substrate with shielded signal lines and plated-thru-holes and method of making same, and electrical assembly and information handling system utilizing same 失效具有屏蔽信号线和电镀通孔的电路基板及其制造方法，以及利用其组合和信息处理系统公开(公告)号：US07679005B2
公开(公告)日：2010-03-16
申请号：US11401401
申请日：2006-04-11
CPC分类号： G06K7/084 , G06K17/00 , G06K19/005 , G06K19/07354 , G06K2017/0064 , H05K1/0221 , H05K1/0222 , H05K3/429 , H05K3/4602 , H05K2201/09809 , H05K2203/0733 , Y10T29/49165
摘要： A circuitized substrate in which selected ones of the signal conductors are substantially surrounded by shielding members which shield the conductors during passage of high frequency signals, e.g., to reduce noise. The shielding members may form solid members which lie parallel and/or perpendicular to the signal conductors, and may also be substantially cylindrical in shape to surround a conductive thru-hole which also forms part of the substrate. An electrical assembly and an information handling system are also defined.
摘要翻译： 电路化基板，其中所选择的信号导体基本上由在高频信号通过期间屏蔽导体的屏蔽构件包围，例如降低噪声。 屏蔽构件可以形成平行和/或垂直于信号导体的固体构件，并且也可以基本上为圆柱形，以包围也形成衬底的一部分的导电通孔。 还定义了电组件和信息处理系统。
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公开(公告)号：US06518516B2
公开(公告)日：2003-02-11
申请号：US10121821
申请日：2002-04-11
申请人： Kim J. Blackwell , Frank D. Egitto , Voya R. Markovich , Manh-Quan T. Nguyen , Douglas O. Powell , David L. Thomas
发明人： Kim J. Blackwell , Frank D. Egitto , Voya R. Markovich , Manh-Quan T. Nguyen , Douglas O. Powell , David L. Thomas
IPC分类号： H01K909
CPC分类号： H01L23/50 , H01L23/5383 , H01L23/5385 , H01L2224/16 , H01L2924/00014 , H01L2924/01046 , H01L2924/01078 , H01L2924/3025 , H05K3/429 , H05K3/4602 , H05K3/4623 , H05K3/4641 , H05K2201/09309 , H05K2201/09536 , Y10T29/49165 , H01L2224/0401
摘要： A multilayered laminate, substructures and associated methods of fabrication are presented. The multilayered laminate includes in sequential order: (a) a first intermediate layer having microvias and conductive lands; (b) a plurality of signal/power plane substructures, wherein a dielectric material of an intervening dielectric layer insulatively separates each pair of successive signal/power plane substructures and (c) a second intermediate layer having microvias and conductive lands.
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16.发明授权Circuitized substrate with signal wire shielding, electrical assembly utilizing same and method of making 有权具有信号线屏蔽的电路基板，利用其组合的电气组件和制造方法公开(公告)号：US07209368B2
公开(公告)日：2007-04-24
申请号：US10790747
申请日：2004-03-03
IPC分类号： H05K9/00
CPC分类号： H01L23/552 , H01L23/3128 , H01L23/5383 , H01L25/0652 , H01L25/0655 , H01L25/18 , H01L2224/05568 , H01L2224/05573 , H01L2224/16 , H01L2224/73253 , H01L2924/00014 , H01L2924/01046 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/01322 , H01L2924/14 , H01L2924/1433 , H01L2924/15311 , H01L2924/16195 , H01L2924/3011 , H01L2924/3025 , H05K1/0219 , H05K1/024 , H05K1/113 , H05K3/4623 , H05K3/4688 , H05K2201/0715 , H05K2201/09236 , H05K2201/09536 , H05K2201/096 , H05K2203/061 , H01L2224/05599
摘要： A circuitized substrate in which at least one signal line used therein is shielded by a pair of opposingly positioned ground lines which in turn are electrically coupled to a ground plane located beneath the signal and ground lines and separated therefrom by a common interim dielectric layer. An electrical assembly including the circuitized substrate as part thereof and a method of making the circuitized substrate are also included. The substrate may form part of a larger structure such as a PCB, chip carrier or the like.
摘要翻译： 其中其中使用的至少一个信号线被一对相对定位的接地线屏蔽的电路化基板，所述接地线又电耦合到位于信号和接地线下方的接地平面，并通过共同的中间介质层与其分离。 包括作为其一部分的电路化基板的电气组件和制造电路化基板的方法也包括在内。 衬底可以形成较大结构的一部分，例如PCB，芯片载体等。
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公开(公告)号：US07478472B2
公开(公告)日：2009-01-20
申请号：US11429990
申请日：2006-05-09
CPC分类号： H01L23/552 , H01L2924/0002 , H01L2924/3011 , H05K1/0219 , H05K2201/0715 , H05K2201/09236 , Y10T29/49117 , Y10T29/49126 , Y10T29/49155 , Y10T29/49165 , H01L2924/00
摘要： A method of making a circuitized substrate in which at least one signal line used therein is shielded by a pair of opposingly positioned ground lines which in turn are electrically coupled to a ground plane located beneath the signal and ground lines and separated therefrom by a common interim dielectric layer. The substrate may form part of a larger structure such as a PCB, chip carrier or the like.
摘要翻译： 一种制造电路化基板的方法，其中使用的至少一个信号线被一对相对定位的接地线屏蔽，所述接地线又电耦合到位于信号和接地线下方的接地平面，并且通过共同的中间 电介质层。 衬底可以形成较大结构的一部分，例如PCB，芯片载体等。
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18.发明申请USE OF CONSENSUS SEQUENCE AS VACCINE ANTIGEN TO ENHANCE RECOGNITION OF VIRULENT VIRAL VARIANTS 有权使用符合序列作为疫苗抗原来增强对病毒性VAR变体的识别公开(公告)号：US20090186045A1
公开(公告)日：2009-07-23
申请号：US11815203
申请日：2006-01-31
申请人： Stuart C. Ray , Andrea L. Cox , David L. Thomas
发明人： Stuart C. Ray , Andrea L. Cox , David L. Thomas
CPC分类号： C07K14/005 , A61K38/00 , A61K39/00 , A61K39/12 , A61K2039/53 , C12N2770/24222 , C12N2770/24234
摘要： The invention provides consensus sequences for hepatitis C virus 1a and 1b. Also provided are non-synonymous changes for each residue of the consensus sequences. These sequences are useful as compositions or vaccines for prophylactic use or treating HCV-infected individuals. Also provided are methods for lessening the chances for a HCV-infected individual to enter a chronic phase of infection and methods of diagnosing an individual with HCV 1a or HCV 1b infection.
摘要翻译： 本发明提供丙型肝炎病毒1a和1b的共有序列。 还提供了对于共有序列的每个残基的非同义的改变。 这些序列可用作用于预防性使用或治疗HCV感染个体的组合物或疫苗。 还提供了减少HCV感染个体进入慢性感染阶段的机会的方法以及用HCV 1a或HCV 1b感染诊断个体的方法。
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公开(公告)号：US07416996B2
公开(公告)日：2008-08-26
申请号：US11349990
申请日：2006-02-09
IPC分类号： H01L21/31
CPC分类号： H01L23/145 , H01L23/4922 , H01L23/49822 , H01L23/49827 , H01L2224/16225 , H05K1/0373 , H05K3/4602 , H05K2201/0209
摘要： A method of making a circuitized substrate comprising a first layer comprised of a dielectric material including a resin material including a predetermined quantity of particles therein and not including continuous fibers, semi-continuous fibers or the like as part thereof, and at least one circuitized layer positioned on the dielectric first layer.
摘要翻译： 一种制造电路化基板的方法，包括由包括其中包含预定量的颗粒的树脂材料的介电材料构成的第一层，并且不包括连续纤维，半连续纤维等作为其一部分，以及至少一个电路层 位于电介质第一层上。
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公开(公告)号：US07078816B2
公开(公告)日：2006-07-18
申请号：US10812890
申请日：2004-03-31
IPC分类号： H01L23/52
CPC分类号： H01L23/145 , H01L23/4922 , H01L23/49822 , H01L23/49827 , H01L2224/16225 , H05K1/0373 , H05K3/4602 , H05K2201/0209
摘要： A circuitized substrate comprising a first layer comprised of a dielectric material including a resin material including a predetermined quantity of particles therein and not including continuous fibers, semi-continuous fibers or the like as part thereof, and at least one circuitized layer positioned on the dielectric first layer. An electrical assembly and a method of making the substrate is also provided, as is a circuitized structure including the circuitized substrate in combination with other circuitized substrates having lesser dense thru-hole patterns. An information handling system incorporating the circuitized substrate of the invention as part thereof is also provided.
摘要翻译： 一种电路化基板，包括由介电材料构成的第一层，所述介电材料包括其中包含预定量的颗粒的树脂材料，并且不包括作为其一部分的连续纤维，半连续纤维等，以及位于所述电介质上的至少一个电路层 第一层 还提供了电气组件和制造衬底的方法，以及包括电路化衬底与具有较小密度通孔图案的其它电路化衬底组合的电路化结构。 还提供了结合本发明的电路化基板作为其一部分的信息处理系统。
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