Abstract:
Provided are an image signal processing apparatus and method. According to the image signal processing method, by simultaneously performing in an integrated manner image denoising and interpolation using 4-directional image gradient information which defines differences in color brightness between adjacent pixels on the basis of edge direction information obtained from a bayer image output from an image sensor, it is possible to improve picture quality and processing speed.
Abstract:
In a device for detecting a chip location and a method of detecting a chip location using the device, the device includes a chuck to which a wafer to be inspected is fixable, an infrared irradiation unit capable of irradiating infrared light to a target semiconductor chip of the wafer from the backside of the wafer, and a scope disposed opposite to the infrared irradiation unit with respect to the wafer. In this manner, it can be readily be determined whether the scope is aligned with a target semiconductor chip to which a probe card is connected for inspection by a backside emission method. Furthermore, the target semiconductor chip to be inspected can be readily detected among semiconductor chips viewed through the scope. Therefore, TAT (turn around time) for inspection can be largely reduced.
Abstract:
A semiconductor apparatus having a through electrode, a semiconductor package, and a method of manufacturing the semiconductor package are provided. The method of includes preparing a substrate including a buried via, the buried via having a first surface at a first end, and the buried via extending from a first substrate surface of the substrate into the substrate; planarizing a second substrate surface of the substrate opposite the first substrate surface to form a through via by exposing a second via surface at a second end of the buried via opposite the first end; forming a conductive capping layer on the exposed second via surface of the through via; and recessing the second substrate surface so that at least a first portion of the through via extends beyond the second substrate surface.
Abstract:
A semiconductor device and a method of fabricating a semiconductor device. The semiconductor device includes an interlayer insulation layer pattern, a metal wire pattern exposed by a passage formed by a via hole formed in the interlayer insulation layer pattern to input and output an electrical signal, and a plated layer pattern directly contacting the metal wire pattern and filling the via hole. The method includes forming an interlayer insulation layer having a metal wire pattern to input and output an electrical signal formed therein, forming a via hole to define a passage that extends through the interlayer insulation layer until at least a part of the metal wire pattern is exposed, and forming a plated layer pattern to fill the via hole and to directly contact the metal wire pattern by using the metal wire pattern exposed through the via hole as a seed metal layer.
Abstract:
A semiconductor device includes a semiconductor substrate and a via electrode. The via electrode has a first portion on the substrate and extends towards the substrate and has a plurality of spikes that extends from the first portion into the substrate, each of the spikes being spaced apart form one another.
Abstract:
Provided are an apparatus for controlling handover between heterogeneous networks, a method of performing handover between heterogeneous networks in a mobile router, and a mobile router. The method includes determining whether a handover to a network employing a different method from a network to which the mobile router belongs is required based on information prestored in the mobile router, the network to which the mobile router belongs determined by current location information of the mobile router and performing the handover according to the result of the determination. Mobility detection time can be reduced by applying the handover technique between wireless/satellite networks based on link trigger and location to a mobile router moving at high speed. Thus, service interruption can be prevented regardless of movement speed, even in a satellite shadow region such as a station.
Abstract:
There is provided a frequency Selective Surface (FSS) structure for multi frequency bands configured with unit cells, each including a loop unit, arranged at regular intervals, wherein each unit cell includes: a dielectric layer; and the loop unit having a fixed width and formed on the dielectric layer, wherein the loop unit includes a first loop and a second loop formed inside the first loop with a predetermined space away from the first loop, each of the first loop and the second loop being formed sinuously in at least one portion.
Abstract:
A semiconductor package includes: a semiconductor chip having a first surface, and a second surface that is opposite to the first surface and allows a semiconductor device to be formed thereon; bonding pads disposed on the second surface of the semiconductor chip; and a metal ion barrier layer disposed on the first surface of the semiconductor chip, and preventing metal ions from penetrating into the semiconductor chip through the first surface of the semiconductor chip. Accordingly, the semiconductor package can obtain a superior semiconductor device by minimizing moisture absorption and effectively blocking the penetration of metal ions.
Abstract:
Provided are an image signal processing apparatus and method. According to the image signal processing method, by simultaneously performing in an integrated manner image denoising and interpolation using 4-directional image gradient information which defines differences in color brightness between adjacent pixels on the basis of edge direction information obtained from a bayer image output from an image sensor, it is possible to improve picture quality and processing speed.
Abstract:
Methods of forming an integrated circuit device include forming an interlayer dielectric layer on a first surface of a semiconductor substrate and then forming an interconnect hole that extends through the interlayer dielectric layer and into the semiconductor substrate. A first sidewall spacer layer is formed on a sidewall of the interconnect hole. The semiconductor substrate at a bottom of the interconnect hole is isotropically etched to define an undercut recess in the semiconductor substrate. This etching step is performed using the first sidewall spacer layer as an etching mask. The interconnect hole and the uncut recess are then filled with a through-via electrode. A second surface of the semiconductor substrate is removed for a sufficient duration to expose the uncut recess containing the through-via electrode.