公开(公告)号：US20170004979A1

公开(公告)日：2017-01-05

申请号：US15268674

申请日：2016-09-19

Applicant: Infineon Technologies AG

Inventor： Manfred Mengel ,  Joachim Mahler ,  Khalil Hosseini ,  Franz-Peter Kalz

IPC: H01L21/48 ,  H01L25/00 ,  H01L21/56

CPC classification number: H01L21/4807 ,  H01L21/4825 ,  H01L21/56 ,  H01L21/77 ,  H01L23/3731 ,  H01L23/3735 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/49586 ,  H01L24/27 ,  H01L24/743 ,  H01L25/50 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48472 ,  H01L2224/49111 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2224/92247 ,  H01L2924/07802 ,  H01L2924/12032 ,  H01L2924/1301 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A chip arrangement is provided, the chip arrangement, including a carrier; a first chip electrically connected to the carrier; a ceramic layer disposed over the carrier; and a second chip disposed over the ceramic layer; wherein the ceramic layer has a porosity in the range from about 3% to about 70%.

Abstract translation: 提供了芯片布置，芯片布置包括载体; 电连接到所述载体的第一芯片; 布置在所述载体上的陶瓷层; 以及设置在所述陶瓷层上的第二芯片; 其中所述陶瓷层的孔隙率在约3％至约70％的范围内。

公开(公告)号：US20170003180A1

公开(公告)日：2017-01-05

申请号：US15268244

申请日：2016-09-16

Applicant: Infineon Technologies AG

Inventor： Franz-Peter Kalz ,  Horst Theuss ,  Bernhard Winkler ,  Khalil Hosseini ,  Joachim Mahler ,  Manfred Mengel

IPC: G01L1/18 ,  G01L19/02 ,  B81B3/00

CPC classification number: B81B7/02 ,  B81B3/0021 ,  B81B3/0072 ,  B81B2201/0235 ,  B81B2201/0264 ,  B81C2203/0154 ,  G01L1/18 ,  G01L9/0072 ,  G01L19/0092 ,  G01L19/02

Abstract: A micromechanical semiconductor sensing device is disclosed. In an embodiment the sensing device includes a micromechanical sensing structure being configured to yield an electrical sensing signal, and a piezoresistive sensing device provided in the micromechanical sensing structure, the piezoresistive sensing device being arranged to sense a mechanical stress disturbing the electrical sensing signal and being configured to yield an electrical disturbance signal based on the sensed mechanical stress disturbing the electrical sensing signal.

Abstract translation: 公开了一种微机械半导体感测装置。 在一个实施例中，感测装置包括微机械感测结构，其被配置为产生电感测信号，以及设置在微机械感测结构中的压阻感测装置，所述压阻感测装置布置成感测扰动电感测信号的机械应力， 被配置为基于感测到的电感测信号的机械应力产生电干扰信号。

公开(公告)号：US20160035700A1

公开(公告)日：2016-02-04

申请号：US14880373

申请日：2015-10-12

Applicant: Infineon Technologies AG

Inventor： Khalil Hosseini ,  Joachim Mahler ,  Franz-Peter Kalz ,  Joachim Voelter ,  Ralf Wombacher

IPC: H01L25/065 ,  H01L23/498 ,  H01L23/31 ,  H01L23/495

CPC classification number: H01L25/0655 ,  H01L23/3114 ,  H01L23/3121 ,  H01L23/3135 ,  H01L23/492 ,  H01L23/49558 ,  H01L23/49575 ,  H01L23/49586 ,  H01L23/49811 ,  H01L23/49838 ,  H01L23/49894 ,  H01L24/19 ,  H01L24/20 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/73 ,  H01L24/83 ,  H01L24/92 ,  H01L24/97 ,  H01L2224/04105 ,  H01L2224/06181 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/82031 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2224/83095 ,  H01L2224/83191 ,  H01L2224/83203 ,  H01L2224/8382 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/82 ,  H01L2224/83

Abstract: A chip package is provided. The chip package may include an electrically conductive carrier; at least one first chip including a first side and a second side opposite of the first side, with its second side being electrically contacted to the electrically conductive carrier; an insulating layer over at least a part of the electrically conductive carrier and over at least a part of the first side of the chip; at least one second chip arranged over the insulating layer and next to the first chip; encapsulating material over the first chip and the second chip; and electrical contacts which extend through the encapsulation material to at least one contact of the at least one first chip and to at least one contact of the at least one second chip.

Abstract translation: 提供芯片封装。 芯片封装可以包括导电载体; 至少一个第一芯片，包括第一侧和与第一侧相对的第二侧，其第二侧与导电载体电接触; 在所述导电载体的至少一部分上方以及所述芯片的第一侧的至少一部分上的绝缘层; 至少一个第二芯片布置在所述绝缘层上并且靠近所述第一芯片; 封装材料在第一芯片和第二芯片上; 以及电触头，其通过封装材料延伸到至少一个第一芯片的至少一个触点和至少一个第二芯片的至少一个触点。

公开(公告)号：US20150217994A1

公开(公告)日：2015-08-06

申请号：US14687835

申请日：2015-04-15

Applicant: Infineon Technologies AG

Inventor： Franz-Peter Kalz ,  Horst Theuss ,  Bernhard Winkler ,  Khalil Hosseini ,  Joachim Mahler ,  Manfred Mengel

IPC: B81B7/02 ,  G01L19/02 ,  B81B3/00 ,  G01L1/18

CPC classification number: B81B7/02 ,  B81B3/0021 ,  B81B3/0072 ,  B81B2201/0235 ,  B81B2201/0264 ,  B81C2203/0154 ,  G01L1/18 ,  G01L9/0072 ,  G01L19/0092 ,  G01L19/02

Abstract: Micromechanical semiconductor sensing device comprises a micromechanical sensing structure being configured to yield an electrical sensing signal, and a piezoresistive sensing device provided in the micromechanical sensing structure, said piezoresistive sensing device being arranged to sense a mechanical stress disturbing the electrical sensing signal and being configured to yield an electrical disturbance signal based on the sensed mechanical stress disturbing the electrical sensing signal.

Abstract translation: 微机械半导体感测装置包括被配置为产生电感测信号的微机械感测结构和设置在微机械感测结构中的压阻感测装置，所述压阻感测装置被布置成感测扰动电感测信号的机械应力，并被配置为 基于感测到的电感测信号的机械应力产生电干扰信号。

公开(公告)号：US09070568B2

公开(公告)日：2015-06-30

申请号：US13951556

申请日：2013-07-26

Applicant: Infineon Technologies AG

Inventor： Khalil Hosseini ,  Joachim Mahler ,  Georg Meyer-Berg

IPC: H01L23/34 ,  H01L25/065 ,  H01L23/12 ,  H01L23/00 ,  H01L49/02

CPC classification number: H01L25/0657 ,  H01L23/12 ,  H01L23/492 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/85 ,  H01L25/072 ,  H01L25/16 ,  H01L25/18 ,  H01L28/00 ,  H01L2224/04105 ,  H01L2224/05639 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2224/16265 ,  H01L2224/24137 ,  H01L2224/24195 ,  H01L2224/24226 ,  H01L2224/24246 ,  H01L2224/24265 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73259 ,  H01L2224/73267 ,  H01L2224/85 ,  H01L2224/85399 ,  H01L2225/0651 ,  H01L2225/06572 ,  H01L2225/06582 ,  H01L2924/00014 ,  H01L2924/12036 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2924/00 ,  H01L2924/013 ,  H01L2924/0105 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

Abstract: A chip package includes an electrically conducting chip carrier and at least one first semiconductor chip attached to the electrically conducting chip carrier. The chip package further includes a passive component. The electrically conducting chip carrier, the at least one first semiconductor chip, and the passive component are embedded in an insulating laminate structure.

Abstract translation: 芯片封装包括导电芯片载体和连接到导电芯片载体的至少一个第一半导体芯片。 芯片封装进一步包括无源元件。 导电芯片载体，至少一个第一半导体芯片和无源部件被嵌入绝缘层压结构中。

公开(公告)号：US08896128B2

公开(公告)日：2014-11-25

申请号：US13678675

申请日：2012-11-16

Applicant: Infineon Technologies AG

Inventor： Khalil Hosseini ,  Joachim Mahler ,  Georg Meyer-Berg

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L21/56

CPC classification number: H01L23/481 ,  H01L21/56 ,  H01L21/6835 ,  H01L21/76898 ,  H01L23/3114 ,  H01L23/3121 ,  H01L23/3171 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An integrated circuit is provided, the integrated circuit including: a chip having a first chip side and a second chip side opposite to the first chip side, the chip having at least one contact area on the second chip side; encapsulation material at least partially covering the chip; and at least one contact via comprising electrical conductive material contacting the at least one contact area and extending through the encapsulation material and through the chip between the first chip side and the second chip side.

Abstract translation: 提供一种集成电路，所述集成电路包括：具有第一芯片侧和与所述第一芯片侧相对的第二芯片侧的芯片，所述芯片在所述第二芯片侧具有至少一个接触区域; 封装材料至少部分覆盖芯片; 以及至少一个接触通孔，其包括与所述至少一个接触区域接触并延伸穿过所述封装材料并通过所述芯片在所述第一芯片侧和所述第二芯片侧之间的导电材料。

公开(公告)号：US20140264950A1

公开(公告)日：2014-09-18

申请号：US13798141

申请日：2013-03-13

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Rainer Steiner ,  Edward Fuergut ,  Khalil Hosseini ,  Georg Meyer-Berg ,  Joachim Mahler

IPC: H01L23/00

CPC classification number: H01L23/562 ,  H01L23/3107 ,  H01L23/49513 ,  H01L23/49517 ,  H01L23/49562 ,  H01L24/06 ,  H01L24/24 ,  H01L24/25 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/82 ,  H01L24/92 ,  H01L2224/04105 ,  H01L2224/06181 ,  H01L2224/24246 ,  H01L2224/2518 ,  H01L2224/2929 ,  H01L2224/29387 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/92144 ,  H01L2224/92244 ,  H01L2924/07802 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/00

Abstract: In various embodiments, a chip arrangement is provided. The chip arrangement may include a chip carrier and a chip mounted on the chip carrier. The chip may include at least two chip contacts and an insulating adhesive between the chip and the chip carrier to adhere the chip to the chip carrier. The at least two chip contacts may be electrically coupled to the chip carrier.

Abstract translation: 在各种实施例中，提供了芯片布置。 芯片布置可以包括芯片载体和安装在芯片载体上的芯片。 芯片可以包括至少两个芯片触点和芯片与芯片载体之间的绝缘粘合剂，以将芯片粘附到芯片载体上。 所述至少两个芯片触点可以电耦合到芯片载体。

公开(公告)号：US20140084302A1

公开(公告)日：2014-03-27

申请号：US13625893

申请日：2012-09-25

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Khalil Hosseini ,  Joachim Mahler ,  Anton Mauder

IPC: H01L23/498 ,  H01L29/16 ,  H01L21/762 ,  H01L29/20

CPC classification number: H01L21/50 ,  H01L21/6835 ,  H01L21/76898 ,  H01L23/3171 ,  H01L24/03 ,  H01L24/05 ,  H01L24/08 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/80 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68377 ,  H01L2224/03462 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05611 ,  H01L2224/05618 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/0566 ,  H01L2224/05664 ,  H01L2224/08145 ,  H01L2224/11462 ,  H01L2224/13009 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13118 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1316 ,  H01L2224/13164 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/27416 ,  H01L2224/29124 ,  H01L2224/29144 ,  H01L2224/29188 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/80203 ,  H01L2224/80801 ,  H01L2224/80893 ,  H01L2224/80894 ,  H01L2224/83805 ,  H01L2224/8385 ,  H01L2224/9202 ,  H01L2224/94 ,  H01L2924/01322 ,  H01L2924/12032 ,  H01L2924/12042 ,  H01L2924/1301 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2224/83 ,  H01L2924/014 ,  H01L2224/11 ,  H01L2224/03 ,  H01L2924/00

Abstract: An integrated circuit is provided, the integrated circuit including: a carrier including at least one electronic component and at least one contact area disposed on a first side of the carrier, wherein the at least one electronic component is electrically connected to the at least one contact area; an inorganic material layer wafer bonded to the first side of the carrier, wherein the carrier has a first coefficient of thermal expansion, and wherein the inorganic material layer has a second coefficient of thermal expansion, wherein the second coefficient of thermal expansion has a difference of less than 100% compared with the first coefficient of thermal expansion; and at least one contact via formed through the inorganic material layer, wherein the at least one contact via contacts the at least one contact area.

Abstract translation: 提供集成电路，集成电路包括：载体，其包括至少一个电子部件和布置在载体的第一侧上的至少一个接触区域，其中所述至少一个电子部件电连接到所述至少一个触点 区; 与所述载体的第一侧接合的无机材料层晶片，其中所述载体具有第一热膨胀系数，并且其中所述无机材料层具有第二热膨胀系数，其中所述第二热膨胀系数具有 与第一热膨胀系数相比低于100％; 以及通过无机材料层形成的至少一个接触孔，其中所述至少一个接触通孔接触所述至少一个接触区域。

公开(公告)号：US09984897B2

公开(公告)日：2018-05-29

申请号：US15268674

申请日：2016-09-19

Applicant: Infineon Technologies AG

Inventor： Manfred Mengel ,  Joachim Mahler ,  Khalil Hosseini ,  Franz-Peter Kalz

IPC: H01L21/48 ,  H01L23/373 ,  H01L21/77 ,  H01L23/495 ,  H01L23/00 ,  H01L21/56 ,  H01L25/00

CPC classification number: H01L21/4807 ,  H01L21/4825 ,  H01L21/56 ,  H01L21/77 ,  H01L23/3731 ,  H01L23/3735 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/49586 ,  H01L24/27 ,  H01L24/743 ,  H01L25/50 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48472 ,  H01L2224/49111 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2224/92247 ,  H01L2924/07802 ,  H01L2924/12032 ,  H01L2924/1301 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A chip arrangement is provided, the chip arrangement, including a carrier; a first chip electrically connected to the carrier; a ceramic layer disposed over the carrier; and a second chip disposed over the ceramic layer; wherein the ceramic layer has a porosity in the range from about 3% to about 70%.

公开(公告)号：US09790086B2

公开(公告)日：2017-10-17

申请号：US15268244

申请日：2016-09-16

Applicant: Infineon Technologies AG

Inventor： Franz-Peter Kalz ,  Horst Theuss ,  Bernhard Winkler ,  Khalil Hosseini ,  Joachim Mahler ,  Manfred Mengel

IPC: G01B7/16 ,  B81B7/02 ,  G01L9/00 ,  G01L19/02 ,  G01L19/00 ,  B81B3/00 ,  G01L1/18

CPC classification number: B81B7/02 ,  B81B3/0021 ,  B81B3/0072 ,  B81B2201/0235 ,  B81B2201/0264 ,  B81C2203/0154 ,  G01L1/18 ,  G01L9/0072 ,  G01L19/0092 ,  G01L19/02

Abstract: A micromechanical semiconductor sensing device is disclosed. In an embodiment the sensing device includes a micromechanical sensing structure being configured to yield an electrical sensing signal, and a piezoresistive sensing device provided in the micromechanical sensing structure, the piezoresistive sensing device being arranged to sense a mechanical stress disturbing the electrical sensing signal and being configured to yield an electrical disturbance signal based on the sensed mechanical stress disturbing the electrical sensing signal.