公开(公告)号：US20150318610A1

公开(公告)日：2015-11-05

申请号：US14701117

申请日：2015-04-30

Applicant: Samsung Electronics Co., Ltd. ,  Korea Advanced Institute Of Science and Technology

Inventor： Won-Seok Lee ,  Yong-Hoon Kim ,  Kyoung-Sub Oh ,  Jong-Won Yu ,  Sol-Ji Yoo

IPC: H01Q3/24 ,  H04B7/04 ,  H04L25/02 ,  H01Q3/34 ,  H01Q3/28

CPC classification number: H01Q3/24 ,  H01Q1/1257 ,  H01Q1/242 ,  H01Q3/26 ,  H01Q3/28 ,  H01Q3/34 ,  H01Q21/06 ,  H04B7/0408 ,  H04B7/0617 ,  H04B17/12 ,  H04L25/02 ,  H04L25/0278

Abstract: A method for adjusting a beam pattern in a beam pattern adjusting apparatus in a communication system supporting a Beam Division Multiple Access (BDMA) scheme is provided. The method includes determining whether a Voltage Standing Wave Ratio (VSWR) value for each antenna included in an antenna array included in the beam pattern adjusting apparatus is greater than or equal to a threshold VSWR value, if it is determined that an antenna of the antenna array has a VSWR value that is greater than or equal to the threshold VSWR, detecting whether each of the antenna elements is operable, and if it is determined that at least one of the antennas is inoperable, adjusting a beam pattern of at least one of the antennas that is operable.

Abstract translation: 提供了一种用于在支持光束分多址（BDMA）方案的通信系统中调整波束图案调整装置中的波束图案的方法。 该方法包括确定包括在波束图案调节装置中的天线阵列中包括的每个天线的电压驻波比（VSWR）值是否大于或等于阈值VSWR值，如果确定天线的天线 阵列具有大于或等于阈值VSWR的VSWR值，检测每个天线元件是否可操作，以及如果确定天线中的至少一个不可操作，则调整至少一个天线的波束图案 可操作的天线。

公开(公告)号：US08981581B2

公开(公告)日：2015-03-17

申请号：US14190079

申请日：2014-02-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Heung-Kyu Kwon ,  Seong-Ho Shin ,  Yun-Seok Choi ,  Yong-Hoon Kim

IPC: H01L23/48 ,  H01L23/02 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L21/56 ,  H01L25/10 ,  H01L25/065

CPC classification number: H01L24/06 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49866 ,  H01L24/73 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/05554 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45139 ,  H01L2224/48227 ,  H01L2224/48229 ,  H01L2224/49175 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/06562 ,  H01L2225/06565 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014

Abstract: A package stack structure may an upper package include an upper package substrate having a first edge and a second edge opposite to the first edge. The upper package substrate has a first region arranged near the first edge and a second region arranged near the second edge. A first upper semiconductor device is mounted on the upper package substrate. The package stack structure may also include a lower package having a lower package substrate and a lower semiconductor device. The lower package is connected to the upper package through a plurality of inter-package connectors. The plurality of the inter-package connectors may include first inter-package connectors configured to transmit data signals; second inter-package connectors configured to transmit address/control signals; third inter-package connectors configured to provide a supply voltage for an address/control circuit; and fourth inter-package connectors configured to provide a supply voltage for a data circuit.

Abstract translation: 封装堆叠结构可以是上封装包括具有第一边缘和与第一边缘相对的第二边缘的上封装基板。 上封装衬底具有布置在第一边缘附近的第一区域和布置在第二边缘附近的第二区域。 第一上半导体器件安装在上封装衬底上。 封装堆叠结构还可以包括具有下封装衬底和下半导体器件的下封装。 下封装通过多个封装间连接器连接到上封装。 多个包装间连接器可以包括被配置为传送数据信号的第一包装间连接器; 配置成发送地址/控制信号的第二串联连接器连接器; 第三组件间连接器，被配置为提供地址/控制电路的电源电压; 以及被配置为提供数据电路的电源电压的第四组件间连接器。

公开(公告)号：US20130200531A1

公开(公告)日：2013-08-08

申请号：US13674331

申请日：2012-11-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Bok-Sik Myung ,  Chul-Woo Kim ,  Kyung-Tae Na ,  Young-Bae Kim ,  Yong-Hoon Kim ,  Hee-Seok Lee

IPC: H05K1/02 ,  H01L23/28

CPC classification number: H05K1/0298 ,  H01L23/28 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/12042 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/18161 ,  H05K1/02 ,  H05K3/4602 ,  H05K3/4644 ,  H05K2201/0191 ,  H05K2201/09136 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/00

Abstract: A circuit board is provided including a core insulation film having a thickness and including a first surface and an opposite second surface, an upper stack structure and a lower stack structure. The upper stack structure has a thickness and has an upper conductive pattern having a thickness and an overlying upper insulation film stacked on the first surface of the core insulation film. The lower stack structure has a thickness and has a lower conductive pattern having a thickness and an overlying lower insulation film stacked on the second surface of the core insulation film. A ratio P of a sum of the thicknesses of the upper conductive pattern and the lower conductive pattern to a sum of the thicknesses of the core insulation film, the upper stack structure and the lower stack structure is in a range from about 0.05 to about 0.2.

Abstract translation: 提供一种电路板，包括具有厚度并包括第一表面和相对的第二表面的芯绝缘膜，上堆叠结构和下堆叠结构。 上堆叠结构具有厚度并且具有层叠在芯绝缘膜的第一表面上的厚度的上导电图案和覆盖的上绝缘膜。 下堆叠结构具有厚度并且具有厚度较低的导电图案和堆叠在芯绝缘膜的第二表面上的覆盖的下绝缘膜。 上导电图案和下导电图案的厚度之和与芯绝缘膜，上堆叠结构和下堆叠结构的厚度之和的比率P在约0.05至约0.2的范围内 。

公开(公告)号：US09691691B2

公开(公告)日：2017-06-27

申请号：US14562656

申请日：2014-12-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yong-Hoon Kim

IPC: H01L23/495 ,  H01L23/50 ,  H01L23/00 ,  H01L25/065

CPC classification number: H01L23/49575 ,  H01L23/49524 ,  H01L23/49589 ,  H01L23/50 ,  H01L24/24 ,  H01L24/73 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/06145 ,  H01L2224/24145 ,  H01L2224/24226 ,  H01L2224/24246 ,  H01L2224/24265 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49175 ,  H01L2224/73227 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06524 ,  H01L2225/06562 ,  H01L2225/06565 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/00

Abstract: A semiconductor package having a structure in which a decoupling capacitor is disposed to be adjacent with a semiconductor chip using a vertical chip interconnection (VCI) to improve power integrity. The semiconductor package includes a semiconductor substrate including a first finger pad and a second finger pad, a semiconductor chip mounted on the semiconductor substrate and including a first chip pad and a second chip pad, a bonding tape electrically connecting the first finger pad and the first chip pad, and a bonding wire electrically connecting the second finger pad and the second chip pad. Here, the bonding tape is formed to make contact with a sidewall of the semiconductor chip in a vertical direction of the semiconductor chip.

公开(公告)号：US09496226B2

公开(公告)日：2016-11-15

申请号：US14254969

申请日：2014-04-17

Applicant: SAMSUNG Electronics Co., Ltd.

Inventor： Yong-Hoon Kim ,  In-Ho Choi ,  Keung-Beum Kim

IPC: H01L23/552 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L23/522 ,  H01L25/065 ,  H01L25/10 ,  H01L21/78 ,  H01L21/48

CPC classification number: H01L23/552 ,  H01L21/4814 ,  H01L21/78 ,  H01L23/3121 ,  H01L23/3135 ,  H01L23/3192 ,  H01L23/49816 ,  H01L23/5225 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/92 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/9202 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2225/06565 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/0102 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01056 ,  H01L2924/01066 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05552 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device, a semiconductor package, and an electronic device are provided. The electronic device includes a first semiconductor package disposed on a circuit substrate. A second semiconductor package is provided on the circuit substrate and spaced apart from the first semiconductor package. An insulating electromagnetic shielding structure is provided on the top and the lateral surfaces of the first semiconductor package. A conductive electromagnetic shielding structure is provided on the circuit substrate to cover the first and second semiconductor packages and the insulating electromagnetic shielding structure.

Abstract translation: 提供半导体器件，半导体封装和电子器件。 电子设备包括设置在电路基板上的第一半导体封装。 第二半导体封装设置在电路基板上并与第一半导体封装间隔开。 绝缘电磁屏蔽结构设置在第一半导体封装的顶表面和侧表面上。 导电电磁屏蔽结构设置在电路基板上以覆盖第一和第二半导体封装和绝缘电磁屏蔽结构。

公开(公告)号：US09472539B2

公开(公告)日：2016-10-18

申请号：US14992174

申请日：2016-01-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yong-Hoon Kim ,  Hyo-Soon Kang ,  Hee-Seok Lee ,  Jang-Ho Cho

IPC: H01L23/48 ,  H01L25/18 ,  H01L23/50 ,  H01L23/498 ,  H01L25/065 ,  H01L25/10 ,  G11C5/02 ,  H01L23/00 ,  H01L21/56 ,  H01L23/31

CPC classification number: H01L25/18 ,  G11C5/025 ,  H01L21/563 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/50 ,  H01L24/17 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2924/00014 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor chip including a substrate, a first data pad arranged on the substrate, and a first control/address pad arranged on the substrate, wherein the first data pad is arranged in an edge region of the substrate, and the first control/address pad is arranged in a center region of the substrate.

Abstract translation: 一种半导体芯片，包括衬底，布置在衬底上的第一数据焊盘和布置在衬底上的第一控制/寻址焊盘，其中第一数据焊盘布置在衬底的边缘区域中，并且第一控制/地址焊盘 布置在基板的中心区域中。

公开(公告)号：US09461360B2

公开(公告)日：2016-10-04

申请号：US14701117

申请日：2015-04-30

Applicant: Samsung Electronics Co., Ltd. ,  Korea Advanced Institute Of Science and Technology

Inventor： Won-Seok Lee ,  Yong-Hoon Kim ,  Kyoung-Sub Oh ,  Jong-Won Yu ,  Sol-Ji Yoo

IPC: H04L27/00 ,  H01Q3/24 ,  H01Q3/34 ,  H01Q3/28 ,  H04L25/02 ,  H04B7/04 ,  H01Q1/12 ,  H01Q1/24 ,  H01Q3/26 ,  H01Q21/06 ,  H04B7/06 ,  H04B17/12

CPC classification number: H01Q3/24 ,  H01Q1/1257 ,  H01Q1/242 ,  H01Q3/26 ,  H01Q3/28 ,  H01Q3/34 ,  H01Q21/06 ,  H04B7/0408 ,  H04B7/0617 ,  H04B17/12 ,  H04L25/02 ,  H04L25/0278

Abstract: A method for adjusting a beam pattern in a beam pattern adjusting apparatus in a communication system supporting a Beam Division Multiple Access (BDMA) scheme is provided. The method includes determining whether a Voltage Standing Wave Ratio (VSWR) value for each antenna included in an antenna array included in the beam pattern adjusting apparatus is greater than or equal to a threshold VSWR value, if it is determined that an antenna of the antenna array has a VSWR value that is greater than or equal to the threshold VSWR, detecting whether each of the antenna elements is operable, and if it is determined that at least one of the antennas is inoperable, adjusting a beam pattern of at least one of the antennas that is operable.

Abstract translation: 提供了一种用于在支持光束分多址（BDMA）方案的通信系统中调整波束图案调整装置中的波束图案的方法。 该方法包括确定包括在波束图案调节装置中的天线阵列中包括的每个天线的电压驻波比（VSWR）值是否大于或等于阈值VSWR值，如果确定天线的天线 阵列具有大于或等于阈值VSWR的VSWR值，检测每个天线元件是否可操作，以及如果确定天线中的至少一个不可操作，则调整至少一个天线的波束图案 可操作的天线。

公开(公告)号：US09065396B2

公开(公告)日：2015-06-23

申请号：US13726901

申请日：2012-12-26

Applicant: Samsung Electronics Co. Ltd.

Inventor： Mi-Hyun Son ,  Yong-Hoon Kim ,  Byung-Tae Yoon ,  Jong-Wook Zeong ,  Dong-Geun Lee ,  Jae-Hun Lee ,  Song-Cheol Hong

IPC: H04K1/02 ,  H04L25/03 ,  H04L25/49 ,  H03F1/32 ,  H04B1/04 ,  H03F3/24 ,  H03F3/68

CPC classification number: H03F1/3241 ,  H03F1/3247 ,  H03F1/3294 ,  H03F3/24 ,  H03F3/68 ,  H03F2200/102 ,  H03F2200/336 ,  H04B1/0475 ,  H04B2001/0425

Abstract: Provided is a method in which a Digital Pre-Distorter (DPD) performs digital pre-distortion on a received In-phase (I) signal, a received Quadrature-phase (Q) signal, a feedback I signal, and a feedback Q signal; a mixer mixes a signal output from the DPD with a frequency signal output from an oscillator; each of n phase shifters phase-shifts a signal output from the mixer according to a preset beamforming pattern; each of n Power Amplifiers (PAs) amplifies a signal output from an associated phase shifter according to a gain, the PAs connected to the associated phase shifter on a one-to-one basis; each of n envelope detectors detects an envelope signal from a signal output from an associated PA, the envelope detector connected to the associated PA on a one-to-one basis; and a control unit determines whether the n PAs operate normally, using the envelope signals output from the n envelope detectors.

Abstract translation: 提供了一种数字预失真器（DPD）对接收到的同相（I）信号，接收的正交相（Q）信号，反馈I信号和反馈Q信号进行数字预失真的方法 ; 混频器将从DPD输出的信号与从振荡器输出的频率信号混合; 每个n个移相器根据预设的波束形成模式将从混频器输出的信号相移; n个功率放大器（PA）中的每一个根据增益放大来自相关移相器的信号，一对一连接到相关联的移相器的PA; n个包络检测器中的每一个检测从相关联的PA输出的信号的包络信号，包络检测器以一对一的方式连接到相关联的PA; 并且控制单元使用从n个包络检测器输出的包络信号确定n个PA是否正常工作。