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    METHOD OF PRODUCING A SEMICONDUCTOR DEVICE HAVING AN INTERCONNECT THROUGH THE SUBSTRATE
    11.
    发明申请
    METHOD OF PRODUCING A SEMICONDUCTOR DEVICE HAVING AN INTERCONNECT THROUGH THE SUBSTRATE 有权
    生产通过基板的互连的半导体器件的方法

    公开(公告)号：US20140038410A1

    公开(公告)日：2014-02-06

    申请号：US13956274

    申请日：2013-07-31

    Applicant: ams AG

    Inventor： Jochen KRAFT ,  Franz SCHRANK ,  Martin SCHREMS

    IPC: H01L21/768

    CPC classification number: H01L21/76898 ,  H01L21/76831 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A semiconductor substrate (1) is provided on a main surface (14) with an intermetal dielectric (4) including metal planes (5) and on an opposite rear surface (15) with an insulation layer (2) and an electrically conductive connection pad (7). An etch stop layer (6) is applied on the intermetal dielectric to prevent a removal of the intermetal dielectric above the metal planes during subsequent method steps. An opening (9) having a side wall (3) and a bottom (13) is formed from the main surface through the substrate above the connection pad. A side wall spacer (10) is formed on the side wall by a production and subsequent partial removal of a dielectric layer (11). The insulation layer is removed from the bottom to uncover an area of the connection pad. A metal layer is applied in the opening and is provided for an interconnect through the substrate.

    Abstract translation: 在具有包括金属平面（5）的金属间电介质（4）和具有绝缘层（2）的相对后表面（15）的主表面（14）上设置半导体基板（1）和导电连接垫 （7）。 在金属间电介质上施加蚀刻停止层（6），以防止在随后的方法步骤期间去除金属平面之上的金属间电介质。 具有侧壁（3）和底部（13）的开口（9）通过连接垫上方的基板从主表面形成。 通过产生并随后部分去除电介质层（11），在侧壁上形成侧壁间隔物（10）。 绝缘层从底部移除以露出连接垫的一个区域。 金属层被施加在开口中并且被提供用于通过基底的互连。

    METHOD FOR MANUFACTURING AN OPTICAL SENSOR AND OPTICAL SENSOR
    12.
    发明申请
    METHOD FOR MANUFACTURING AN OPTICAL SENSOR AND OPTICAL SENSOR 审中-公开

    公开(公告)号：US20200313031A1

    公开(公告)日：2020-10-01

    申请号：US16756025

    申请日：2018-10-15

    Applicant: ams AG

    Inventor： Gregor TOSCHKOFF ,  Thomas BODNER ,  Franz SCHRANK ,  Miklos LABODI ,  Joerg SIEGERT ,  Martin SCHREMS

    IPC: H01L31/18 ,  G01J1/04 ,  G01J1/02 ,  H01L31/0216 ,  H01L31/02 ,  H01L31/0203

    Abstract: A method for manufacturing an optical sensor is provided. The method comprises providing an optical sensor arrangement which comprises at least two optical sensor elements on a carrier, where the optical sensor arrangement comprises a light entrance surface at the side of the optical sensor elements facing away from the carrier. The method further comprises forming a trench between two optical sensor elements in a vertical direction which is perpendicular to the main plane of extension of the carrier, where the trench extends from the light entrance surface of the sensor arrangement at least to the carrier. Moreover, the method comprises coating the trench with an opaque material, forming electrical contacts for the at least two optical sensor elements on a back side of the carrier facing away from the optical sensor elements, and forming at least one optical sensor by dicing the optical sensor arrangement along the trench. Each optical sensor comprises an optical sensor element, and the light entrance surface is free of electrical contacts and at least partially free of the opaque material above the optical sensor elements. Furthermore, an optical sensor is provided.

    DICING METHOD
    13.
    发明申请
    DICING METHOD 审中-公开
    定义方法

    公开(公告)号：US20170062277A1

    公开(公告)日：2017-03-02

    申请号：US15118836

    申请日：2015-02-09

    Applicant: ams AG

    Inventor： Martin SCHREMS ,  Bernhard STERING ,  Franz SCHRANK

    IPC: H01L21/78 ,  H01L21/768 ,  H01L23/00 ,  H01L21/683

    CPC classification number: H01L21/78 ,  H01L21/6835 ,  H01L21/76898 ,  H01L24/11 ,  H01L2224/02372 ,  H01L2224/05569

    Abstract: The dicing method comprises the steps of providing a substrate (1) of semiconductor material, the substrate having a main surface (10), where integrated components (3) of chips (13) are arranged, and a rear surface (11) opposite the main surface, fastening a first handling wafer above the main surface, thinning the substrate at the rear surface, and forming trenches (20) penetrating the substrate and separating the chips by a single etching step after the substrate has been thinned.

    Abstract translation: 切割方法包括以下步骤：提供半导体材料的基板（1），所述基板具有主表面（10），其中布置有芯片（13）的集成部件（3）和与所述芯片（13）相对的后表面 主表面，紧固在主表面上方的第一处理晶片，使后表面上的基板变薄，并且在基板变薄之后，形成穿透基板的沟槽（20）并通过单个蚀刻步骤分离芯片。

    METHOD OF PRODUCING A REMOVABLE WAFER CONNECTION AND CARRIER FOR WAFER SUPPORT
    15.
    发明申请
    METHOD OF PRODUCING A REMOVABLE WAFER CONNECTION AND CARRIER FOR WAFER SUPPORT 有权
    生产可移动波浪连接的方法和用于波形支持的载波

    公开(公告)号：US20150348817A1

    公开(公告)日：2015-12-03

    申请号：US14654471

    申请日：2013-12-19

    Applicant: AMS AG

    Inventor： Thomas BODNER ,  Joerg SIEGERT ,  Martin SCHREMS

    IPC: H01L21/683

    CPC classification number: H01L21/6835 ,  H01L2221/68318 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68381 ,  Y10T156/10 ,  Y10T156/1111

    Abstract: A relief structure is formed on a surface of a carrier provided for accommodating a wafer, which is fastened to the carrier by a removable adhesive contacting the carrier. The relief structure, which may be spatially confined to the centre of the carrier, reduces the strength of adhesion between the wafer and the carrier. If the adhesive is appropriately selected and maintains the connection between the wafer and the carrier at elevated temperatures, further process steps can be performed at temperatures of typically 300° C. or more. The subsequent mechanical separation of the adhesive joint is facilitated by the relief structure on the carrier.

    Abstract translation: 浮雕结构形成在用于容纳晶片的载体的表面上，该晶片通过与载体接触的可移除的粘合剂固定到载体上。 可以在空间上限制在载体的中心的浮雕结构降低了晶片和载体之间的粘合强度。 如果适当地选择粘合剂并且在升高的温度下维持晶片和载体之间的连接，则可以在通常为300℃或更高的温度下进行进一步的工艺步骤。 粘合剂接头随后的机械分离由载体上的浮雕结构促进。

    3D-INTEGRATED OPTICAL SENSOR AND METHOD OF PRODUCING A 3D-INTEGRATED OPTICAL SENSOR
    16.
    发明申请
    3D-INTEGRATED OPTICAL SENSOR AND METHOD OF PRODUCING A 3D-INTEGRATED OPTICAL SENSOR 审中-公开

    公开(公告)号：US20190237500A1

    公开(公告)日：2019-08-01

    申请号：US16312145

    申请日：2017-06-02

    Applicant: ams AG

    Inventor： Hubert Enichlmair ,  Martin SCHREMS ,  Gregor Toschkoff ,  Thomas Bodner ,  Mario Manninger

    IPC: H01L27/146

    CPC classification number: H01L27/14621 ,  H01L27/14623 ,  H01L27/14636 ,  H01L27/14685

    Abstract: A 3D-Integrated optical sensor comprises a semiconductor substrate, an integrated circuit, a wiring, a filter layer, a transparent spacer layer, and an on-chip diffuser. The semiconductor substrate has a main surface. The integrated circuit comprises at least one light sensitive area and is arranged in the substrate at or near the main surface. The wiring provides an electrical connection to the integrated circuit and is connected to the integrated circuit. The wiring is arranged on or in the semiconductor substrate. The filter layer has a direction dependent transmission characteristic and is arranged on the integrated circuit. In fact, the filter layer at least covers the light sensitive area. The transparent spacer layer is arranged on the main surface and, at least partly, encloses the filter layer. A spacer thickness is arranged to limit a spectral shift of the filter layer. The on-chip diffuser is arranged on the transparent spacer layer.

    METHOD OF APPLICATION OF A CARRIER TO A DEVICE WAFER
    19.
    发明申请
    METHOD OF APPLICATION OF A CARRIER TO A DEVICE WAFER 审中-公开
    将载体应用于器件滤波器的方法

    公开(公告)号：US20150340264A1

    公开(公告)日：2015-11-26

    申请号：US14759400

    申请日：2014-01-08

    Applicant: AMS AG

    Inventor： Joerg SIEGERT ,  Martin SCHREMS ,  Jochen KRAFT ,  Franz SCHRANK

    IPC: H01L21/683 ,  H01L21/768

    CPC classification number: H01L21/6836 ,  H01L21/6835 ,  H01L21/76898 ,  H01L2221/68318 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68381 ,  Y10T156/10

    Abstract: A device wafer having a main surface including an edge region and a carrier having a further main surface including an annular surface region corresponding to the edge region of the device wafer are provided. An adhesive is applied in the edge region and/or in the annular surface region, but not on the remaining areas of the main surfaces. The device wafer is fastened to the carrier by the adhesive. The main surface and the further main surface are brought into contact with one another when the device wafer is fastened to the carrier, while the main surface and the further main surface are fastened to one another only in the edge region. The device wafer is removed from the carrier after further process steps, which may include the formation of through-wafer vias in the device wafer.

    Abstract translation: 提供了具有包括边缘区域的主表面和具有包括对应于器件晶片的边缘区域的环形表面区域的另外的主表面的载体的器件晶片。 粘合剂施加在边缘区域和/或环形表面区域中，但不施加在主表面的剩余区域上。 器件晶片通过粘合剂固定到载体上。 当装置晶片被固定到载体上时，主表面和另外的主表面彼此接触，而主表面和另外的主表面仅在边缘区域彼此紧固。 在进一步的工艺步骤之后，器件晶片从载体上移除，其可以包括在器件晶片中形成贯通晶片通孔。

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