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    METHOD FOR MANUFACTURING AN OPTICAL SENSOR AND OPTICAL SENSOR
    2.
    发明申请
    METHOD FOR MANUFACTURING AN OPTICAL SENSOR AND OPTICAL SENSOR 审中-公开

    公开(公告)号：US20200313031A1

    公开(公告)日：2020-10-01

    申请号：US16756025

    申请日：2018-10-15

    Applicant: ams AG

    Inventor： Gregor TOSCHKOFF ,  Thomas BODNER ,  Franz SCHRANK ,  Miklos LABODI ,  Joerg SIEGERT ,  Martin SCHREMS

    IPC: H01L31/18 ,  G01J1/04 ,  G01J1/02 ,  H01L31/0216 ,  H01L31/02 ,  H01L31/0203

    Abstract: A method for manufacturing an optical sensor is provided. The method comprises providing an optical sensor arrangement which comprises at least two optical sensor elements on a carrier, where the optical sensor arrangement comprises a light entrance surface at the side of the optical sensor elements facing away from the carrier. The method further comprises forming a trench between two optical sensor elements in a vertical direction which is perpendicular to the main plane of extension of the carrier, where the trench extends from the light entrance surface of the sensor arrangement at least to the carrier. Moreover, the method comprises coating the trench with an opaque material, forming electrical contacts for the at least two optical sensor elements on a back side of the carrier facing away from the optical sensor elements, and forming at least one optical sensor by dicing the optical sensor arrangement along the trench. Each optical sensor comprises an optical sensor element, and the light entrance surface is free of electrical contacts and at least partially free of the opaque material above the optical sensor elements. Furthermore, an optical sensor is provided.

    DICING METHOD
    3.
    发明申请
    DICING METHOD 审中-公开
    定义方法

    公开(公告)号：US20170062277A1

    公开(公告)日：2017-03-02

    申请号：US15118836

    申请日：2015-02-09

    Applicant: ams AG

    Inventor： Martin SCHREMS ,  Bernhard STERING ,  Franz SCHRANK

    IPC: H01L21/78 ,  H01L21/768 ,  H01L23/00 ,  H01L21/683

    CPC classification number: H01L21/78 ,  H01L21/6835 ,  H01L21/76898 ,  H01L24/11 ,  H01L2224/02372 ,  H01L2224/05569

    Abstract: The dicing method comprises the steps of providing a substrate (1) of semiconductor material, the substrate having a main surface (10), where integrated components (3) of chips (13) are arranged, and a rear surface (11) opposite the main surface, fastening a first handling wafer above the main surface, thinning the substrate at the rear surface, and forming trenches (20) penetrating the substrate and separating the chips by a single etching step after the substrate has been thinned.

    Abstract translation: 切割方法包括以下步骤：提供半导体材料的基板（1），所述基板具有主表面（10），其中布置有芯片（13）的集成部件（3）和与所述芯片（13）相对的后表面 主表面，紧固在主表面上方的第一处理晶片，使后表面上的基板变薄，并且在基板变薄之后，形成穿透基板的沟槽（20）并通过单个蚀刻步骤分离芯片。

    SEMICONDUCTOR DEVICE WITH THROUGH-SUBSTRATE VIA AND CORRESPONDING METHOD OF MANUFACTURE
    8.
    发明申请
    SEMICONDUCTOR DEVICE WITH THROUGH-SUBSTRATE VIA AND CORRESPONDING METHOD OF MANUFACTURE 审中-公开
    具有通过基板的半导体器件和相应的制造方法

    公开(公告)号：US20160322519A1

    公开(公告)日：2016-11-03

    申请号：US15107901

    申请日：2014-12-12

    Applicant: AMS AG

    Inventor： Franz SCHRANK ,  Sara CARNIELLO ,  Hubert ENICHLMAIR ,  Jochen KRAFT ,  Bernhard LOEFFLER ,  Rainer HOLZHAIDER

    IPC: H01L31/0224 ,  H01L31/103 ,  H01L31/18 ,  H01L31/0216

    Abstract: A dielectric layer (2) is arranged on the main surface (10) of a semiconductor substrate (1), and a passivation layer (6) is arranged on the dielectric layer. A metal layer (3) is embedded in the dielectric layer above an opening (12) in the substrate, and a metallization (14) is arranged in the opening. The metallization contacts the metal layer and forms a through-substrate via to a rear surface (11) of the substrate. A layer or layer sequence (7, 8, 9) comprising at least one further layer is arranged on the passivation layer above the opening. In this way the bottom of the through-substrate via is stabilized. A plug (17) may additionally be arranged in the opening without filling the opening.

    Abstract translation: 在半导体衬底（1）的主表面（10）上布置介电层（2），并且在介质层上布置钝化层（6）。 金属层（3）嵌入基板中的开口（12）上方的电介质层中，并且金属化层（14）布置在开口中。 金属化接触金属层，并通过基板的后表面（11）形成贯穿基板。 包含至少一个另外的层的层或层序列（7,8,9）布置在开口上方的钝化层上。 以这种方式，穿透基底通孔的底部是稳定的。 插头（17）还可以布置在开口中而不填充开口。

    SEMICONDUCTOR DEVICE WITH THROUGH-SUBSTRATE VIA
    9.
    发明申请
    SEMICONDUCTOR DEVICE WITH THROUGH-SUBSTRATE VIA 有权

    公开(公告)号：US20210175153A1

    公开(公告)日：2021-06-10

    申请号：US17052452

    申请日：2019-03-20

    Applicant: ams AG

    Inventor： Jochen KRAFT ,  Georg PARTEDER ,  Anderson PIRES SINGULANI ,  Raffaele COPPETA ,  Franz SCHRANK

    IPC: H01L23/48 ,  H01L23/00 ,  H01L23/528

    Abstract: A semiconductor device includes a semiconductor body, an electrically conductive via which extends through at least a part of the semiconductor body, and where the via has a top side and a bottom side that faces away from the top side, an electrically conductive etch-stop layer arranged at the bottom side of the via in a plane which is parallel to a lateral direction, where the lateral direction is perpendicular to a vertical direction given by the main axis of extension of the via, and at least one electrically conductive contact layer at the bottom side of the via in a plane which is parallel to the lateral direction. The etch-stop layer is arranged between the electrically conductive via and the contact layer in the vertical direction, the lateral extent in the lateral direction of the etch-stop layer amounts to at least 2.5 times the lateral extent of the via in the lateral direction, and the lateral extent of the contact layer is smaller than the lateral extent of the via or the lateral extent of the contact layer amounts to at least 2.5 times the lateral extent of the via.

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