公开(公告)号：US20160351515A1

公开(公告)日：2016-12-01

申请号：US15117175

申请日：2015-01-14

Applicant: ams AG

Inventor： Jochen Kraft ,  Karl Rohracher ,  Martin Schrems

IPC: H01L23/00 ,  H01L21/768 ,  G01N27/12 ,  H01L23/48

CPC classification number: H01L24/02 ,  G01N27/12 ,  G01N27/128 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/02315 ,  H01L2224/02331 ,  H01L2224/02372 ,  H01L2224/02373 ,  H01L2224/0401 ,  H01L2224/05024 ,  H01L2224/05026 ,  H01L2224/05548 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05567 ,  H01L2224/0603 ,  H01L2224/06051 ,  H01L2224/114 ,  H01L2224/1148 ,  H01L2224/1161 ,  H01L2224/11616 ,  H01L2224/13013 ,  H01L2224/13022 ,  H01L2224/13026 ,  H01L2924/00012 ,  H01L2924/00014

Abstract: A wiring (3) comprising electrical conductors (4, 5, 6, 7) is formed in a dielectric layer (2) on or above a semiconductor substrate (1), an opening is formed in the dielectric layer to uncover a contact pad (8), which is formed by one of the conductors, and a further opening is formed in the dielectric layer to uncover an area of a further conductor (5), separate from the contact pad. The further opening is filled with an electrically conductive material (9), and the dielectric layer is thinned from a side opposite the substrate, so that the electrically conductive material protrudes from the dielectric layer.

Abstract translation: 包括电导体（4,5,6,7）的布线（3）形成在半导体衬底（1）上或上方的电介质层（2）中，在电介质层中形成开口以露出接触焊盘 8），其由导体之一形成，并且在电介质层中形成另外的开口以露出与接触垫分离的另外的导体（5）的区域。 进一步的开口填充有导电材料（9），并且电介质层从与衬底相对的一侧变薄，使得导电材料从电介质层突出。

公开(公告)号：US20150287674A1

公开(公告)日：2015-10-08

申请号：US14441165

申请日：2013-09-23

Applicant: AMS AG

Inventor： Franz Schrank ,  Martin Schrems

IPC: H01L23/528 ,  H01L23/31 ,  H01L21/56 ,  G01N27/12

CPC classification number: H01L23/528 ,  G01N27/128 ,  H01L21/50 ,  H01L21/565 ,  H01L23/3121 ,  H01L23/3135 ,  H01L23/315 ,  H01L24/94 ,  H01L24/97 ,  H01L2224/02371 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05569 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/73257 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2224/05552 ,  H01L2924/00 ,  H01L2924/00012

Abstract: The semiconductor device comprises a substrate (1) of semiconductor material with a front side (4) and an opposite rear side (7), a wiring layer (5) at the front side (4), a further wiring layer (8) at the rear side (7), and a through-substrate via (3) connecting the wiring layer (5) and the further wiring layer (8). A hot plate (24) is arranged on or in the substrate, and a sensor layer (21) is arranged in the vicinity of the hot plate. A mold compound (14) is arranged on the rear side (7) above the substrate (1), a cavity (17) is formed in the mold compound (14) to accommodate the sensor layer (21), and the cavity (17) is covered with a membrane (15).

Abstract translation: 半导体器件包括具有前侧（4）和相对的后侧（7）的半导体材料的衬底（1），在前侧（4）处的布线层（5），另一布线层（8） 背面（7）和连接布线层（5）和另一布线层（8）的贯穿基板通孔（3）。 热板（24）布置在基板上或基板上，传感器层（21）布置在热板附近。 在基板（1）上方的后侧（7）上配置有模具化合物（14），在模具化合物（14）中形成空腔（17），以容纳传感器层（21）和空腔 ）被膜（15）覆盖。

公开(公告)号：US11888010B2

公开(公告)日：2024-01-30

申请号：US17851980

申请日：2022-06-28

Applicant: ams AG

Inventor： Martin Schrems ,  Thomas Stockmeier

IPC: H01L27/146 ,  G02B5/20

CPC classification number: H01L27/14634 ,  G02B5/208 ,  H01L27/1465 ,  H01L27/1467 ,  H01L27/1469 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14652

Abstract: The system-on-chip camera comprises a semiconductor body with an integrated circuit, a sensor substrate, sensor elements arranged in the sensor substrate according to an array of pixels, a light sensor in the sensor substrate apart from the sensor elements, and a lens or an array of lenses on a surface of incidence. Filter elements, which may especially be interference filters for red, green or blue, are arranged between the sensor elements and the surface of incidence.

公开(公告)号：US10374114B2

公开(公告)日：2019-08-06

申请号：US14777484

申请日：2014-03-11

Applicant: ams AG

Inventor： Jordi Teva ,  Frederic Roger ,  Ewald Stueckler ,  Stefan Jessenig ,  Rainer Minixhofer ,  Ewald Wachmann ,  Martin Schrems ,  Guenther Koppitsch

IPC: H01L31/107 ,  H01L31/0224 ,  H01L31/0352 ,  H01L31/0368 ,  H01L31/18

Abstract: The lateral single-photon avalanche diode comprises a semiconductor body comprising a semiconductor material of a first type of electric conductivity, a trench in the semiconductor body, and anode and cathode terminals. A junction region of the first type of electric conductivity is located near the sidewall of the trench, and the electric conductivity is higher in the junction region than at a farther distance from the sidewall. A semiconductor layer of an opposite second type of electric conductivity is arranged at the sidewall of the trench adjacent to the junction region. The anode and cathode terminals are electrically connected with the semiconductor layer and with the junction region, respectively. The junction region may be formed by a sidewall implantation.

公开(公告)号：US09929035B2

公开(公告)日：2018-03-27

申请号：US14654471

申请日：2013-12-19

Applicant: ams AG

Inventor： Thomas Bodner ,  Joerg Siegert ,  Martin Schrems

IPC: H01L21/683

CPC classification number: H01L21/6835 ,  H01L2221/68318 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68381 ,  Y10T156/10 ,  Y10T156/1111

Abstract: A relief structure is formed on a surface of a carrier provided for accommodating a wafer, which is fastened to the carrier by a removable adhesive contacting the carrier. The relief structure, which may be spatially confined to the center of the carrier, reduces the strength of adhesion between the wafer and the carrier. If the adhesive is appropriately selected and maintains the connection between the wafer and the carrier at elevated temperatures, further process steps can be performed at temperatures of typically 300° C. or more. The subsequent mechanical separation of the adhesive joint is facilitated by the relief structure on the carrier.

公开(公告)号：US09735101B2

公开(公告)日：2017-08-15

申请号：US15283183

申请日：2016-09-30

Applicant: ams AG

Inventor： Cathal Cassidy ,  Martin Schrems ,  Franz Schrank

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/522 ,  H01L21/768 ,  H01L23/00 ,  H01L23/528 ,  H01L23/532 ,  H01L23/552 ,  H01L25/065

CPC classification number: H01L23/5226 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5283 ,  H01L23/53295 ,  H01L23/552 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L25/0657 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/10125 ,  H01L2224/11334 ,  H01L2224/11849 ,  H01L2224/13025 ,  H01L2224/13027 ,  H01L2224/13028 ,  H01L2224/131 ,  H01L2224/1319 ,  H01L2224/13561 ,  H01L2224/1357 ,  H01L2224/136 ,  H01L2224/16106 ,  H01L2224/1613 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2924/00014 ,  H01L2924/30101 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2224/05552

Abstract: The semiconductor device comprises a semiconductor substrate (10) with a metallization (111) having an upper terminal layer (22) located at a front side (20) of the substrate. The metallization forms a through-substrate via (23) from the upper terminal layer to a rear terminal layer (13) located opposite to the front side at a rear side (21) of the substrate. The through-substrate via comprises an annular cavity (18) and a void (101), which may be filled with air or another gas. A solder ball (100) closes the void without completely filling it. A variety of interconnections for three-dimensional integration is offered by this scheme.

公开(公告)号：US09577001B2

公开(公告)日：2017-02-21

申请号：US14889835

申请日：2014-04-15

Applicant: ams AG

Inventor： Hubert Enichlmair ,  Rainer Minixhofer ,  Martin Schrems

IPC: H01L29/04 ,  H01L27/146 ,  H01L31/0232 ,  G01J5/04 ,  G01J5/02 ,  G01J5/08 ,  H01L31/0368 ,  G01J5/00

CPC classification number: H01L27/14649 ,  G01J5/022 ,  G01J5/0225 ,  G01J5/024 ,  G01J5/045 ,  G01J5/048 ,  G01J5/0806 ,  G01J2005/0077 ,  H01L27/14618 ,  H01L27/14625 ,  H01L27/14636 ,  H01L27/14685 ,  H01L31/02325 ,  H01L31/03682 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The integrated imaging device comprises a substrate (1) with an integrated circuit (4), a cover (2), a cavity (6) enclosed between the substrate (1) and the cover (2), and a sensor (5) or an array of sensors (5) arranged in the cavity (6). A surface (11, 12) of the substrate (1) or the cover (2) opposite the cavity (6) has a structure (8) directing incident radiation. The surface structure (8) may be a plate zone or a Fresnel lens focusing infrared radiation and may be etched into the surface of the substrate or cover, respectively.

Abstract translation: 集成成像装置包括具有集成电路（4），盖（2），封闭在基板（1）和盖（2）之间的空腔（6）的基板（1）和传感器（5）或 布置在空腔（6）中的传感器阵列（5）。 衬底（1）或与腔（6）相对的盖（2）的表面（11,12）具有引导入射辐射的结构（8）。 表面结构（8）可以是聚焦红外辐射的平板区域或菲涅耳透镜，并且可以分别蚀刻到基底或盖的表面中。

公开(公告)号：US10256147B2

公开(公告)日：2019-04-09

申请号：US15118836

申请日：2015-02-09

Applicant: ams AG

Inventor： Martin Schrems ,  Bernhard Stering ,  Franz Schrank

IPC: H01L21/78 ,  H01L23/00 ,  H01L21/683 ,  H01L21/768

Abstract: The dicing method comprises the steps of providing a substrate (1) of semiconductor material, the substrate having a main surface (10), where integrated components (3) of chips (13) are arranged, and a rear surface (11) opposite the main surface, fastening a first handling wafer above the main surface, thinning the substrate at the rear surface, and forming trenches (20) penetrating the substrate and separating the chips by a single etching step after the substrate has been thinned.

公开(公告)号：US10217715B2

公开(公告)日：2019-02-26

申请号：US15118469

申请日：2015-02-09

Applicant: ams AG

Inventor： Martin Schrems ,  Bernhard Stering ,  Harald Etschmaier

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/48 ,  H01L23/485

Abstract: The semiconductor device comprises a semiconductor substrate (1) with a main surface (10) and a further main surface (11) opposite the main surface, a TSV (3) penetrating the substrate from the main surface to the further main surface, a metallization (13) of the TSV, an under-bump metallization (5) and a bump contact (6) at least partially covering the TSV at the further main surface. The TSV (3) comprises a cavity (15), which may be filled with a gas or liquid. An opening (15′) of the cavity is provided to expose the cavity to the environment.

公开(公告)号：US09947711B2

公开(公告)日：2018-04-17

申请号：US15119377

申请日：2015-02-10

Applicant: ams AG

Inventor： Rainer Minixhofer ,  Martin Schrems ,  Sara Carniello

IPC: H01L27/146 ,  H01L31/0203 ,  H01L31/02 ,  H01L27/32

CPC classification number: H01L27/1464 ,  H01L27/14618 ,  H01L27/14627 ,  H01L27/14629 ,  H01L27/14632 ,  H01L27/14634 ,  H01L27/14645 ,  H01L27/14649 ,  H01L27/14687 ,  H01L27/14689 ,  H01L27/1469 ,  H01L27/3269 ,  H01L31/02016 ,  H01L31/0203 ,  H01L2924/1815

Abstract: The semiconductor device comprises a semiconductor substrate (1), a sensor or sensor array (2) arranged at a main surface (10) of the substrate, an integrated circuit (3) arranged at or above the main surface, and a focusing element (17) comprising recesses (4) formed within a further main surface (11) of the substrate opposite the main surface. The focusing element may be arranged opposite the sensor or sensor array (2), which may be a photosensor or photodetector or an array of photosensors or photodetectors, for instance. The focusing element (17) is formed by etching the recesses (4) into the semiconductor material.