摘要:
A die bonding system including a bond head assembly for bonding a die to a substrate is provided. The die includes a first plurality of fiducial markings, and the substrate includes a second plurality of fiducial markings. The die bonding system also includes an imaging system configured for simultaneously imaging one of the first plurality of fiducial markings and one of the second plurality of fiducial markings along a first optical path while the die is carried by the bond head assembly. The imaging system is also configured for simultaneously imaging another of the first plurality of fiducial markings and another of the second plurality of fiducial markings along a second optical path while the die is carried by the bond head assembly. Each of the first and second optical paths are independently configurable to image any area of the die including one of the first plurality of fiducial markings.
摘要:
In some embodiments in accordance with the present disclosure, a semiconductor device having a semiconductor substrate is provided. A metal structure is disposed over the semiconductor substrate, and a post-passivation interconnect (PPI) is disposed over the metal structure. In addition, the upper surface of the PPI is configured to receive a bump thereon. In certain embodiments, the upper surface of the PPI for receiving the bump is substantially flat. A positioning member is formed over the PPI and configured to accommodate the bump. In some embodiments, the positioning member is configured to limit bump movement after the bump is disposed over the PPI so as to retain the bump at a predetermined position.
摘要:
A semiconductor device includes a semiconductor substrate having a plurality of electrode pads, a protective film covering the upper surface of the semiconductor substrate and having an opening so that the electrode pad is exposed therethrough, a metal film formed on the electrode pad exposed through the opening, and a bump formed on the metal film. The metal film includes a plurality of grooves radially formed from the center thereof toward the periphery thereof.
摘要:
A semiconductor package includes; a first semiconductor chip and a second semiconductor chip stacked on the first semiconductor chip. The first semiconductor chip includes; a first substrate, a first bonding pad on a first surface of the first substrate, and a first passivation layer on the first surface of the first substrate exposing at least a portion of the first bonding pad. The second semiconductor chip includes; a second substrate, a second insulation layer on a front surface of the second substrate, a second bonding pad on the second insulation layer, a first alignment key pattern on the second insulation layer, and a second passivation layer on the second insulation layer, covering at least a portion of the first alignment key pattern, and exposing at least a portion of the second bonding pad, wherein the first bonding pad and the second bonding pad are directly bonded, and the first passivation layer and the second passivation layer are directly bonded.
摘要:
Alignment of a first micro-electronic component to a receiving surface of a second micro-electronic component is realized by a capillary force-induced self-alignment, combined with an electrostatic alignment. The latter is accomplished by providing at least one first electrical conductor line along the periphery of the first component, and at least one second electrical conductor along the periphery of the location on the receiving surface of the second component onto which the component is to be placed. The contact areas surrounded by the conductor lines are covered with a wetting layer. The electrical conductor lines may be embedded in a strip of anti-wetting material that runs along the peripheries to create a wettability contrast. The wettability contrast helps to maintain a drop of alignment liquid between the contact areas so as to obtain self-alignment by capillary force. By applying appropriate charges on the conductor lines, electrostatic self-alignment is realized, which improves the alignment obtained through capillary force and maintains the alignment during evaporation of the liquid.
摘要:
Alignment of a first micro-electronic component to a receiving surface of a second micro-electronic component is realized by a capillary force-induced self-alignment, combined with an electrostatic alignment. The latter is accomplished by providing at least one first electrical conductor line along the periphery of the first component, and at least one second electrical conductor along the periphery of the location on the receiving surface of the second component onto which the component is to be placed. The contact areas surrounded by the conductor lines are covered with a wetting layer. The electrical conductor lines may be embedded in a strip of anti-wetting material that runs along the peripheries to create a wettability contrast. The wettability contrast helps to maintain a drop of alignment liquid between the contact areas so as to obtain self-alignment by capillary force. By applying appropriate charges on the conductor lines, electrostatic self-alignment is realized, which improves the alignment obtained through capillary force and maintains the alignment during evaporation of the liquid.
摘要:
A chip packaging method using a hydrophobic surface includes forming superhydrophobic surfaces forming hydrophilic surfaces on predetermined positions of the superhydrophobic surfaces formed on the one of a first chip or the first board and the one of a second chip or a second board, respectively, generating liquid metal balls on the hydrophilic surfaces formed on the one of the first chip or the first board and the one of the second chip or the second board, respectively, and packaging the one of the first chip or the first board and the one of the second chip or the second board by combing the liquid metal ball of the one of the first chip or the first board and the liquid metal ball of the one of the second chip or the second board with each other.
摘要:
A chip packaging method using a hydrophobic surface includes forming superhydrophobic surfaces forming hydrophilic surfaces on predetermined positions of the superhydrophobic surfaces formed on the one of a first chip or the first board and the one of a second chip or a second board, respectively, generating liquid metal balls on the hydrophilic surfaces formed on the one of the first chip or the first board and the one of the second chip or the second board, respectively, and packaging the one of the first chip or the first board and the one of the second chip or the second board by combing the liquid metal ball of the one of the first chip or the first board and the liquid metal ball of the one of the second chip or the second board with each other.
摘要:
Alignment of a first micro-electronic component to a receiving surface of a second micro-electronic component is realized by a capillary force-induced self-alignment, combined with an electrostatic alignment. The latter is accomplished by providing at least one first electrical conductor line along the periphery of the first component, and at least one second electrical conductor along the periphery of the location on the receiving surface of the second component onto which the component is to be placed. The contact areas surrounded by the conductor lines are covered with a wetting layer. The electrical conductor lines may be embedded in a strip of anti-wetting material that runs along the peripheries to create a wettability contrast. The wettability contrast helps to maintain a drop of alignment liquid between the contact areas so as to obtain self-alignment by capillary force. By applying appropriate charges on the conductor lines, electrostatic self-alignment is realized, which improves the alignment obtained through capillary force and maintains the alignment during evaporation of the liquid.