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公开(公告)号:US09842822B2
公开(公告)日:2017-12-12
申请号:US14831463
申请日:2015-08-20
申请人: SK hynix Inc.
发明人: Hyeong Seok Choi
IPC分类号: H01L23/00 , H01L25/065 , H01L25/075 , H01L25/11
CPC分类号: H01L24/72 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/81 , H01L24/90 , H01L24/94 , H01L24/97 , H01L25/0657 , H01L25/0756 , H01L25/117 , H01L2224/0401 , H01L2224/05571 , H01L2224/05611 , H01L2224/05647 , H01L2224/13012 , H01L2224/13014 , H01L2224/13016 , H01L2224/13078 , H01L2224/13082 , H01L2224/13111 , H01L2224/13147 , H01L2224/13191 , H01L2224/13193 , H01L2224/16147 , H01L2224/16148 , H01L2224/16237 , H01L2224/16238 , H01L2224/1703 , H01L2224/81191 , H01L2224/81192 , H01L2224/81193 , H01L2224/94 , H01L2224/97 , H01L2924/00012 , H01L2224/81 , H01L2924/00014 , H01L2924/01006 , H01L2224/90
摘要: A semiconductor package may include a first substrate and a second substrate. Socket bumps may be disposed on the first substrate to provide insertion grooves within the socket bumps. Plug bumps may be disposed on the second substrate. The plug bumps may be configured for insertion into the insertion grooves of the socket bumps and may electrically connect to the socket bumps. Related memory cards and electronic systems may also be provided.
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公开(公告)号:US20170250484A1
公开(公告)日:2017-08-31
申请号:US15432072
申请日:2017-02-14
发明人: Hideki SAGANO , Hideki SATO
CPC分类号: H01R12/89 , G01R1/0466 , H01L23/32 , H01L24/14 , H01L24/72 , H01L2224/13014 , H01L2224/13016 , H01L2224/14131 , H01R13/193 , H01R13/2464 , H01R13/2485 , H01R13/2492 , H01R2201/20 , H05K7/1069
摘要: In a contact terminal, a first touch portion and a second touch portion of a movable piece and a first touch portion and a second touch portion of a movable piece bite into and thus pinch a spherical surface of a bump of a semiconductor device. In this state, when an electrode surface of the semiconductor device is warped upward during a test and the bump is about to be moved up, an inclined surface of a fixing portion of the movable piece and an inclined surface of a fixing portion of the movable piece fix the spherical surface of the bump.
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公开(公告)号:US20170162470A1
公开(公告)日:2017-06-08
申请号:US15323340
申请日:2014-07-01
IPC分类号: H01L23/40 , H03K17/567
CPC分类号: H01L23/4012 , H01L24/72 , H01L25/071 , H01L25/18 , H01L2023/4025 , H01L2924/13055 , H03K17/567 , H01L2924/00
摘要: A clamping assembly includes a configuration of mechanically clamped components disposed one on top of the other to form a stack. A clamping device generates a mechanical compressive force on the configuration of the components and a pressure element transmits the mechanical compressive force from the clamping device to the configuration. The pressure element contains a metal foam for a planar, homogeneous transmission of the compressive force. A sub module of a converter having at least one series circuit of power semiconductor switching units implemented as the clamping apparatus is also provided.
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公开(公告)号:US20170157544A1
公开(公告)日:2017-06-08
申请号:US15434180
申请日:2017-02-16
申请人: Nanopareil, LLC
发明人: Todd J. Menkhaus , Hao Fong
IPC分类号: B01D39/16 , B01D15/32 , B01D15/38 , D01F2/24 , D01D5/00 , D01F6/88 , C07K1/22 , B01J20/24 , B01J20/28 , B01D15/36 , D01F6/44
CPC分类号: B01D39/1615 , B01D15/327 , B01D15/361 , B01D15/3804 , B01D15/3809 , B01D39/1623 , B01D39/1676 , B01D2239/025 , B01D2239/0414 , B01J20/24 , B01J20/28007 , B01J20/28038 , B01J20/3212 , B01J20/3217 , B01J20/3248 , B01J20/3293 , C07K1/22 , D01D5/0007 , D01D5/003 , D01F2/24 , D01F6/44 , D01F6/88 , H01L23/48 , H01L24/16 , H01L24/72 , H01L24/73 , H01L24/90 , H01L24/91 , H01L25/0652 , H01L25/50 , H01L2224/131 , H01L2224/16227 , H01L2224/73201 , H01L2224/81138 , H01L2224/81815 , H01L2224/9211 , H01L2225/06517 , H01L2225/06527 , H01L2225/06531 , H01L2225/06562 , H01L2225/06593 , H01L2924/0002 , H01L2924/15153 , H01L2924/157 , H01L2924/15787 , H01L2924/15788 , H01L2924/1579 , H01L2924/3511 , H01L2924/37001 , H01L2924/00 , H01L2924/014 , H01L2224/16 , H01L2224/72 , H01L2224/81 , H01L2224/90 , H01L2924/00014 , H01L2924/00012
摘要: The present invention relates generally to compositions for use in biological and chemical separations, as well as other applications. More specifically, the present invention relates to hybrid felts fabricated from electrospun nanofibers with high permeance and high capacity. Such hybrid felts utilize derivatized cellulose, and at least one non-cellulose-based polymer that may be removed from the felt by subjecting it to moderately elevated temperatures and/or solvents capable of dissolving the non-cellulose-based polymer to leave behind a porous nanofiber felt having more uniform pore sizes and other enhanced properties when compared to single component nanofiber felts.
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公开(公告)号:US09620459B2
公开(公告)日:2017-04-11
申请号:US14476241
申请日:2014-09-03
IPC分类号: H01L21/00 , H01L23/00 , H01L23/522 , H01L23/528 , H01L25/07 , H01L25/00 , H01L23/051 , H01L21/56 , H01L23/31
CPC分类号: H01L23/562 , H01L21/56 , H01L21/561 , H01L21/566 , H01L21/568 , H01L23/051 , H01L23/3107 , H01L23/5226 , H01L23/528 , H01L24/24 , H01L24/33 , H01L24/72 , H01L24/82 , H01L24/90 , H01L24/96 , H01L24/97 , H01L25/072 , H01L25/50 , H01L2224/03002 , H01L2224/06181 , H01L2224/24137 , H01L2224/24195 , H01L2224/29011 , H01L2224/33181 , H01L2224/82039 , H01L2224/96 , H01L2924/12042 , H01L2924/1301 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/35 , H01L2924/00
摘要: A semiconductor arrangement includes upper and lower contact plates and basic chip assemblies. Each chip assembly has a semiconductor chip having a semiconductor body with upper and lower spaced apart sides. An individual upper main electrode and an individual control electrode are arranged on the upper side. The chip assemblies have either respectively a separate lower main electrode arranged on the lower side of the semiconductor chip of the corresponding basic chip assembly, or a common lower main electrode, which for each of the chip assemblies is arranged on the lower side of the semiconductor body of that chip assembly. An electrical current between the individual upper main electrode and the individual or common lower main electrode is controllable by its control electrode. The chip assemblies are connected to one another with a material bonded connection by a dielectric embedding compound, forming a solid assembly.
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公开(公告)号:US20160380225A1
公开(公告)日:2016-12-29
申请号:US14752876
申请日:2015-06-27
申请人: Intel Corporation
发明人: Douglas G. Bennett
CPC分类号: H01L51/52 , H01L24/72 , H01L27/32 , H01L51/56 , H01R4/48 , H01R12/52 , H01R12/57 , H01R12/718 , H01R13/2407 , H05K1/0215 , H05K3/325 , H05K2201/0311
摘要: Generally, this disclosure provides systems, devices and methods for improved electrical coupling of multiple ground planes of a device. The device may include a plurality of ground planes and an electrically conductive ground clip. The ground clip may include a base portion configured to secure the ground clip to the device and a plurality of spring fingers. Each of the spring fingers may be configured to contact and electrically couple to one of the plurality of ground planes, wherein the ground clip is to provide a conduction path between each of the spring fingers. One of the spring fingers may pass through an opening or cut-through in a first ground plane to contact a second ground plane. The device may be a mobile communication or computing platform.
摘要翻译: 通常,本公开提供用于改进设备的多个接地平面的电耦合的系统,设备和方法。 该装置可以包括多个接地平面和导电接地夹。 接地夹可以包括构造成将接地夹固定到设备的基部和多个弹簧指。 每个弹簧指可以被配置成接触并电耦合到多个接地平面中的一个,其中接地夹将提供每个弹簧指之间的传导路径。 弹簧手指中的一个可以穿过第一接地平面中的开口或切口,以接触第二接地平面。 该设备可以是移动通信或计算平台。
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公开(公告)号:US09530750B2
公开(公告)日:2016-12-27
申请号:US13416429
申请日:2012-03-09
申请人: Oleg S. Fishman , Satyen N. Prabhu
发明人: Oleg S. Fishman , Satyen N. Prabhu
CPC分类号: H01L24/72 , H01L2924/01013 , H01L2924/01033 , H01L2924/01082 , H01L2924/13034 , Y10T24/44974 , Y10T29/41 , H01L2924/00
摘要: The present invention relates to a method of clamping a semiconductor assembly with a desired compression force equally distributed across the opposing surfaces of the devices and associated components of the semiconductor assembly.
摘要翻译: 本发明涉及一种夹持半导体组件的方法,该半导体组件具有平均分布在半导体组件的器件和相关部件的相对表面上的期望压缩力。
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公开(公告)号:US09515012B2
公开(公告)日:2016-12-06
申请号:US14620762
申请日:2015-02-12
IPC分类号: H01L23/495 , H02M7/537 , H01L23/34 , H01L23/538 , H01L23/36 , H01L21/48
CPC分类号: H01L23/49568 , H01L21/4846 , H01L23/16 , H01L23/345 , H01L23/36 , H01L23/3735 , H01L23/473 , H01L23/49575 , H01L23/5385 , H01L24/72 , H01L25/072 , H01L25/115 , H01L2224/06181 , H02M7/537
摘要: The present invention concerns a package of power dies composed of a first part and a second part, the first part including a plaque having cavities on which dies are placed, the plaque is placed on a first, a second, and a third metallic plates placed on an electric insulation substrate placed on a fourth metallic plate, the second part including a fifth and a sixth metallic plates placed on another electric insulation substrate placed on a seventh metallic plate, the dies are divided into a first group of dies and a second group of dies and wherein the first and second plate are a positive and negative DC voltage connections, the third plate is a gate connection of the second group of dies, the fourth plate is an AC voltage connection and the fifth plate is a gate connection of the first group of dies.
摘要翻译: 本发明涉及由第一部分和第二部分组成的动力模具的包装,第一部分包括具有空腔的板,其上放置有模具,该板放置在第一,第二和第三金属板上, 在放置在第四金属板上的电绝缘基板上,第二部分包括置于第七金属板上的另一电绝缘基板上的第五和第六金属板,模具分为第一组模具和第二组 并且其中所述第一和第二板是正和负的DC电压连接,所述第三板是所述第二组模具的栅极连接,所述第四板是AC电压连接,并且所述第五板是所述第二板的栅极连接 第一组死亡。
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公开(公告)号:US20160329264A1
公开(公告)日:2016-11-10
申请号:US14442049
申请日:2012-12-07
申请人: ABB TECHNOLOGY LTD
发明人: Olle EKWALL , Erik DORÉ , Franc DUGAL , Raffael SCHNELL
IPC分类号: H01L23/40 , H02M7/00 , H01L25/07 , H01L25/11 , H01L23/367 , H01L23/473
CPC分类号: H01L23/4012 , H01L23/3675 , H01L23/4006 , H01L23/473 , H01L24/72 , H01L25/071 , H01L25/074 , H01L25/117 , H01L25/16 , H01L2023/4031 , H01L2023/4081 , H01L2023/4087 , H01L2924/1305 , H01L2924/13055 , H02M7/003 , H05K7/209 , H01L2924/00
摘要: A semiconductor assembly includes a stack with a semiconductor module and a cooler, wherein the semiconductor module is provided in contact with the cooler. A clamping assembly is adapted to exert a force on the two sides of the stack. The stack is provided with a through hole between the two sides thereof and a part of the clamping assembly including an electrically conductive part which extends through the through hole of the stack. Thereby, a compact mechanical arrangement is provided while obtaining improved electrical properties, such as lower inductance and more even current distribution.
摘要翻译: 半导体组件包括具有半导体模块和冷却器的堆叠,其中半导体模块设置成与冷却器接触。 夹紧组件适于在堆叠的两侧施加力。 该堆叠在其两侧之间设置有通孔,并且夹持组件的一部分包括延伸穿过堆叠的通孔的导电部分。 由此,提供紧凑的机械布置,同时获得改进的电性能,例如较低的电感和更均匀的电流分布。
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公开(公告)号:US09484322B1
公开(公告)日:2016-11-01
申请号:US14925235
申请日:2015-10-28
申请人: SK hynix Inc.
发明人: Chan Woo Jeong
CPC分类号: H01L24/72 , H01L2224/0401 , H01L2924/1431 , H01L2924/1434 , H01L2924/1436 , H01L2924/1437 , H01L2924/1438 , H01L2924/1441 , H01L2924/1531 , H01L2924/15311 , H01L2924/15313 , H01L2924/16251 , H01L2924/3511
摘要: A semiconductor package includes a first substrate including a plurality of first connecting portions disposed thereon, a second substrate disposed on a portion of the first substrate to be adjacent to the first connecting portions and including a plurality of conductive contact rails disposed thereon, and a plurality of conductive cantilevers respectively placed in contact with surfaces of the conductive contact rails so that one end portion of each conductive cantilever is electrically coupled to one of the first connecting portions and the other end portion slides along one of the conductive contact rails.
摘要翻译: 半导体封装包括:第一基板,包括设置在其上的多个第一连接部;第二基板,设置在与第一连接部相邻的第一基板的一部分上,并且包括设置在其上的多个导电接触轨道, 的导电悬臂分别放置成与导电接触导轨的表面接触,使得每个导电悬臂的一个端部电耦合到第一连接部分中的一个,另一个端部沿着导电接触导轨之一滑动。
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