System and method for through silicon via yield
    27.
    发明授权
    System and method for through silicon via yield 有权
    通过硅产量的系统和方法

    公开(公告)号:US09153506B2

    公开(公告)日:2015-10-06

    申请号:US13542896

    申请日:2012-07-06

    摘要: The present disclosure provides one embodiment of an integrated circuit (IC) fabrication method to form an IC structure having one or more through silicon via (TSV) features. The IC fabrication method includes performing a plurality of processing steps; collecting physical metrology data from the plurality of processing steps; collecting virtual metrology data from the plurality of processing steps based on the physical metrology data; generating a yield prediction to the IC structure based on the physical metrology data and the virtual metrology data; and identifying an action at an earlier processing step based on the yield prediction.

    摘要翻译: 本公开提供了用于形成具有一个或多个贯穿硅通孔(TSV)特征的IC结构的集成电路(IC)制造方法的一个实施例。 IC制作方法包括执行多个处理步骤; 从多个处理步骤收集物理计量数据; 基于所述物理测量数据从所述多个处理步骤收集虚拟测量数据; 基于物理测量数据和虚拟测量数据,为IC结构生成产量预测; 以及基于所述产量预测在较早的处理步骤中识别动作。