公开(公告)号：US08928147B2

公开(公告)日：2015-01-06

申请号：US14338175

申请日：2014-07-22

Applicant: Renesas Electronics Corporation

Inventor： Eiji Hayashi ,  Kyo Go ,  Kozo Harada ,  Shinji Baba

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/498

CPC classification number: H01L23/49827 ,  H01L21/4853 ,  H01L21/563 ,  H01L21/6835 ,  H01L23/3142 ,  H01L23/3157 ,  H01L23/36 ,  H01L23/373 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/49894 ,  H01L23/562 ,  H01L24/11 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/743 ,  H01L24/81 ,  H01L2021/6015 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/05023 ,  H01L2224/05024 ,  H01L2224/05025 ,  H01L2224/05124 ,  H01L2224/05572 ,  H01L2224/056 ,  H01L2224/11003 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81193 ,  H01L2224/81205 ,  H01L2224/81801 ,  H01L2224/81909 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15174 ,  H01L2924/15184 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/15724 ,  H01L2924/15747 ,  H01L2924/1579 ,  H01L2924/351 ,  H05K1/0366 ,  H05K3/4602 ,  H05K2201/029 ,  H01L2924/0132 ,  H01L2924/01014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/3512 ,  H01L2924/0665 ,  H01L2924/00014

Abstract: Even when a stiffener is omitted, the semiconductor device which can prevent the generation of twist and distortion of a wiring substrate is obtained. As for a semiconductor device which has a wiring substract, a semiconductor chip by which the flip chip was made to the wiring substrate, and a heat spreader adhered to the back surface of the semiconductor chip, and which omitted the stiffener for reinforcing a wiring substrate and maintaining the surface smoothness of a heat spreader, a wiring substrate has a plurality of insulating substrates in which a through hole whose diameter differs, respectively was formed, and each insulating substrate contains a glass cloth.

Abstract translation: 即使省略了加强件，也可以获得能够防止布线基板发生扭曲和变形的半导体装置。 对于具有布线基底的半导体器件，制作倒装芯片的布线基板的半导体芯片和附着在半导体芯片背面的散热器，省略了用于加强布线基板的加强板 并且保持散热器的表面平滑性，布线基板具有分别形成直径不同的通孔的多个绝缘基板，并且每个绝缘基板包含玻璃布。

公开(公告)号：US11049806B2

公开(公告)日：2021-06-29

申请号：US16370370

申请日：2019-03-29

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Kazuyuki Nakagawa ,  Shinji Baba ,  Hiroshi Koizumi

IPC: H01L23/522 ,  H01L23/528 ,  H01L23/48 ,  H01L23/482 ,  H01L23/498 ,  H01L23/52 ,  H01L23/538 ,  H01L23/532 ,  H01L23/34 ,  H01L23/00

Abstract: A semiconductor device includes a wiring substrate provided with a plurality of pads electrically connected to a semiconductor chip in a flip-chip interconnection. The wiring substrate includes a pad forming layer in which a signal pad configured to receive transmission of a first signal and a second pad configured to receive transmission of a second signal different from the first signal are formed and a first wiring layer located at a position closest to the pad forming layer. In the wiring layer, a via land overlapping with the signal pad, a wiring connected to the via land, and a wiring connected to the second pad and extending in an X direction are formed. In a Y direction intersecting the X direction, a width of the via land is larger than a width of the wiring. A wiring is adjacent to the via land and overlaps with the signal pad.

公开(公告)号：US10325841B2

公开(公告)日：2019-06-18

申请号：US16063280

申请日：2016-02-10

Applicant: Renesas Electronics Corporation

Inventor： Kazuyuki Nakagawa ,  Katsushi Terajima ,  Keita Tsuchiya ,  Yoshiaki Sato ,  Hiroyuki Uchida ,  Yuji Kayashima ,  Shuuichi Kariyazaki ,  Shinji Baba

IPC: H01L23/52 ,  H01L23/498 ,  H01L25/065 ,  H01L25/07 ,  H01L25/18 ,  H01L23/538 ,  H01L23/00

Abstract: According to an embodiment of the present invention, there is provided a semiconductor device having a first semiconductor component and a second semiconductor component which are mounted on a wiring substrate. The first semiconductor component has a first terminal for transmitting a first signal between the first semiconductor component and the outside and a second terminal for transmitting a second signal between the first semiconductor component and the second semiconductor component. In addition, the second semiconductor component has a third terminal for transmitting the second signal between the second semiconductor component and the first semiconductor component. Further, the first signal is transmitted at a higher frequency than the second signal. Furthermore, the second terminal of the first semiconductor component and the third terminal of the second semiconductor component are electrically connected to each other via the first wiring member. In addition, the first terminal of the first semiconductor component is electrically connected to the wiring substrate via a first bump electrode without the first wiring member interposed therebetween.

公开(公告)号：US10283444B2

公开(公告)日：2019-05-07

申请号：US15796746

申请日：2017-10-27

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Eiji Hayashi ,  Kyo Go ,  Kozo Harada ,  Shinji Baba

IPC: H01L23/498 ,  H01L23/31 ,  H01L23/373 ,  H01L23/00 ,  H01L21/48 ,  H01L23/46 ,  H05K3/46 ,  H01L21/683 ,  H01L21/56 ,  H01L23/36 ,  H05K1/03 ,  H01L21/60

Abstract: Even when a stiffener is omitted, the semiconductor device which can prevent the generation of twist and distortion of a wiring substrate is obtained. As for a semiconductor device which has a wiring substrate, a semiconductor chip by which the flip chip bond was made to the wiring substrate, and a heat spreader adhered to the back surface of the semiconductor chip, and which omitted the stiffener for reinforcing a wiring substrate and maintaining the surface smoothness of a heat spreader, a wiring substrate has a plurality of insulating substrates in which a through hole whose diameter differs, respectively was formed, and each insulating substrate contains a glass cloth.

公开(公告)号：US10056323B2

公开(公告)日：2018-08-21

申请号：US15302632

申请日：2014-04-24

Applicant: Renesas Electronics Corporation

Inventor： Kazuyuki Nakagawa ,  Shinji Baba ,  Takeumi Kato

IPC: H01L23/52 ,  H01L23/498 ,  H01L25/00 ,  H05K3/46 ,  H01L21/56 ,  H01L21/66 ,  H01L23/31 ,  H01L23/367 ,  H01L23/66 ,  H01L23/00

CPC classification number: H01L23/49838 ,  H01L21/56 ,  H01L22/14 ,  H01L23/3128 ,  H01L23/367 ,  H01L23/3675 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/66 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L25/00 ,  H01L25/50 ,  H01L2223/6611 ,  H01L2223/6616 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H05K1/0225 ,  H05K1/0231 ,  H05K1/0253 ,  H05K3/46 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A semiconductor device includes a wiring substrate including wiring layers, a semiconductor chip including electrode pads and mounted on the wiring substrate, and a first capacitor including a first electrode and a second electrode, and mounted on the wiring substrate. The wiring layers include a first wiring layer including a first terminal pad electrically connected with the first electrode of the first capacitor and a second terminal pad electrically connected with the second electrode of the first capacitor; and a second wiring layer on an inner side by one layer from the first wiring layer of the wiring substrate and including a first conductor pattern having a larger area than each of the first terminal pad and the second terminal pad. The first conductor pattern includes a first opening in a region overlapping with each of the first terminal pad and the second terminal pad in the second wiring layer.

公开(公告)号：US09818679B2

公开(公告)日：2017-11-14

申请号：US14871742

申请日：2015-09-30

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Shinji Baba ,  Toshihiro Iwasaki ,  Masaki Watanabe

IPC: H01L23/498 ,  H01L25/10 ,  H01L23/50

CPC classification number: H01L23/49816 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/50 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2225/1058 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/00

Abstract: This invention provides a multi-pin semiconductor device as a low-cost flip-chip BGA. In the flip-chip BGA, a plurality of signal bonding electrodes in a peripheral area of the upper surface of a multilayer wiring substrate are separated into inner and outer ones and a plurality of signal through holes coupled to a plurality of signal wirings drawn inside are located between a plurality of rows of signal bonding electrodes and a central region where a plurality of bonding electrodes for core power supply are located so that the chip pad pitch can be decreased and the cost of the BGA can be reduced without an increase in the number of layers in the multilayer wiring substrate.

公开(公告)号：US09349678B2

公开(公告)日：2016-05-24

申请号：US14750009

申请日：2015-06-25

Applicant: Renesas Electronics Corporation

Inventor： Yoshihiro Ono ,  Nobuhiro Kinoshita ,  Tsuyoshi Kida ,  Jumpei Konno ,  Kenji Sakata ,  Kentaro Mori ,  Shinji Baba

IPC: H01L23/48 ,  H01L21/00 ,  B23K31/00 ,  H01L23/495 ,  H01L23/544 ,  H01L23/00

CPC classification number: H01L23/49568 ,  H01L22/32 ,  H01L23/3128 ,  H01L23/4951 ,  H01L23/4952 ,  H01L23/49558 ,  H01L23/49811 ,  H01L23/544 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/45 ,  H01L24/81 ,  H01L24/97 ,  H01L25/0657 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2224/0345 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/0392 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05166 ,  H01L2224/05572 ,  H01L2224/05583 ,  H01L2224/05624 ,  H01L2224/05666 ,  H01L2224/06153 ,  H01L2224/06155 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/13022 ,  H01L2224/13027 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16105 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/8113 ,  H01L2224/81191 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06565 ,  H01L2924/00011 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/181 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/32245 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/01074 ,  H01L2924/013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2224/45147

Abstract: The reliability of a semiconductor device is improved. A probe mark is formed on a probe region of a pad covered with a protective insulating film. And, a pillar-shaped electrode has a first portion formed on an opening region and a second portion that is extended over the probe region from the upper portion of the opening region. At this time, a center position of the opening region is shifted from a center position of the pillar-shaped electrode that is opposed to a bonding finger.

Abstract translation: 提高了半导体器件的可靠性。 在覆盖有保护绝缘膜的焊盘的探针区域上形成探针标记。 并且，柱状电极具有形成在开口区域上的第一部分和从开口区域的上部在探针区域上延伸的第二部分。 此时，开口区域的中心位置从与接合手指相对的柱状电极的中心位置偏移。

公开(公告)号：US09171791B2

公开(公告)日：2015-10-27

申请号：US14249097

申请日：2014-04-09

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Shinji Baba ,  Toshihiro Iwasaki ,  Masaki Watanabe

IPC: H01L23/498 ,  H01L23/50 ,  H01L25/10

CPC classification number: H01L23/49816 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/50 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2225/1058 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/00

Abstract: This invention provides a multi-pin semiconductor device as a low-cost flip-chip BGA. In the flip-chip BGA, a plurality of signal bonding electrodes in a peripheral area of the upper surface of a multilayer wiring substrate are separated into inner and outer ones and a plurality of signal through holes coupled to a plurality of signal wirings drawn inside are located between a plurality of rows of signal bonding electrodes and a central region where a plurality of bonding electrodes for core power supply are located so that the chip pad pitch can be decreased and the cost of the BGA can be reduced without an increase in the number of layers in the multilayer wiring substrate.

Abstract translation: 本发明提供作为低成本倒装芯片BGA的多引脚半导体器件。 在倒装芯片BGA中，多层布线基板的上表面的周边区域中的多个信号接合电极被分离为内部和外部的多个信号接合电极，并且耦合到多个内部的信号布线耦合的多个信号通孔是 位于多行信号键合电极和多个核心电源用接合电极之间的中心区域，使得可以减小芯片焊盘间距，并且能够在不增加数量的情况下降低BGA的成本 的多层布线基板中的层。

公开(公告)号：US08822269B2

公开(公告)日：2014-09-02

申请号：US14044497

申请日：2013-10-02

Applicant: Renesas Electronics Corporation

Inventor： Eiji Hayashi ,  Kyo Go ,  Kozo Harada ,  Shinji Baba

IPC: H01L21/00

CPC classification number: H01L23/49827 ,  H01L21/4853 ,  H01L21/563 ,  H01L21/6835 ,  H01L23/3142 ,  H01L23/3157 ,  H01L23/36 ,  H01L23/373 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/49894 ,  H01L23/562 ,  H01L24/11 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/743 ,  H01L24/81 ,  H01L2021/6015 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/05023 ,  H01L2224/05024 ,  H01L2224/05025 ,  H01L2224/05124 ,  H01L2224/05572 ,  H01L2224/056 ,  H01L2224/11003 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81193 ,  H01L2224/81205 ,  H01L2224/81801 ,  H01L2224/81909 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15174 ,  H01L2924/15184 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/15724 ,  H01L2924/15747 ,  H01L2924/1579 ,  H01L2924/351 ,  H05K1/0366 ,  H05K3/4602 ,  H05K2201/029 ,  H01L2924/0132 ,  H01L2924/01014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/3512 ,  H01L2924/0665 ,  H01L2924/00014

Abstract: Even when a stiffener is omitted, the semiconductor device which can prevent the generation of twist and distortion of a wiring substrate is obtained. As for a semiconductor device which has a wiring substrate, a semiconductor chip by which the flip chip was made to the wiring substrate, and a heat spreader adhered to the back surface of the semiconductor chip, and which omitted the stiffener for reinforcing a wiring substrate and maintaining the surface smoothness of a heat spreader, a wiring substrate has a plurality of insulating substrates in which a through hole whose diameter differs, respectively was formed, and each insulating substrate contains a glass cloth.

Abstract translation: 即使省略了加强件，也可以获得能够防止布线基板发生扭曲和变形的半导体装置。 对于具有布线基板的半导体器件，制作倒装芯片的布线基板的半导体芯片和附着在半导体芯片背面的散热器，省略了用于加强布线基板的加强板 并且保持散热器的表面平滑性，布线基板具有分别形成直径不同的通孔的多个绝缘基板，并且每个绝缘基板包含玻璃布。