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    Semiconductor film, transistor, semiconductor device, display device, and electronic appliance
    23.
    发明授权
    Semiconductor film, transistor, semiconductor device, display device, and electronic appliance 有权
    半导体膜，晶体管，半导体器件，显示器件和电子器件

    公开(公告)号：US09406760B2

    公开(公告)日：2016-08-02

    申请号：US14626049

    申请日：2015-02-19

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Akihisa Shimomura ,  Yasumasa Yamane ,  Yuhei Sato ,  Takahisa Ishiyama ,  Kenichi Okazaki ,  Chiho Kawanabe ,  Masashi Oota ,  Noritaka Ishihara

    IPC: H01L21/00 ,  H01L29/24 ,  C01G15/00 ,  H01L27/12

    CPC classification number: H01L29/7869 ,  C01G15/006 ,  C01P2002/72 ,  C01P2002/89 ,  C01P2004/04 ,  C01P2006/40 ,  H01L27/1225 ,  H01L29/045 ,  H01L29/24 ,  H01L29/78696

    Abstract: Favorable electrical characteristics are given to a semiconductor device. Furthermore, a semiconductor device having high reliability is provided. One embodiment of the present invention is an oxide semiconductor film having a plurality of electron diffraction patterns which are observed in such a manner that a surface where the oxide semiconductor film is formed is irradiated with an electron beam having a probe diameter whose half-width is 1 nm. The plurality of electron diffraction patterns include 50 or more electron diffraction patterns which are observed in different areas, the sum of the percentage of first electron diffraction patterns and the percentage of second electron diffraction patterns accounts for 100%, the first electron diffraction patterns account for 90% or more, the first electron diffraction pattern includes observed points which indicates that a c-axis is oriented in a direction substantially perpendicular to the surface where the oxide semiconductor film is formed.

    Abstract translation: 给半导体器件提供有利的电特性。 此外，提供了具有高可靠性的半导体器件。 本发明的一个实施方案是具有多个电子衍射图案的氧化物半导体膜，其以使得形成氧化物半导体膜的表面被照射电子束，该电子束的半峰宽为 1nm。 多个电子衍射图案包括在不同区域中观察到的50个以上的电子衍射图案，第一电子衍射图案的百分比和第二电子衍射图案的百分比之和占100％，第一电子衍射图案占 90％以上时，第一电子衍射图案包括观察点，其表示c轴在与形成氧化物半导体膜的表面基本垂直的方向上取向。

    Semiconductor device
    24.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US09035305B2

    公开(公告)日：2015-05-19

    申请号：US14496500

    申请日：2014-09-25

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Masashi Tsubuku ,  Yusuke Nonaka ,  Noritaka Ishihara ,  Masashi Oota ,  Hideyuki Kishida

    IPC: H01L29/78 ,  H01L29/12 ,  H01L21/336 ,  H01L29/786 ,  H01L29/04 ,  H01L21/02

    CPC classification number: H01L29/7869 ,  H01L21/02565 ,  H01L21/477 ,  H01L29/045 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/786 ,  H01L29/78603 ,  H01L29/78606 ,  H01L29/78696

    Abstract: Reducing hydrogen concentration in a channel formation region of an oxide semiconductor is important in stabilizing threshold voltage of a transistor including an oxide semiconductor and improving reliability. Hence, hydrogen is attracted from the oxide semiconductor and trapped in a region of an insulating film which overlaps with a source region and a drain region of the oxide semiconductor. Impurities such as argon, nitrogen, carbon, phosphorus, or boron are added to the region of the insulating film which overlaps with the source region and the drain region of the oxide semiconductor, thereby generating a defect. Hydrogen in the oxide semiconductor is attracted to the defect in the insulating film. The defect in the insulating film is stabilized by the presence of hydrogen.

    Abstract translation: 降低氧化物半导体的沟道形成区域中的氢浓度对于稳定包括氧化物半导体的晶体管的阈值电压和提高可靠性是重要的。 因此，氢被氧化物半导体吸引并被捕获在与氧化物半导体的源极区域和漏极区域重叠的绝缘膜的区域中。 杂质如氩，氮，碳，磷或硼添加到与氧化物半导体的源极区和漏极区重叠的绝缘膜的区域中，从而产生缺陷。 氧化物半导体中的氢被吸引到绝缘膜中的缺陷。 通过氢气的存在使绝缘膜中的缺陷稳定。

    SEMICONDUCTOR DEVICE AND MEASUREMENT DEVICE
    25.
    发明申请
    SEMICONDUCTOR DEVICE AND MEASUREMENT DEVICE 有权
    半导体器件和测量器件

    公开(公告)号：US20140183530A1

    公开(公告)日：2014-07-03

    申请号：US14141838

    申请日：2013-12-27

    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

    Inventor： Shunpei Yamazaki ,  Shinpei Matsuda ,  Masashi Oota ,  Noritaka Ishihara

    IPC: H01L29/786 ,  H01L29/51

    CPC classification number: H01L29/7869 ,  H01L29/41733 ,  H01L29/45 ,  H01L29/517 ,  H01L29/78606 ,  H01L29/78693 ,  H01L29/78696

    Abstract: A semiconductor device includes an oxide semiconductor layer over a first oxide layer; first source and drain electrodes over the oxide semiconductor layer; second source and drain electrodes over the first source and drain electrodes respectively; a second oxide layer over the first source and drain electrodes; a gate insulating layer over the second source and drain electrodes and the second oxide layer; and a gate electrode overlapping the oxide semiconductor layer with the gate insulating layer provided therebetween. The structure in which the oxide semiconductor layer is sandwiched by the oxide layers can suppress the entry of impurities into the oxide semiconductor layer. The structure in which the oxide semiconductor layer is contacting with the source and drain electrodes can prevent increasing resistance between the source and the drain comparing one in which an oxide semiconductor layer is electrically connected to source and drain electrodes through an oxide layer.

    Abstract translation: 半导体器件包括在第一氧化物层上的氧化物半导体层; 在氧化物半导体层上的第一源极和漏极; 分别在第一源极和漏极上的第二源极和漏极; 在第一源极和漏极上的第二氧化物层; 在第二源极和漏极电极和第二氧化物层上的栅极绝缘层; 并且与氧化物半导体层重叠的栅电极与设置在其间的栅极绝缘层。 氧化物半导体层被氧化物层夹持的结构可以抑制杂质进入氧化物半导体层。 氧化物半导体层与源极和漏极接触的结构可以防止源极和漏极之间的电阻增加，其中氧化物半导体层通过氧化物层与源极和漏极电连接。

    Semiconductor device
    29.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US10439074B2

    公开(公告)日：2019-10-08

    申请号：US16034456

    申请日：2018-07-13

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Shunpei Yamazaki ,  Kenichi Okazaki ,  Masashi Tsubuku ,  Satoru Saito ,  Noritaka Ishihara

    IPC: H01L21/00 ,  H01L29/786 ,  H01L27/12 ,  H01L29/04 ,  H01L29/24 ,  H01L27/06 ,  H01L21/8258 ,  H01L27/088

    Abstract: A semiconductor device with improved electrical characteristics is provided. A semiconductor device with improved field effect mobility is provided. A semiconductor device in which the field-effect mobility is not lowered even at high temperatures is provided. A semiconductor device which can be formed at low temperatures is provided. A semiconductor device with improved productivity can be provided. In the semiconductor device, there is a range of a gate voltage where the field-effect mobility increases as the temperature increases within a range of the gate voltage from 0 V to 10 V. For example, such a range of a gate voltage exists at temperatures ranging from a room temperature (25° C.) to 120° C. In the semiconductor device, the off-state current is kept extremely low (lower than or equal to the detection limit of a measurement device) within the above temperature range.

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