APPARATUS TO MINIMIZE THERMAL IMPEDANCE USING COPPER ON DIE BACKSIDE
    27.
    发明申请
    APPARATUS TO MINIMIZE THERMAL IMPEDANCE USING COPPER ON DIE BACKSIDE 有权
    使用铜离子在背面最小化热阻的装置

    公开(公告)号:US20080296754A1

    公开(公告)日:2008-12-04

    申请号:US12179225

    申请日:2008-07-24

    摘要: A method and apparatus to minimize thermal impedance using copper on the die or chip backside. Some embodiments use deposited copper having a thickness chosen to complement a given chip thickness, in order to reduce or minimize wafer warpage. In some embodiments, the wafer, having a plurality of chips (e.g., silicon), is thinned (e.g., by chemical-mechanical polishing) before deposition of the copper layer, to reduce the thermal resistance of the chip. Some embodiments further deposit copper in a pattern of bumps, raised areas, or pads, e.g., in a checkerboard pattern, to thicken and add copper while reducing or minimizing wafer warpage and chip stress.

    摘要翻译: 使用铜芯在芯片或芯片背面上最小化热阻抗的方法和装置。 一些实施例使用具有选择的厚度的沉积铜来补充给定的芯片厚度,以便减小或最小化晶片翘曲。 在一些实施例中,具有多个芯片(例如硅)的晶片在沉积铜层之前被薄化(例如通过化学机械抛光),以降低芯片的热阻。 一些实施例进一步将铜以凸起,凸起区域或焊盘(例如棋盘图案)的图案沉积,以增加和添加铜,同时减少或最小化晶片翘曲和芯片应力。