公开(公告)号：US20070067064A1

公开(公告)日：2007-03-22

申请号：US11601968

申请日：2006-11-20

申请人： Warren Farnworth

发明人： Warren Farnworth

IPC分类号： G05D9/00

CPC分类号： H01L21/4763 ,  B29C64/106 ,  B29C64/135 ,  G03F7/0037 ,  H01L21/486 ,  H01L21/6835 ,  H01L21/76831 ,  H01L21/76898 ,  H01L23/49827 ,  H01L2221/68345 ,  H01L2221/6835 ,  H01L2223/6622 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K3/0023 ,  H05K3/0082 ,  H05K3/445 ,  H05K2203/107 ,  H05K2203/1476 ,  H01L2924/00

摘要： A surface level control system for use with a fabrication tank of a programmable material consolidation apparatus includes at least one aperture with a lowermost edge located at about the same elevation as a desired surface level for unconsolidated material within the fabrication tank. The surface level control system may also include a receptacle for receiving unconsolidated material that has been removed from the fabrication tank. The surface level control system may be configured to constantly allow for the removal of unconsolidated material, or it may be configured to selectively remove unconsolidated material. One or more sensors may be used to monitor the surface level and provide information that may be used in maintaining the surface level at a substantially constant elevation. A recycling system may be used in conjunction with or separately from a surface level control system to reintroduce unconsolidated material back into the fabrication tank.

摘要翻译： 与可编程材料固结装置的制造罐一起使用的表面层控制系统包括至少一个孔，其具有位于与制造槽内的未固结材料的期望表面水平大致相同的高度处的最下边缘。 表面水平控制系统还可以包括用于接收已经从制造罐移除的未固结材料的容器。 表面层控制系统可以被配置为不断地允许去除未固结的材料，或者可以将其配置为选择性地去除未固结的材料。 可以使用一个或多个传感器来监测表面水平并提供可用于将表面水平维持在基本恒定的高度的信息。 回收系统可以与表面层控制系统结合使用或与表面层控制系统分开使用，以将未固结的材料重新引入制造罐。

公开(公告)号：US20070020916A1

公开(公告)日：2007-01-25

申请号：US11184119

申请日：2005-07-19

申请人： Warren Farnworth

发明人： Warren Farnworth

IPC分类号： H01L23/58

CPC分类号： H01L24/12 ,  H01L24/11 ,  H01L2224/05022 ,  H01L2224/05573 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/1147 ,  H01L2224/11472 ,  H01L2224/13011 ,  H01L2224/13012 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H05K3/243 ,  H05K3/326 ,  H05K3/4007 ,  H05K3/4092 ,  H05K2201/0367 ,  H05K2201/0373 ,  H01L2224/13099 ,  H01L2224/05099

摘要： A flexible column interconnect for a microelectronic substrate includes a plurality of conductive columns extending from a bond pad or other conductive terminal in substantially mutually parallel arrangement, providing redundant current paths between the bond pad and a common cap in the form of a contact pad to which they are all joined. The flexibility of the interconnect may be varied by controlling the column dimensions, height, aspect ratio, number of columns, column material and by applying a supporting layer of dielectric material to a controlled depth about the base of the columns. A large number of interconnects may be formed on a wafer, partial wafer, single die, interposer, circuit board, or other substrate.

摘要翻译： 用于微电子衬底的柔性柱互连件包括从接合焊盘或其它导电端子以基本上相互平行布置的方式延伸的多个导电柱，在接合焊盘和接触焊盘的形式的公共盖之间提供冗余的电流路径， 他们都加入了。 互连的灵活性可以通过控制柱尺寸，高度，纵横比，列数，柱材料以及通过将介电材料的支撑层施加到围绕柱的底部的受控深度来改变。 可以在晶片，部分晶片，单芯片，插入器，电路板或其它基板上形成大量互连。

公开(公告)号：US20070018336A1

公开(公告)日：2007-01-25

申请号：US11516097

申请日：2006-09-05

申请人： Warren Farnworth ,  William Hiatt ,  Tim Murphy ,  John Caldwell ,  Michael Slaughter ,  David Hembree ,  Jamie Wanke

发明人： Warren Farnworth ,  William Hiatt ,  Tim Murphy ,  John Caldwell ,  Michael Slaughter ,  David Hembree ,  Jamie Wanke

IPC分类号： H01L23/48

CPC分类号： H01L24/06 ,  H01L21/563 ,  H01L24/16 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/0401 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/05624 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/484 ,  H01L2224/73203 ,  H01L2224/73257 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10162 ,  H01L2224/45099

摘要： Stress and force management techniques for a semiconductor die to help compensate for stress within the semiconductor die and to help compensate for forces applied to the semiconductor die to minimize damage thereto.

摘要翻译： 用于半导体管芯的应力和力管理技术来帮助补偿半导体管芯内的应力，并帮助补偿施加到半导体管芯上的力以最小化对其的损害。

公开(公告)号：US20070018321A1

公开(公告)日：2007-01-25

申请号：US11535414

申请日：2006-09-26

申请人： William Hiatt ,  Warren Farnworth

发明人： William Hiatt ,  Warren Farnworth

IPC分类号： H01L23/48 ,  H01L21/44

CPC分类号： H01L24/12 ,  H01L23/3114 ,  H01L24/11 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05557 ,  H01L2224/0558 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/1147 ,  H01L2224/11474 ,  H01L2224/11902 ,  H01L2224/13006 ,  H01L2224/13023 ,  H01L2224/13076 ,  H01L2224/13078 ,  H01L2224/13099 ,  H01L2224/13155 ,  H01L2224/81203 ,  H01L2224/81801 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2224/29099 ,  H01L2924/00014

摘要： An integrated circuit connection is describe that includes a first, securing member and a second, connection member. The first member, in an embodiment, is a spike that has a portion of its body fixed in a layer of an integrated circuit structure and extends outwardly from the integrated circuit structure. The second material is adapted to form a mechanical connection to a further electrical device. The second material (e.g., solder), is held by the first member to the integrated circuit structure. The first member increases the strength of the connection and assists in controlling the collapse of second member to form the mechanical connection to another circuit. The connection is formed by coating the integrated circuit structure with a patterned resist and etching the layer beneath the resist. A first member material (e.g., metal) is deposited. The resist is removed. The collapsible material is fixed to the first member.

摘要翻译： 描述了包括第一固定构件和第二连接构件的集成电路连接。 在一个实施例中，第一构件是尖头，其具有其主体的一部分固定在集成电路结构的层中并且从集成电路结构向外延伸。 第二材料适于与另一电气装置形成机械连接。 第二材料（例如焊料）被第一部件保持在集成电路结构上。 第一构件增加了连接的强度，并且有助于控制第二构件的塌陷以形成到另一个电路的机械连接。 该连接通过用图案化的抗蚀剂涂覆集成电路结构并蚀刻抗蚀剂下方的层而形成。 沉积第一成分材料（例如金属）。 抗蚀剂被去除。 可折叠材料固定到第一构件。

公开(公告)号：US20070001321A1

公开(公告)日：2007-01-04

申请号：US11516422

申请日：2006-09-05

申请人： David Hembree ,  Warren Farnworth

发明人： David Hembree ,  Warren Farnworth

IPC分类号： H01L23/29

CPC分类号： H01L27/1462 ,  B33Y30/00 ,  B33Y80/00 ,  H01L21/563 ,  H01L23/295 ,  H01L23/552 ,  H01L24/13 ,  H01L24/27 ,  H01L24/29 ,  H01L24/743 ,  H01L24/81 ,  H01L24/83 ,  H01L24/90 ,  H01L27/14618 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/1147 ,  H01L2224/13016 ,  H01L2224/1329 ,  H01L2224/13386 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/27554 ,  H01L2224/2908 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/29386 ,  H01L2224/32225 ,  H01L2224/73104 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81136 ,  H01L2224/81192 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/81855 ,  H01L2224/81903 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83194 ,  H01L2224/83851 ,  H01L2224/90 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01018 ,  H01L2924/01033 ,  H01L2924/0106 ,  H01L2924/01075 ,  H01L2924/01077 ,  H01L2924/12042 ,  H01L2924/3025 ,  H01L2924/351 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/0665 ,  H01L2924/0503 ,  H01L2224/05599

摘要： Devices include at least one semiconductor die including at least one surface that is at least partially covered by a photopolymer material. The photopolymer material includes a plurality of discrete particles dispersed through a polymerized matrix. In some embodiments, the photopolymer material may cover at least a portion of each of a plurality of semiconductor dice attached to a substrate. Furthermore, the photopolymer material may cover only a portion of each of the plurality of semiconductor dice, and another photopolymer material may cover another portion of each of the plurality of semiconductor dice.

摘要翻译： 器件包括至少一个半导体管芯，其包括至少部分被光聚合物材料覆盖的表面。 光聚合物材料包括通过聚合基质分散的多个离散颗粒。 在一些实施方案中，光聚合物材料可以覆盖附着到基底的多个半导体晶片中的每一个的至少一部分。 此外，光聚合物材料可以仅覆盖多个半导体晶片中的每一个的一部分，并且另一光聚合物材料可以覆盖多个半导体晶片的每一个的另一部分。

公开(公告)号：US20060273448A1

公开(公告)日：2006-12-07

申请号：US11504405

申请日：2006-08-15

申请人： Warren Farnworth ,  Dale Collins ,  Steven McDonald

发明人： Warren Farnworth ,  Dale Collins ,  Steven McDonald

IPC分类号： H01L23/053 ,  H01L23/12

CPC分类号： H01L21/76831 ,  H01L21/316 ,  H01L21/6835 ,  H01L21/76898 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/00

摘要： Methods are provided for creating lined vias in semiconductor substrates. Using electrophoretic deposition techniques, micelles of a lining material are deposited on the wall of the via, reacting with the surface of the wall until the entire wall is covered by the lining material. The lining material is then fixed in place to form a layer lining the via. The lined via may then be filled with a desired material. For example, a via lined with an insulative material may be filled with a material such as copper to create an insulated conductive via through the substrate.

公开(公告)号：US20060267196A1

公开(公告)日：2006-11-30

申请号：US11492764

申请日：2006-07-26

申请人： Warren Farnworth

发明人： Warren Farnworth

IPC分类号： H01L23/48

CPC分类号： H01L23/4951 ,  H01L23/3114 ,  H01L24/48 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  Y10T29/49121 ,  Y10T29/49146 ,  Y10T29/49172 ,  H01L2224/45015 ,  H01L2924/207

摘要： Printed tape is used to form a leads on chip (LOC) ball grid array (BGA) semiconductor device. Leads for a plurality of devices may be applied simultaneously. Bond wires, glob top encapsulant, and the ball grid arrays for the devices may be formed in single process steps. A low temperature curing adhesive material may be used to reduce the effects of differential thermal expansion between the tape and surface of the wafer. In another embodiment of the invention, anisotropically conductive adhesive material is used to connect bond pads on a wafer to leads printed on a tape.

摘要翻译： 印刷胶带用于形成芯片上的引线（LOC）球栅阵列（BGA）半导体器件。 可以同时应用多个装置的引线。 键合线，球顶密封剂和用于器件的球栅阵列可以在单个工艺步骤中形成。 可以使用低温固化粘合剂材料来降低带和表面之间的差热膨胀的影响。 在本发明的另一个实施例中，各向异性导电粘合剂材料用于连接晶片上的接合焊盘以将印刷在带上的引线。

公开(公告)号：US20060243889A1

公开(公告)日：2006-11-02

申请号：US11476015

申请日：2006-06-28

申请人： Warren Farnworth ,  Sidney Rigg ,  William Hiatt ,  Alan Wood ,  Peter Benson ,  James Wark ,  David Hembree ,  Kyle Kirby ,  Charles Watkins ,  Salman Akram

发明人： Warren Farnworth ,  Sidney Rigg ,  William Hiatt ,  Alan Wood ,  Peter Benson ,  James Wark ,  David Hembree ,  Kyle Kirby ,  Charles Watkins ,  Salman Akram

IPC分类号： H01L27/00

CPC分类号： H01L27/00 ,  B33Y80/00 ,  H01L27/14618 ,  H01L27/14625 ,  H01L27/14683 ,  H01L27/14687 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/00014

摘要： Microelectronic imager assemblies comprising a workpiece including a substrate and a plurality of imaging dies on and/or in the substrate. The substrate includes a front side and a back side, and the imaging dies comprise imaging sensors at the front side of the substrate and external contacts operatively coupled to the image sensors. The microelectronic imager assembly further comprises optics supports superimposed relative to the imaging dies. The optics supports can be directly on the substrate or on a cover over the substrate. Individual optics supports can have (a) an opening aligned with one of the image sensors, and (b) a bearing element at a reference distance from the image sensor. The microelectronic imager assembly can further include optical devices mounted or otherwise carried by the optics supports.

公开(公告)号：US20060242828A1

公开(公告)日：2006-11-02

申请号：US11476460

申请日：2006-06-28

申请人： Kyle Kirby ,  Warren Farnworth

发明人： Kyle Kirby ,  Warren Farnworth

IPC分类号： H05K1/00

CPC分类号： H01L23/49811 ,  B33Y80/00 ,  G01R1/06727 ,  G01R1/07357 ,  G01R3/00 ,  H01L24/11 ,  H01L24/12 ,  H01L24/16 ,  H01L24/48 ,  H01L24/72 ,  H01L24/81 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/136 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/81903 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01051 ,  H01L2924/01072 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/16152 ,  H01L2924/351 ,  H05K3/4092 ,  H05K2201/0311 ,  Y10T29/49204 ,  Y10T29/49222 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Photolithography patterned spring contacts are disclosed. The spring contacts may be fabricated using thin film processing techniques. A substrate, such as a silicon wafer or a carrier substrate is provided. At least one layer of a metal or alloy film may be deposited on the substrate or on at least one intervening release layer and patterned to form metal traces. A stressable material, exhibiting an at least partially tensile stress state, may be deposited on the metal traces in a localized region. A portion of the substrate or a portion of the intervening release layer underneath the metal traces may be removed by etching, causing the metal traces to curl upward resulting in the spring contacts. The spring contacts may be used as compliant electrical contacts for electrical devices, such as integrated circuits or carrier substrates. The compliant electrical contacts may also be used for probe cards to test other electrical devices.

摘要翻译： 公开了光刻图案的弹簧触点。 可以使用薄膜处理技术来制造弹簧触点。 提供了诸如硅晶片或载体衬底的衬底。 至少一层金属或合金膜可以沉积在衬底上或至少一个中间释放层上并且被图案化以形成金属迹线。 表现出至少部分拉伸应力状态的可压应材料可以沉积在局部区域的金属迹线上。 可以通过蚀刻去除基底的一部分或金属迹线下方的中间释放层的一部分，导致金属迹线向上卷曲，导致弹簧接触。 弹簧触点可以用作电气装置的柔性电触点，例如集成电路或载体基板。 兼容的电触点也可用于探针卡以测试其他电气设备。

公开(公告)号：US20060234422A1

公开(公告)日：2006-10-19

申请号：US11451398

申请日：2006-06-13

申请人： Warren Farnworth ,  Alan Wood ,  James Wark ,  David Hembree ,  Rickie Lake

发明人： Warren Farnworth ,  Alan Wood ,  James Wark ,  David Hembree ,  Rickie Lake

IPC分类号： H01L21/00

CPC分类号： H01L31/0203 ,  H01L27/14618 ,  H01L27/14625 ,  H01L27/14634 ,  H01L27/14683 ,  H01L2224/48227 ,  H01L2224/48091 ,  H01L2924/00014

摘要： Methods of packaging microelectronic imagers and packaged microelectronic imagers. An embodiment of such a method can include providing an imager workpiece having a plurality of imager dies arranged in a die pattern and providing a cover substrate through which a desired radiation can propagate. The imager dies include image sensors and integrated circuitry coupled to the image sensors. The method further includes providing a spacer having a web that includes an adhesive and has openings arranged to be aligned with the image sensors. For example, the web can be a film having an adhesive coating, or the web itself can be a layer of adhesive. The method continues by assembling the imager workpiece with the cover substrate such that (a) the spacer is between the imager workpiece and the cover substrate, and (b) the openings are aligned with the image sensors. The attached web is not cured after the imager workpiece and the cover substrate have both been adhered to the web. As such, the web does not outgas contaminants into the compartments in which the image sensors are housed.

摘要翻译： 包装微电子成像仪和封装的微电子成像仪的方法。 这种方法的实施例可以包括提供具有以模片图案布置的多个成像模具的成像工件，并提供覆盖基板，期望的辐射可以通过该基板传播。 成像器裸片包括耦合到图像传感器的图像传感器和集成电路。 该方法还包括提供具有包括粘合剂并具有布置成与图像传感器对准的开口的腹板的间隔件。 例如，网可以是具有粘合剂涂层的膜，或者网本身可以是一层粘合剂。 该方法通过将成像器工件与盖基板组装成使得（a）间隔件位于成像器工件和盖基板之间，并且（b）开口与图像传感器对准，该方法继续。 在成像器工件和盖基板都已经粘附在卷材上之后，连接的卷材不固化。 因此，纸幅不会将污染物排出到其中容纳图像传感器的隔室中。