公开(公告)号：US07013561B2

公开(公告)日：2006-03-21

申请号：US10314034

申请日：2002-12-05

申请人： Seiichi Nakatani ,  Koichi Hirano ,  Mikinari Shimada ,  Yasuhiro Sugaya

发明人： Seiichi Nakatani ,  Koichi Hirano ,  Mikinari Shimada ,  Yasuhiro Sugaya

IPC分类号： H01K3/10

CPC分类号： H01G9/26 ,  H01L23/642 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/162 ,  H05K3/383 ,  H05K3/4614 ,  H05K2201/0187 ,  H05K2201/0355 ,  H05K2203/0315 ,  Y10T29/417 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49146 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T29/5313 ,  H01L2924/00

摘要： A capacitor-mounted metal foil of the present invention is provided with a metal foil and a plurality of capacitors formed on the metal foil. Each of the capacitors includes a conductive layer disposed above the metal foil, and a dielectric layer disposed between the metal foil and the conductive layer.

摘要翻译： 本发明的电容器安装的金属箔在金属箔上设置有金属箔和多个电容器。 每个电容器包括设置在金属箔上方的导电层和设置在金属箔和导电层之间的电介质层。

公开(公告)号：US07390692B2

公开(公告)日：2008-06-24

申请号：US11497169

申请日：2006-08-01

申请人： Yasuhiro Sugaya ,  Toshiyuki Asahi ,  Shingo Komatsu ,  Yoshiyuki Yamamoto ,  Seiichi Nakatani

发明人： Yasuhiro Sugaya ,  Toshiyuki Asahi ,  Shingo Komatsu ,  Yoshiyuki Yamamoto ,  Seiichi Nakatani

IPC分类号： H01L21/00

CPC分类号： H05K3/328 ,  H01L23/13 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49894 ,  H01L24/24 ,  H01L24/25 ,  H01L24/82 ,  H01L24/94 ,  H01L2224/05001 ,  H01L2224/05023 ,  H01L2224/05568 ,  H01L2224/16 ,  H01L2224/2402 ,  H01L2224/24226 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01037 ,  H01L2924/01039 ,  H01L2924/01044 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01076 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/19105 ,  H01L2924/3011 ,  H05K1/0271 ,  H05K1/0373 ,  H05K3/20 ,  H05K3/326 ,  H05K3/4614 ,  H05K3/4626 ,  H05K2201/091 ,  H05K2201/10674 ,  H01L2224/97 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2224/05144 ,  H01L2924/00014 ,  H01L2224/05147

摘要： A semiconductor device (1) of the present invention includes a semiconductor element (103) including electrode parts (104), and a wiring substrate (108) including an insulation layer (101), electrode-part-connection electrodes (102) provided in the insulation layer (101), and external electrodes (107) that is provided in the insulation layer (101) and that is connected electrically with the electrode-part-connection electrodes (102), in which the electrode parts (104) and the electrode-part-connection electrodes (102) are connected electrically with each other. The insulation layer (101) has an elastic modulus measured according to JIS K6911 of not less than 0.1 GP a and not more than 5 GPa, and the electrodes (104) and the electrode-part-connection electrodes (102) are connected by metal joint.

摘要翻译： 本发明的半导体器件（1）包括包括电极部分（104）的半导体元件（103）和包括绝缘层（101）的布线基板（108），电极部分连接电极（102） 绝缘层（101）和设置在绝缘层（101）中并与电极部分连接电极（102）电连接的外部电极（107），其中电极部分（104）和 电极部分连接电极（102）彼此电连接。 绝缘层（101）具有根据JIS K6911测定的弹性模量为0.1GPa以上且5GPa以下，电极（104）和电极部连接用电极（102）通过金属 联合。

公开(公告)号：US20070224735A1

公开(公告)日：2007-09-27

申请号：US11750617

申请日：2007-05-18

申请人： Seiji Karashima ,  Seiichi Nakatani ,  Yasuhiro Sugaya ,  Toshiyuki Asahi ,  Takashi Ichiryu

发明人： Seiji Karashima ,  Seiichi Nakatani ,  Yasuhiro Sugaya ,  Toshiyuki Asahi ,  Takashi Ichiryu

IPC分类号： H01L21/82

CPC分类号： G02B6/4249 ,  G02B6/3608 ,  G02B6/3636 ,  G02B6/3668 ,  G02B6/3676 ,  G02B6/3692 ,  G02B6/4214 ,  H05K1/0274 ,  H05K2203/167

摘要： A fabrication method for an optical transmission channel board includes a first step of forming on a substrate a layer containing an electrically conductive material, and a second step of patterning said layer containing an electrically conductive material formed on said substrate, and thereby forming circuit patterns at least a part of which is used as an electric circuit and at least a part of which positionally regulates an optical transmission channel.

摘要翻译： 用于光传输通道板的制造方法包括在衬底上形成含有导电材料的层的第一步骤，以及第二步骤，使包含形成在所述衬底上的导电材料的层的图案化，从而形成电路图案 其中至少一部分用作电路，其中至少一部分位置地调节光传输通道。

公开(公告)号：US07242823B2

公开(公告)日：2007-07-10

申请号：US11041101

申请日：2005-01-21

申请人： Seiji Karashima ,  Seiichi Nakatani ,  Yasuhiro Sugaya ,  Toshiyuki Asahi ,  Takashi Ichiryu

发明人： Seiji Karashima ,  Seiichi Nakatani ,  Yasuhiro Sugaya ,  Toshiyuki Asahi ,  Takashi Ichiryu

IPC分类号： G02B6/12 ,  H01L29/00

CPC分类号： G02B6/4249 ,  G02B6/3608 ,  G02B6/3636 ,  G02B6/3668 ,  G02B6/3676 ,  G02B6/3692 ,  G02B6/4214 ,  H05K1/0274 ,  H05K2203/167

摘要： An optical transmission board is provided. The optical transmission board includes an optical transmission channel, a retention board for retaining the optical transmission channel and circuit patterns. The circuit patterns are formed on the retention board and a part of the circuit patterns is used as an electric circuit. The optical transmission channel is positionally regulated by the part of the circuit patterns.

摘要翻译： 提供一种光传输板。 光传输板包括光传输通道，用于保持光传输通道和电路图案的保持板。 电路图案形成在保持板上，一部分电路图形用作电路。 光传输通道由电路图案的一部分位置调节。

公开(公告)号：US07132756B2

公开(公告)日：2006-11-07

申请号：US10692938

申请日：2003-10-24

申请人： Yasuhiro Sugaya ,  Toshiyuki Asahi ,  Shingo Komatsu ,  Yoshiyuki Yamamoto ,  Seiichi Nakatani

发明人： Yasuhiro Sugaya ,  Toshiyuki Asahi ,  Shingo Komatsu ,  Yoshiyuki Yamamoto ,  Seiichi Nakatani

IPC分类号： H01L23/48

CPC分类号： H05K3/328 ,  H01L23/13 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49894 ,  H01L24/24 ,  H01L24/25 ,  H01L24/82 ,  H01L24/94 ,  H01L2224/05001 ,  H01L2224/05023 ,  H01L2224/05568 ,  H01L2224/16 ,  H01L2224/2402 ,  H01L2224/24226 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01037 ,  H01L2924/01039 ,  H01L2924/01044 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01076 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/19105 ,  H01L2924/3011 ,  H05K1/0271 ,  H05K1/0373 ,  H05K3/20 ,  H05K3/326 ,  H05K3/4614 ,  H05K3/4626 ,  H05K2201/091 ,  H05K2201/10674 ,  H01L2224/97 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2224/05144 ,  H01L2924/00014 ,  H01L2224/05147

摘要： A semiconductor device (1) of the present invention includes a semiconductor element (103) including electrode parts (104), and a wiring substrate (108) including an insulation layer (101), electrode-part-connection electrodes (102) provided in the insulation layer (101), and external electrodes (107) that is provided in the insulation layer (101) and that is connected electrically with the electrode-part-connection electrodes (102), in which the electrode parts (104) and the electrode-part-connection electrodes (102) are connected electrically with each other. The insulation layer (101) has an elastic modulus measured according to JIS K6911 of not less than 0.1 GP a and not more than 5 GPa, and the electrodes (104) and the electrode-part-connection electrodes (102) are connected by metal joint.

公开(公告)号：US06975516B2

公开(公告)日：2005-12-13

申请号：US10272599

申请日：2002-10-15

申请人： Toshiyuki Asahi ,  Yasuhiro Sugaya ,  Shingo Komatsu ,  Yoshiyuki Yamamoto ,  Seiichi Nakatani

发明人： Toshiyuki Asahi ,  Yasuhiro Sugaya ,  Shingo Komatsu ,  Yoshiyuki Yamamoto ,  Seiichi Nakatani

IPC分类号： H01L21/98 ,  H01L23/538 ,  H01L25/065 ,  H01L25/16 ,  H05K1/18 ,  H05K7/06

CPC分类号： H01L25/50 ,  H01L21/6835 ,  H01L23/5389 ,  H01L23/552 ,  H01L24/24 ,  H01L24/81 ,  H01L24/82 ,  H01L24/83 ,  H01L25/0652 ,  H01L25/16 ,  H01L2221/68345 ,  H01L2224/16225 ,  H01L2224/2402 ,  H01L2224/24226 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/82047 ,  H01L2224/83801 ,  H01L2224/83851 ,  H01L2924/00011 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01009 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3025 ,  H05K1/186 ,  H05K3/20 ,  H05K3/4069 ,  H05K3/4602 ,  H05K3/4652 ,  H05K2201/10378 ,  H05K2201/10636 ,  H05K2203/061 ,  Y02P70/611 ,  H01L2924/00 ,  H01L2224/29075

摘要： A component built-in module includes an insulating layer, wirings integrated with both surfaces of the insulating layer, a via connecting the wirings, and one or more components selected from an electronic component and a semiconductor, which is embedded inside of the insulating layer. In this module, at least one of the wirings is formed on a surface of a wiring board, and the components embedded inside of the insulating layer are mounted on and integrated with the wiring board before embedding. This configuration allows the components such as a semiconductor to undergo a mounting inspection and a property inspection before embedding. As a result, the yields of the module can be improved. In addition, since the components are integrated with the wiring board and embedded, the strength thereof can be enhanced.

公开(公告)号：US06955948B2

公开(公告)日：2005-10-18

申请号：US10271937

申请日：2002-10-15

申请人： Toshiyuki Asahi ,  Yasuhiro Sugaya ,  Shingo Komatsu ,  Seiichi Nakatani

发明人： Toshiyuki Asahi ,  Yasuhiro Sugaya ,  Shingo Komatsu ,  Seiichi Nakatani

IPC分类号： H05K1/14 ,  H01L23/538 ,  H05K1/18 ,  H05K3/46 ,  H01L21/44

CPC分类号： H05K1/187 ,  H01L23/5389 ,  H01L2224/16225 ,  H01L2224/45144 ,  H01L2924/00014 ,  H01L2924/01025 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/12044 ,  H01L2924/181 ,  H01L2924/19105 ,  H05K3/20 ,  H05K3/4069 ,  H05K3/4602 ,  H05K3/4614 ,  H05K3/4652 ,  H05K2201/10378 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/0401

摘要： A component built-in module includes an electric insulation layer, first wiring patterns in a plurality of layers that are laminated with the electric insulation layer being interposed therebetween, at least one first inner via electrically connecting the first wiring patterns in different layers with each other, and at least one electronic component that is embedded in the electric insulation layer and is mounted on any one of the first wiring patterns in the plurality of layers, wherein at least one of the first inner vias is present in a range that overlaps a range in which the electronic component is present in a lamination direction in which the first wiring patterns are laminated, and has a height in the lamination direction that is smaller than a height of the electronic component. Since the first inner via has a small height, the via diameter can be decreased. Therefore, it is possible to provide a component built-in module that has high reliability and is suitable for high-density component mounting.

摘要翻译： 组件内置模块包括电绝缘层，层间隔着电绝缘层的多个层中的第一布线图案，至少一个第一内通孔，将第一布线图案彼此不同地电连接 以及至少一个电子部件，其嵌入在所述电绝缘层中并且安装在所述多个层中的所述第一布线图案中的任一个上，其中，所述第一内部通孔中的至少一个存在于与所述多个层重叠的范围内 其中电子部件以层叠方式存在，其中第一布线图案被层叠，并且具有比电子部件的高度小的层叠方向的高度。 由于第一内部通孔具有小的高度，所以通孔直径可以减小。 因此，可以提供具有高可靠性并适用于高密度部件安装的部件内置模块。

公开(公告)号：US06855892B2

公开(公告)日：2005-02-15

申请号：US10246476

申请日：2002-09-19

申请人： Shingo Komatsu ,  Seiichi Nakatani ,  Yasuhiro Sugaya ,  Toshiyuki Asahi ,  Yoshiyuki Yamamoto

发明人： Shingo Komatsu ,  Seiichi Nakatani ,  Yasuhiro Sugaya ,  Toshiyuki Asahi ,  Yoshiyuki Yamamoto

IPC分类号： H05K1/18 ,  H05K3/40 ,  H05K3/46 ,  H01R12/04

CPC分类号： H05K3/4617 ,  H01L2224/16 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H05K1/185 ,  H05K3/4069 ,  H05K3/4626 ,  H05K3/4652 ,  H05K3/4655 ,  H05K2201/0209 ,  H05K2201/10378 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T428/249996

摘要： An insulation sheet for use in producing a wiring substrate comprises, as via bole conductors, conductive paste filled in via holes formed through the insulation sheet, and a curing-starting temperature of the conductive paste is lower than a melting-starting temperature of the insulation sheet. A wiring substrate is produced by laminating such insulation sheets, that have conductive paste in via holes, and subjecting this laminate to thermo-compression bonding, wherein deformation of via holes and dislocation of the via holes, because of a molten insulation sheet, does not occur.

摘要翻译： 用于制造布线基板的绝缘片包括作为通孔导体的填充有通过绝缘片形成的通孔的导电糊，并且导电糊的固化开始温度低于绝缘的熔融起始温度 片。 通过在通孔中层叠具有导电性糊剂的绝缘片，并对该层压体进行热压接而制造布线基板，由于熔融绝缘片而导致通孔的变形和通孔的位错不会 发生。

公开(公告)号：US06784530B2

公开(公告)日：2004-08-31

申请号：US10346917

申请日：2003-01-17

申请人： Yasuhiro Sugaya ,  Toshiyuki Asahi ,  Shingo Komatsu ,  Yoshiyuki Yamamoto ,  Seiichi Nakatani ,  Satoru Yuhaku ,  Kazuo Ohtani

发明人： Yasuhiro Sugaya ,  Toshiyuki Asahi ,  Shingo Komatsu ,  Yoshiyuki Yamamoto ,  Seiichi Nakatani ,  Satoru Yuhaku ,  Kazuo Ohtani

IPC分类号： H01L2302

CPC分类号： H05K1/187 ,  H01L21/56 ,  H01L21/563 ,  H01L21/568 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/5385 ,  H01L23/5389 ,  H01L24/29 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/04105 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/73204 ,  H01L2224/73267 ,  H01L2224/81001 ,  H01L2224/81801 ,  H01L2224/83101 ,  H01L2224/83856 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06582 ,  H01L2225/06589 ,  H01L2225/06596 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1517 ,  H01L2924/15787 ,  H01L2924/1627 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/01083 ,  H01L2924/3512 ,  H01L2924/00014

摘要： A circuit component built-in module includes: a first electrical insulating substrate made of a mixture containing an inorganic filler and a thermosetting resin; a plurality of wiring patterns formed at least on a principal surface of the first electrical insulating substrate; a semiconductor chip incorporated in the first electrical insulating substrate and connected electrically with the wiring patterns; and inner vias electrically connecting the plurality of wiring patterns with one another, the inner vias passing through the first electrical insulating substrate. In the circuit component built-in module, the semiconductor chip has a thickness of not less than 30 &mgr;m and not more than 100 &mgr;m, and has a non-wired surface ground, and the circuit component built-in module has a thickness in a range of not less than 80 &mgr;m and not more than 200 &mgr;m. With this configuration, the high-performance and compact-size circuit component built-in module in which circuit components are mounted at a high density is provided so as to be used suitably in various types of electronic information devices.

摘要翻译： 电路部件内置模块包括：由含有无机填料和热固性树脂的混合物制成的第一电绝缘基板; 至少形成在所述第一电绝缘基板的主表面上的多个布线图案; 结合在第一电绝缘基板中并与布线图形电连接的半导体芯片; 以及将所述多个布线图案彼此电连接的内部通孔，所述内部通孔穿过所述第一电绝缘基板。 在电路部件内置模块中，半导体芯片的厚度为30μm以上且100μm以下，具有非接线表面接地，电路部件内置模块的厚度为 范围不小于80μm，不大于200μm。 利用这种配置，提供了以高密度安装电路部件的高性能和紧凑型电路部件内置模块，以便适用于各种类型的电子信息装置。

公开(公告)号：US07134198B2

公开(公告)日：2006-11-14

申请号：US10654343

申请日：2003-09-03

申请人： Seiichi Nakatani ,  Yoshihiro Bessho ,  Yasuhiro Sugaya ,  Keiji Onishi

发明人： Seiichi Nakatani ,  Yoshihiro Bessho ,  Yasuhiro Sugaya ,  Keiji Onishi

IPC分类号： H05K3/30

CPC分类号： H01L21/568 ,  H01L21/561 ,  H01L23/3107 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/45144 ,  H01L2224/81005 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/10329 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/15787 ,  H01L2924/16195 ,  H01L2924/16235 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H05K1/187 ,  H05K3/20 ,  H05K3/4069 ,  H05K3/4614 ,  H05K3/4652 ,  H05K2201/10378 ,  Y10T29/4913 ,  Y10T29/49135 ,  Y10T29/49146 ,  Y10T29/53174 ,  Y10T29/53178 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05624 ,  H01L2924/00014

摘要： A method for manufacturing an electric element built-in module including flip-chip mounting at least one electric element such as a semiconductor chip or a surface acoustic wave device on a wiring pattern, sealing the electric element with a thermosetting resin composition, and grinding or abrading the thermosetting resin composition and electric element from a side of the electric element opposite that of the wiring pattern. The method provides upper surfaces of the electric element and the thermosetting resin composition that are substantially flush with each other. The method provides an electric element built-in module suitable for high-density packaging with a reduced thickness without damaging the electric element and while maintaining mechanical strength.

摘要翻译： 一种电气元件内置模块的制造方法，其包括在布线图案上安装诸如半导体芯片或表面声波装置的至少一个电气元件的倒装芯片，用热固性树脂组合物密封电气元件，以及研磨或 从电气元件的与布线图案相反的一侧研磨热固性树脂组合物和电气元件。 该方法提供电气元件和热固性树脂组合物的彼此基本齐平的上表面。 该方法提供一种电子元件内置模块，适用于厚度较小的高密度封装，而不会损坏电气元件，同时保持机械强度。