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49 条记录 (耗时 0.041 秒)

    Method and apparatus for polishing metal surfaces
    31.
    发明授权
    Method and apparatus for polishing metal surfaces 失效
    抛光金属表面的方法和设备

    公开(公告)号：US5759427A

    公开(公告)日：1998-06-02

    申请号：US704193

    申请日：1996-08-28

    申请人： Edward Cibulsky ,  Gerald Andrew Kiballa ,  Voya Rista Markovich ,  Gary Leigh Newman ,  John Francis Prikazsky ,  Michael Wozniak

    发明人： Edward Cibulsky ,  Gerald Andrew Kiballa ,  Voya Rista Markovich ,  Gary Leigh Newman ,  John Francis Prikazsky ,  Michael Wozniak

    IPC分类号： B24B7/06 ,  B24B37/04 ,  B24B41/047 ,  C23F1/08 ,  H05K3/06 ,  H05K3/26 ,  C23F1/02 ,  C23F1/44

    CPC分类号： B24B37/04 ,  B24B41/047 ,  B24B7/06 ,  C23F1/08 ,  H05K3/068 ,  H05K3/26 ,  H05K2203/025 ,  H05K2203/0346 ,  H05K2203/0353 ,  H05K2203/1509

    摘要： A technique for chemically planarizing an exposed surface of metal on a substrate to a pre-determined thickness is provided. The substrate has an exposed metal surface such as copper circuitry on a dielectric substrate which is to be planarized. Typically, this will be circuitization extending above a photoresist layer. A planarizing head is rotated against the substrate, with the planarizing head in contact with the metal surface on the substrate. A chemical etchant, essentially free of abrasive material, is continuously supplied to the interface between the metal surface and the planarizing head. The planarizing continues until a predetermined thickness of the metal has been reached. In circuit board manufacturing, this will form a surface co-planar with the photoresist. In some instances where significant height reduction is required, thus requiring significant metal removal, several passes of the substrate may be required or a device with multiple heads may be used. On all but the last pass or last head, the planarizing head may include a film of polyester impregnated with very fine grit, such as 15.mu. or less silicon carbide (SiC). However, on the final pass or head, a relatively hard surface roll, e.g., rubber, free of added grit, is used to ensure a planar surface free of gouges.

    摘要翻译： 提供了一种用于将基板上的金属的暴露表面化学平坦化至预定厚度的技术。 衬底具有暴露的金属表面，例如待平坦化的电介质衬底上的铜电路。 通常，这将是在光致抗蚀剂层之上延伸的电路。 平面化头相对于衬底旋转，平坦化头与衬底上的金属表面接触。 基本上不含研磨材料的化学蚀刻剂被连续供应到金属表面和平坦化头部之间的界面。 平面化继续，直到达到预定厚度的金属。 在电路板制造中，这将形成与光致抗蚀剂共面的表面。 在需要显着降低高度的一些情况下，因此需要显着的金属去除，可能需要多次通过基底，或者可以使用具有多个头部的装置。 除了最后一次或最后一个头部之外，平坦化头可以包括浸渍有非常细的砂砾的聚酯薄膜，例如15微米或更少的碳化硅（SiC）。 然而，在最后的通行或头部，使用相对硬的表面辊，例如没有添加砂砾的橡胶，以确保没有气刨的平面。

    Printed wiring board interposer sub-assembly and method
    34.
    发明授权
    Printed wiring board interposer sub-assembly and method 失效
    印刷电路板插件子组件及方法

    公开(公告)号：US06974915B2

    公开(公告)日：2005-12-13

    申请号：US10979366

    申请日：2004-11-01

    申请人： William Louis Brodsky ,  Benson Chan ,  Michael Anthony Gaynes ,  Voya Rista Markovich

    发明人： William Louis Brodsky ,  Benson Chan ,  Michael Anthony Gaynes ,  Voya Rista Markovich

    IPC分类号： H05K3/32 ,  H05K1/16

    CPC分类号： H01R12/523 ,  H05K3/325 ,  Y10T29/49117 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49165 ,  Y10T29/49213

    摘要： The details of a printed wiring board (PWB) sub-assembly and the method of producing the same are described. The sub-assembly comprises a printed circuit board electrically joined through a plurality of connections to one or more area array devices, such as modules or printed wiring boards. The sub-assembly can serve as a part of an original assembly. The sub-assembly can function as an after market item that can be readily substituted as a replacement for a failed component wherein the dimensional space between the printed circuit board and one or both of the area array devices must provide sufficient clearance for surface mounted devices.

    摘要翻译： 描述印刷电路板（PWB）子组件的细节及其制造方法。 子组件包括通过多个连接电连接到一个或多个区域阵列器件（例如模块或印刷线路板）的印刷电路板。 子组件可以作为原始组件的一部分。 子组件可以用作可以容易地替代为故障组件的后市场项目，其中印刷电路板与一个或两个区域阵列器件之间的尺寸空间必须为表面安装的器件提供足够的间隙。

    Enhanced electrical/mechanical connection for electronic devices
    35.
    发明授权
    Enhanced electrical/mechanical connection for electronic devices 失效
    电子设备增强的电气/机械连接

    公开(公告)号：US06695623B2

    公开(公告)日：2004-02-24

    申请号：US09871554

    申请日：2001-05-31

    申请人： William Louis Brodsky ,  David V. Caletka ,  Michael Anthony Gaynes ,  Voya Rista Markovich

    发明人： William Louis Brodsky ,  David V. Caletka ,  Michael Anthony Gaynes ,  Voya Rista Markovich

    IPC分类号： H01R1200

    CPC分类号： H01R12/52 ,  H05K3/321 ,  H05K3/325 ,  H05K3/3436 ,  Y10T29/49147 ,  Y10T29/49149

    摘要： A method and structure for electrically and mechanically interconnecting an array of printed circuit board contacts to an array of module contacts with a plurality of deformable resilient electrical conductors with two ends. Each of the conductor ends are electrically connected to one of the contact arrays. A portion of the conductor may deform longitudinally and laterally responsive to movement of the printed circuit board relative to the module responsive to heating and cooling cycles and mechanical vibrations, while maintaining the electrical connection of the contact arrays. An interposer with apertures extending through the interposer carries the conductors in the apertures and is used to align the conductors with the contacts. A method for excluding a rigid adhesive means from a portion of the resilient conductor is also taught.

    摘要翻译： 用于将印刷电路板触点阵列电气和机械地互连到具有两端的多个可变形的弹性电导体的模块触点阵列的方法和结构。 每个导体端电连接到一个接触阵列。 导体的一部分可以响应于加热和冷却循环和机械振动而响应于印刷电路板相对于模块的移动而纵向和横向地变形，同时保持接触阵列的电连接。 具有延伸穿过插入器的孔的插入器承载孔中的导体并且用于将导体与触点对准。 还教导了从弹性导体的一部分排除刚性粘合剂装置的方法。

    Circuitized structures produced by the methods of electroless plating
    36.
    发明授权
    Circuitized structures produced by the methods of electroless plating 失效
    通过无电镀方法生产的电路结构

    公开(公告)号：US06680440B1

    公开(公告)日：2004-01-20

    申请号：US09027856

    申请日：1998-02-23

    申请人： David John Russell ,  Gerald Walter Jones ,  Heike Marcello ,  Voya Rista Markovich

    发明人： David John Russell ,  Gerald Walter Jones ,  Heike Marcello ,  Voya Rista Markovich

    IPC分类号： H05K116

    CPC分类号： H05K3/287 ,  G03F7/0385 ,  H05K3/0023 ,  H05K3/184 ,  H05K3/243 ,  H05K2203/072

    摘要： The present invention provides new methods for electroless plating of metal particularly gold and copper onto substrates, such as circuitized substrates, which reduces processing steps, reduces metal consumption, and reduces the scraping of parts due to contamination. The method employs a permanent plating resist. The method for electrolessly plating metal onto a substrate, including the following steps: providing: an uncured, photoimagable, dielectric permanent plating resist comprising: from about 10 to 80% of phenoxy polyol resin which is the condensation product of epichlorohydrin and bisphenol A, having a molecular weight of from about 40,000 to 130,000; from about 20 to 90% of an epoxidized multifunctional bisphenol A formaldehyde novolac resin having a molecular weight of from about 4,000 to 10,000; from 0 to 50% of a diglycidyl ether of bisphenol A having a molecular weight of from about 600 to 2,500; and from about 0.1 to 15 parts by weight of the total resin weight, a cationic photoinitiator; applying the permanent plating resist on the substrate; photopatterning the permanent plating resist to form apertures therein which expose areas of the substrate; and electrolessly plating metal onto the exposed areas of the substrate. The permanent plating resist is useful to protect the substrate areas including for example metallized features on the substrate, from the electroless deposition of metal during electroless plating; thus selective plating of metal is achieved. The permanent plating resist is not degraded by conventional gold or copper electroless baths. The invention also relates to circuitized structures produced by the methods of electroless plating.

    摘要翻译： 本发明提供了金属特别是金和铜在电路化基板等基板上进行化学镀的新方法，其减少了加工步骤，降低了金属消耗，并减少了由于污染引起的部件刮擦。 该方法采用永久电镀抗蚀剂。 将金属无电镀在基板上的方法，包括以下步骤：提供：未固化的，可光成像的绝缘永久电镀抗蚀剂，其包含：约10至80％的作为表氯醇和双酚A的缩合产物的苯氧基多元醇树脂，其具有 分子量为约40,000至130,000; 约20至90％的分子量为约4,000至10,000的环氧化多官能双酚A甲醛酚醛清漆树脂; 0至50％的分子量为约600至2,500的双酚A的二缩水甘油醚; 和约0.1至15重量份的总树脂重量，阳离子光引发剂; 在基板上施加永久电镀抗蚀剂; 对永久电镀抗蚀剂进行光图案化以在其中形成露出基板的区域的孔; 并将金属化学镀在衬底的暴露区域上。 永久电镀抗蚀剂可用于保护衬底区域，包括例如基板上的金属化特征，在化学镀期间的金属化学沉积; 从而实现了金属的选择性镀覆。 永久电镀抗蚀剂不会被常规的金或铜无电镀浴降解。 本发明还涉及通过化学镀方法制造的电路结构。

    Method of making an interposer sub-assembly in a printed wiring board
    40.
    发明授权
    Method of making an interposer sub-assembly in a printed wiring board 失效
    在印刷电路板中制作插入件子组件的方法

    公开(公告)号：US06892451B2

    公开(公告)日：2005-05-17

    申请号：US10361659

    申请日：2003-02-10

    申请人： William Louis Brodsky ,  Benson Chan ,  Michael Anthony Gaynes ,  Voya Rista Markovich

    发明人： William Louis Brodsky ,  Benson Chan ,  Michael Anthony Gaynes ,  Voya Rista Markovich

    IPC分类号： H05K3/32 ,  H05K3/30

    CPC分类号： H01R12/523 ,  H05K3/325 ,  Y10T29/49117 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49165 ,  Y10T29/49213

    摘要： The details of a printed wiring board (PWB) sub-assembly and the method of producing the same are described. The sub-assembly comprises a printed circuit board electrically joined through a plurality of connections to one or more area array devices, such as modules or printed wiring boards. The sub-assembly can serve as a part of an original assembly. The sub-assembly can function as an after market item that can be readily substituted as a replacement for a failed component wherein the dimensional space between the printed circuit board and one or both of the area array devices must provide sufficient clearance for surface mounted devices.

    摘要翻译： 描述印刷电路板（PWB）子组件的细节及其制造方法。 子组件包括通过多个连接电连接到一个或多个区域阵列器件（例如模块或印刷线路板）的印刷电路板。 子组件可以作为原始组件的一部分。 子组件可以用作可以容易地替代为故障组件的后市场项目，其中印刷电路板与一个或两个区域阵列器件之间的尺寸空间必须为表面安装的器件提供足够的间隙。