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    Electronic module with multiple solder dams in soldermask window
    5.
    发明授权
    Electronic module with multiple solder dams in soldermask window 失效
    在焊接窗口中具有多个焊接坝的电子模块

    公开(公告)号：US5650595A

    公开(公告)日：1997-07-22

    申请号：US450441

    申请日：1995-05-25

    Applicant: Mark Rudolf Bentlage ,  Kenneth Michael Fallon ,  Lawrence Harold White

    Inventor： Mark Rudolf Bentlage ,  Kenneth Michael Fallon ,  Lawrence Harold White

    IPC: H01L21/60 ,  H01L21/56 ,  H01L23/12 ,  H01L23/28 ,  H01L23/538 ,  H05K3/24 ,  H05K3/34 ,  H05K1/02

    CPC classification number: H05K3/3452 ,  H01L23/5386 ,  H01L24/16 ,  H01L2924/01322 ,  H01L2924/14 ,  H05K2201/2081 ,  H05K2203/0315 ,  H05K3/243

    Abstract: The present method employs a first plating resist for forming circuit lines on a carrier substrate. While the plating resist is still in place a metal, such as nickel, is deposited on top of the circuit lines. A second plating resist is employed for plating solder on the circuit lines at solder sites. At this stage additional solder can be deposited at each solder site to provide or supplement the necessary low melt solder required for forming a solder joint. The first and second resists along with solder thereon are then stripped and copper foil on the carrier substrate is etched away around the circuit lines. A soldermask is then formed on the carrier substrate over the circuit lines except for circuit lines in the chip sites. The soldermask has a single large opening at each chip site which has lateral dimensions which are slightly larger than the lateral dimensions of the chip to be connected at the chip site. During curing of the soldermask, which involves heat, the nickel layer on top of the circuit lines within the chip site opening quickly oxidizes to provide solder dams which extend along the lengths of the lines within the chip site openings immediately adjacent the solder sites. The chips are then placed within the soldermask windows and electrically connected by solder joints to the solder sites of the circuit lines by a flip chip attach method. The chip sites are then encapsulated with an underfill encapsulant to protect the solder joints.

    Abstract translation: 本方法采用在载体基板上形成电路线的第一电镀抗蚀剂。 当电镀抗蚀剂仍然存在时，诸如镍的金属沉积在电路线的顶部上。 使用第二电镀抗蚀剂在焊接点上在电路线上电镀焊料。 在这个阶段，可以在每个焊点处沉积额外的焊料，以提供或补充形成焊点所需的必需的低熔点焊料。 然后剥离第一和第二抗蚀剂以及其上的焊料，并且在电路线周围蚀刻载体衬底上的铜箔。 然后在载体基板上通过芯片位置中的电路线路之外的电路线路形成焊接掩模。 焊接掩模在每个芯片位置具有单个大的开口，其具有比在芯片部分处连接的芯片的横向尺寸稍大的横向尺寸。 在包括热量的焊接掩模的固化期间，芯片位置开口内的电路线顶部的镍层快速氧化，以提供沿着紧邻焊料位置的芯片位置开口内的线的长度延伸的焊接坝。 然后将芯片放置在焊接窗口内，并通过倒装芯片连接方法通过焊接点电连接到电路线路的焊点。 然后将芯片位置用底部填充密封剂封装以保护焊点。

    Method of making electronic module with multiple solder dams in soldermask window
    10.
    发明授权
    Method of making electronic module with multiple solder dams in soldermask window 失效
    在焊接窗口中制造具有多个焊料坝的电子模块的方法

    公开(公告)号：US5798285A

    公开(公告)日：1998-08-25

    申请号：US806863

    申请日：1997-02-27

    Applicant: Mark Rudolf Bentlage ,  Kenneth Michael Fallon ,  Lawrence Harold White

    Inventor： Mark Rudolf Bentlage ,  Kenneth Michael Fallon ,  Lawrence Harold White

    IPC: H01L21/60 ,  H01L21/56 ,  H01L23/12 ,  H01L23/28 ,  H01L23/538 ,  H05K3/24 ,  H05K3/34 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50

    CPC classification number: H05K3/3452 ,  H01L23/5386 ,  H01L24/16 ,  H01L2924/01322 ,  H01L2924/14 ,  H05K2201/2081 ,  H05K2203/0315 ,  H05K3/243

    Abstract: The present method employs a first plating resist for forming circuit lines on a carrier substrate. While the plating resist is still in place a metal, such as nickel, is deposited on top of the circuit lines. A second plating resist is employed for plating solder on the circuit lines at solder sites. At this stage additional solder can be deposited at each solder site to provide or supplement the necessary low melt solder required for forming a solder joint. The first and second resists along with solder thereon are then stripped and copper foil on the carrier substrate is etched away around the circuit lines. A soldermask is then formed on the carrier substrate over the circuit lines except for circuit lines in the chip sites. The soldermask has a single large opening at each chip site which has lateral dimensions which are slightly larger than the lateral dimensions of the chip to be connected at the chip site. During curing of the soldermask, which involves heat, the nickel layer on top of the circuit lines within the chip site opening quickly oxidizes to provide solder dams which extend along the lengths of the lines within the chip site openings immediately adjacent the solder sites. The chips are then placed within the soldermask windows and electrically connected by solder joints to the solder sites of the circuit lines by a flip chip attach method. The chip sites are then encapsulated with an underfill encapsulant to protect the solder joints.

    Abstract translation: 本方法采用在载体基板上形成电路线的第一电镀抗蚀剂。 当电镀抗蚀剂仍然存在时，诸如镍的金属沉积在电路线的顶部上。 使用第二电镀抗蚀剂在焊接点上在电路线上电镀焊料。 在这个阶段，可以在每个焊点处沉积额外的焊料，以提供或补充形成焊点所需的必需的低熔点焊料。 然后剥离第一和第二抗蚀剂以及其上的焊料，并且在电路线周围蚀刻载体衬底上的铜箔。 然后在载体基板上通过芯片位置中的电路线路之外的电路线路形成焊接掩模。 焊接掩模在每个芯片位置具有单个大的开口，其具有比在芯片部分处连接的芯片的横向尺寸稍大的横向尺寸。 在包括热量的焊接掩模的固化期间，芯片位置开口内的电路线顶部的镍层快速氧化，以提供沿着紧邻焊料位置的芯片位置开口内的线的长度延伸的焊接坝。 然后将芯片放置在焊接窗口内，并通过倒装芯片连接方法通过焊接点电连接到电路线路的焊点。 然后将芯片位置用底部填充密封剂封装以保护焊点。

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