公开(公告)号：US20050205970A1

公开(公告)日：2005-09-22

申请号：US10710201

申请日：2004-06-25

申请人： Da-Jung Chen ,  Tung-Yi Yang ,  Steven Liu

发明人： Da-Jung Chen ,  Tung-Yi Yang ,  Steven Liu

IPC分类号： H01L23/15 ,  H01L23/495 ,  H01L23/498 ,  H01L23/538 ,  H01L25/16 ,  H05K1/14 ,  H05K3/34 ,  H05K3/36

CPC分类号： H01L23/49861 ,  H01L23/5385 ,  H01L24/48 ,  H01L25/162 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19107 ,  H05K1/144 ,  H05K3/341 ,  H05K3/368 ,  H05K2201/10242 ,  H05K2201/10924 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A package having a plurality of stacked substrates is provided. The package has at least two substrates. One substrate is stacked over the other to construct a three-dimensional circuit structure. Elements are disposed on the respective substrates. At least a conductive column is disposed between the two substrates. A lead-frame is connected to the substrates or the elements. The lead-frame also has a plurality of leads. The two neighboring substrates are electrically connected through the conductive column so that the average signal transmission length is shortened and the signal transmission quality is improved. Furthermore, the conductive column increases the mechanical strength of the package and reduces the degree of warping in the package so that a longer life span can be expected.

摘要翻译： 提供具有多个层叠基板的封装。 该封装具有至少两个基板。 一个衬底彼此堆叠以构造三维电路结构。 元件设置在相应的基板上。 至少一个导电柱设置在两个基板之间。 引线框架连接到基板或元件。 引线框架还具有多个引线。 两个相邻的基板通过导电柱电连接，使得平均信号传输长度缩短并且提高信号传输质量。 此外，导电柱增加了封装的机械强度并降低了封装中的翘曲程度，从而可以期待更长的寿命。

公开(公告)号：US09142426B2

公开(公告)日：2015-09-22

申请号：US13163770

申请日：2011-06-20

申请人： Bau-Ru Lu ,  Da-Jung Chen ,  Yi-Cheng Lin

发明人： Bau-Ru Lu ,  Da-Jung Chen ,  Yi-Cheng Lin

IPC分类号： H01L23/12 ,  H01L21/48 ,  H01L23/495 ,  H01L23/00

CPC分类号： H01L21/4825 ,  H01L21/4821 ,  H01L21/76877 ,  H01L23/49503 ,  H01L23/49524 ,  H01L23/49527 ,  H01L23/49534 ,  H01L23/49558 ,  H01L23/49575 ,  H01L23/49582 ,  H01L24/24 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/82 ,  H01L25/16 ,  H01L25/50 ,  H01L2224/215 ,  H01L2224/24011 ,  H01L2224/24247 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/32257 ,  H01L2224/45144 ,  H01L2224/48247 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/30107 ,  H01L2924/3011 ,  Y10T29/49123 ,  H01L2924/00012 ,  H01L2924/00

摘要： A method of forming a conductive pattern on a metallic frame for manufacturing a stack frame for electrical connections is disclosed. In one embodiment, a recess is formed in the metallic frame and a conductive element is bonded in the recess to make a stack frame for electrical connections. In another embodiment, the process can be performed on both top surface and bottom surface of metallic frame to make another stack frame for electrical connections. In yet another embodiment, a package structure and a manufacturing method of forming a conductive pattern on a lead frame for electrical connections are disclosed.

摘要翻译： 公开了一种在用于制造用于电连接的堆叠框架的金属框架上形成导电图案的方法。 在一个实施例中，在金属框架中形成凹部，并且导电元件接合在凹部中以形成用于电连接的堆叠框架。 在另一个实施例中，该过程可以在金属框架的顶表面和底表面上进行以制造用于电连接的另一个堆叠框架。 在另一个实施例中，公开了一种在用于电连接的引线框架上形成导电图案的封装结构和制造方法。

公开(公告)号：US20120313229A1

公开(公告)日：2012-12-13

申请号：US13590197

申请日：2012-08-21

申请人： Han-Hsiang Lee ,  Yi-Cheng Lin ,  Da-Jung Chen

发明人： Han-Hsiang Lee ,  Yi-Cheng Lin ,  Da-Jung Chen

IPC分类号： H01L23/495 ,  H01L21/60

CPC分类号： H01L23/49568 ,  H01L23/3107 ,  H01L23/49537 ,  H01L23/49551 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/49589 ,  H01L23/552 ,  H01L24/73 ,  H01L25/072 ,  H01L25/165 ,  H01L2224/16245 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/48247 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00012 ,  H01L2924/00

摘要： The invention discloses a package structure for better heat-dissipation or EMI performance. A first conductive element and a second conductive element are both disposed between the top lead frame and the bottom lead frame. The first terminal of the first conductive element is electrically connected to the bottom lead frame, and the second terminal of the first conductive element is electrically connected to the top lead frame. The third terminal of the second conductive element is electrically connected to the bottom lead frame, and the fourth terminal of the second conductive element is electrically connected to the top lead frame. In one embodiment, a heat dissipation device is disposed on the top lead frame. In one embodiment, the molding compound is provided such that the outer leads of the top lead frame are exposed outside the molding compound.

摘要翻译： 本发明公开了一种用于更好散热或EMI性能的封装结构。 第一导电元件和第二导电元件都设置在顶部引线框架和底部引线框架之间。 第一导电元件的第一端子电连接到底部引线框架，并且第一导电元件的第二端子电连接到顶部引线框架。 第二导电元件的第三端子电连接到底部引线框架，并且第二导电元件的第四端子电连接到顶部引线框架。 在一个实施例中，散热装置设置在顶部引线框架上。 在一个实施方案中，模塑料被设置成使得顶部引线框架的外部引线暴露在模塑料外部。

公开(公告)号：US08269330B1

公开(公告)日：2012-09-18

申请号：US13092163

申请日：2011-04-22

申请人： Han-Hsiang Lee ,  Yi-Cheng Lin ,  Da-Jung Chen

发明人： Han-Hsiang Lee ,  Yi-Cheng Lin ,  Da-Jung Chen

IPC分类号： H01L23/02

CPC分类号： H01L23/3107 ,  H01L23/4951 ,  H01L23/49562 ,  H01L23/49589 ,  H01L2224/0401 ,  H01L2224/06181 ,  H01L2224/16245 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/19041 ,  H01L2924/19106 ,  H01L2924/00

摘要： A MOSFET pair with a stack capacitor is disclosed herein. It can regulate the input voltage and optimize a short EMI loop. It has a bottom lead frame and an up lead frame, which can simultaneously dissipate the heat generated by two MOSFETs to achieve excellent thermal-dissipation. It can adopt solder, Ag epoxy, or gold balls to implement the electrical bonding of two MOSFETs with the bottom lead frame and the up lead frame to achieve excellent structural flexibility. A device, such as an IGBT, a diode, an inductor, a choke, and a heat sink, can be stacked above the up lead frame to form a powerful SiP module. A corresponding method of manufacturing the MOSFET pair with a stack capacitor is also disclosed herein, which is simple, time-saving, flexible, cost-effective, and facile.

摘要翻译： 本文公开了具有堆叠电容器的MOSFET对。 它可以调节输入电压并优化短路电流环路。 它具有底部引线框架和引脚框架，可以同时消散两个MOSFET产生的热量，从而实现出色的散热。 它可以采用焊料，Ag环氧树脂或金球，以实现两个MOSFET与底部引线框架和上引线框架的电连接，以实现优异的结构灵活性。 诸如IGBT，二极管，电感器，扼流器和散热器的器件可以堆叠在引导框架上方以形成强大的SiP模块。 本文还公开了制造具有堆叠电容器的MOSFET对的相应方法，其简单，省时，灵活，成本有效且容易。

公开(公告)号：US20100117216A1

公开(公告)日：2010-05-13

申请号：US12540021

申请日：2009-08-12

申请人： BAU-RU LU ,  Chau-Chun Wen ,  Da-Jung Chen ,  Chun-Hsien Lu

发明人： BAU-RU LU ,  Chau-Chun Wen ,  Da-Jung Chen ,  Chun-Hsien Lu

IPC分类号： H01L23/48

CPC分类号： H01L23/49811 ,  H01L23/36 ,  H01L23/3735 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49 ,  H01L2224/73265 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A chip package structure including a substrate, at least one chip, a heat dissipation device, at least one first conductive bar, a molding compound, and at least one second conductive bar is provided. The chip and the heat dissipation device are respectively disposed on a first and a second surface of the substrate. The first conductive bar has two opposite end surfaces, wherein one end surface is disposed on the first surface of the substrate, the other end surface is extended away from the substrate, and a fastening slot is disposed between the two end surfaces and passes through the other end surface. The molding compound encapsulates the substrate, the chip, part of the heat dissipation device, and the first conductive bar. The second conductive bar is disposed on one surface of the molding compound and has a protrusion portion fastened to the fastening slot of the first conductive bar.

摘要翻译： 提供一种芯片封装结构，包括基板，至少一个芯片，散热装置，至少一个第一导电棒，模塑料和至少一个第二导电棒。 芯片和散热装置分别设置在基板的第一和第二表面上。 第一导电棒具有两个相对的端面，其中一个端面设置在基板的第一表面上，另一端表面远离基板延伸，并且紧固槽设置在两个端面之间并穿过 另一端面。 模塑料封装基板，芯片，散热装置的一部分和第一导电棒。 第二导电棒设置在模制化合物的一个表面上，并且具有紧固到第一导电棒的紧固槽的突起部分。

公开(公告)号：US06975513B2

公开(公告)日：2005-12-13

申请号：US10437183

申请日：2003-05-14

申请人： Da-Jung Chen ,  Chin-Hsiung Liao

发明人： Da-Jung Chen ,  Chin-Hsiung Liao

IPC分类号： H01L23/373 ,  H01L23/433 ,  H01L23/495 ,  H05K7/20

CPC分类号： H01L23/3735 ,  H01L23/4334 ,  H01L23/49575 ,  H01L24/48 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A high-density power module package wherein the circuits and a part of chips of the power module are formed on respective substrates such that the circuit patterns are not influenced by the chips. Accordingly, the density of the circuit can be improved so as to save the required area of substrate and production cost.

摘要翻译： 一种高密度功率模块封装，其中电路和功率模块的芯片的一部分形成在各个基板上，使得电路图案不受芯片的影响。 因此，可以提高电路的密度，以节省基板所需的面积和生产成本。

公开(公告)号：US09000576B2

公开(公告)日：2015-04-07

申请号：US13590197

申请日：2012-08-21

申请人： Han-Hsiang Lee ,  Yi-Cheng Lin ,  Da-Jung Chen

发明人： Han-Hsiang Lee ,  Yi-Cheng Lin ,  Da-Jung Chen

IPC分类号： H01L23/02 ,  H01L23/31 ,  H01L23/495

CPC分类号： H01L23/49568 ,  H01L23/3107 ,  H01L23/49537 ,  H01L23/49551 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/49589 ,  H01L23/552 ,  H01L24/73 ,  H01L25/072 ,  H01L25/165 ,  H01L2224/16245 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/48247 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00012 ,  H01L2924/00

摘要： The invention discloses a package structure for better heat-dissipation or EMI performance. A first conductive element and a second conductive element are both disposed between the top lead frame and the bottom lead frame. The first terminal of the first conductive element is electrically connected to the bottom lead frame, and the second terminal of the first conductive element is electrically connected to the top lead frame. The third terminal of the second conductive element is electrically connected to the bottom lead frame, and the fourth terminal of the second conductive element is electrically connected to the top lead frame. In one embodiment, a heat dissipation device is disposed on the top lead frame. In one embodiment, the molding compound is provided such that the outer leads of the top lead frame are exposed outside the molding compound.

摘要翻译： 本发明公开了一种用于更好散热或EMI性能的封装结构。 第一导电元件和第二导电元件都设置在顶部引线框架和底部引线框架之间。 第一导电元件的第一端子电连接到底部引线框架，并且第一导电元件的第二端子电连接到顶部引线框架。 第二导电元件的第三端子电连接到底部引线框架，并且第二导电元件的第四端子电连接到顶部引线框架。 在一个实施例中，散热装置设置在顶部引线框架上。 在一个实施方案中，模塑料被设置成使得顶部引线框架的外部引线暴露在模塑料外部。

公开(公告)号：US20120069529A1

公开(公告)日：2012-03-22

申请号：US13180292

申请日：2011-07-11

申请人： Da-Jung Chen ,  Kaipeng Chiang ,  Yu-Chao Fang ,  Yi-Cheng Lin

发明人： Da-Jung Chen ,  Kaipeng Chiang ,  Yu-Chao Fang ,  Yi-Cheng Lin

IPC分类号： H05K7/00

CPC分类号： H01L23/645 ,  H01L23/552 ,  H01L24/16 ,  H01L24/48 ,  H01L25/072 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/1904 ,  H01L2924/19042 ,  H01L2924/19102 ,  H01L2924/19105 ,  H01L2924/3025 ,  H02M3/155 ,  H02M7/003 ,  H01L2924/00 ,  H01L2224/0401 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A power conversion module includes a circuit carrier board, a semiconductor module and an inductor module. The circuit carrier board has plural bonding pads. The semiconductor module is disposed on a first surface of the circuit carrier board. The inductor module has plural pins. The pins are extended from the inductor module along a first direction and connected with corresponding bonding pads on the circuit carrier board, so that a receptacle is defined between the inductor module and the circuit carrier board for accommodating the semiconductor module.

摘要翻译： 电力转换模块包括电路载板，半导体模块和电感模块。 电路载板具有多个接合焊盘。 半导体模块设置在电路承载板的第一表面上。 电感器模块具有多个引脚。 引脚沿着第一方向从电感器模块延伸并与电路载体板上的对应焊盘连接，使得在电感器模块和电路载体板之间限定容纳半导体模块的插座。

公开(公告)号：US20050093121A1

公开(公告)日：2005-05-05

申请号：US10707865

申请日：2004-01-20

申请人： Da-Jung Chen ,  Che-Hung Lin ,  Chin-Hsiung Liao ,  Cheng-Chieh Hsu

发明人： Da-Jung Chen ,  Che-Hung Lin ,  Chin-Hsiung Liao ,  Cheng-Chieh Hsu

IPC分类号： H01L23/433 ,  H01L23/495 ,  H01L23/52

CPC分类号： H01L23/4334 ,  H01L23/49575 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A chip package comprising a substrate, a lead frame, a chip, a set of bonded wires, a heat sink and a packaging material is provided. The substrate has a first metallic layer, a second metallic layer and a conductor. The first metallic layer is formed on a first surface of the substrate and the second metallic layer is formed on a second surface of the substrate. The conductor is formed on a lateral surface of the substrate. The first metallic layer is electrically connected to the second metallic layer through the conductor. The lead frame is attached on the first surface of the substrate and is electrically connected to the first metallic layer. The chip has a back surface attached to the lead frame or the first surface of the substrate. The chip is connected with the lead frame through the bonding wires. The heat sink is attached on the second surface of the substrate and electrically connected with the second metallic layer. The packaging material encapsulates the chip, the bonded wires and the lead frame.

摘要翻译： 提供了包括基板，引线框架，芯片，一组接合线，散热器和封装材料的芯片封装。 基板具有第一金属层，第二金属层和导体。 第一金属层形成在基板的第一表面上，第二金属层形成在基板的第二表面上。 导体形成在基板的侧表面上。 第一金属层通过导体与第二金属层电连接。 引线框架安装在基板的第一表面上并与第一金属层电连接。 芯片具有附接到引线框架或基板的第一表面的后表面。 芯片通过接合线与引线框架连接。 散热器安装在基板的第二表面上并与第二金属层电连接。 封装材料封装芯片，接合线和引线框架。

公开(公告)号：US09171818B2

公开(公告)日：2015-10-27

申请号：US13323843

申请日：2011-12-13

申请人： Da-Jung Chen ,  Wen-Hsiung Liao ,  Chun-Fu Hu

发明人： Da-Jung Chen ,  Wen-Hsiung Liao ,  Chun-Fu Hu

IPC分类号： H05K1/16 ,  H01L23/00 ,  H01L23/498 ,  H01L23/31

CPC分类号： H01L24/32 ,  H01L23/3121 ,  H01L23/498 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/0556 ,  H01L2224/06181 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/16245 ,  H01L2224/16505 ,  H01L2224/16507 ,  H01L2224/2902 ,  H01L2224/29034 ,  H01L2224/29111 ,  H01L2224/29116 ,  H01L2224/29118 ,  H01L2224/29139 ,  H01L2224/30181 ,  H01L2224/32225 ,  H01L2224/32505 ,  H01L2224/32507 ,  H01L2224/81815 ,  H01L2224/8192 ,  H01L2224/83411 ,  H01L2224/83416 ,  H01L2224/83418 ,  H01L2224/83439 ,  H01L2224/83815 ,  H01L2224/8392 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  Y10T29/49155 ,  H01L2924/00012 ,  H01L2924/01029 ,  H01L2924/00 ,  H01L2224/05552

摘要： The invention discloses a package structure with an overlaying metallic material overlaying a solder material. A substrate comprises a first solder pad and a second solder pad thereon. A conductive element on the substrate comprises a first electrode and a second electrode thereon. A solder material electrically connects the first solder pad and the second solder pad to the first electrode and the second electrode respectively. An overlaying metallic material overlays the exposed areas of the solder metallic material, the first solder pad, the second solder pad, the first electrode and the second electrode, wherein the exposed areas comprise metallic material having a lower melting point than the second metallic material.

摘要翻译： 本发明公开了一种具有覆盖焊料材料的覆盖金属材料的封装结构。 衬底包括第一焊盘和其上的第二焊垫。 衬底上的导电元件包括​​第一电极和第二电极。 焊料材料将第一焊盘和第二焊盘分别电连接到第一电极和第二电极。 覆盖金属材料覆盖焊料金属材料，第一焊盘，第二焊盘，第一电极和第二电极的暴露区域，其中暴露区域包括具有比第二金属材料低的熔点的金属材料。