公开(公告)号：US20220189780A1

公开(公告)日：2022-06-16

申请号：US17123264

申请日：2020-12-16

Applicant: Semiconductor Components Industries, LLC

Inventor： Petr KOSTELNIK ,  Tomas NOVAK ,  Peter COPPENS ,  Peter MOENS ,  Abhishek BANERJEE

IPC: H01L21/285 ,  H01L29/20 ,  H01L29/205 ,  H01L29/47 ,  H01L29/778 ,  H01L21/02 ,  H01L21/3215 ,  H01L29/66

Abstract: A process to form a HEMT can have a gate electrode layer that initially has a plurality of spaced-apart doped regions. In an embodiment, any of the spaced-apart doped regions can be formed by depositing or implanting p-type dopant atoms. After patterning, the gate electrode can include an n-type doped region over the p-type doped region. In another embodiment a barrier layer can underlie the gate electrode and include a lower film with a higher Al content and thinner than an upper film. In a further embodiment, a silicon nitride layer can be formed over the gate electrode layer and can help to provide Si atoms for the n-type doped region and increase a Mg:H ratio within the gate electrode. The HEMT can have good turn-on characteristics, low gate leakage when in the on-state, and better time-dependent breakdown as compared to a conventional HEMT.

公开(公告)号：US20220181462A1

公开(公告)日：2022-06-09

申请号：US17247212

申请日：2020-12-03

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Jeffrey Peter GAMBINO ,  Kevin Alexander STEWART ,  Peter MOENS ,  David T. PRICE ,  Derryl ALLMAN

IPC: H01L29/49 ,  H01L29/24 ,  H01L29/08 ,  H01L29/417 ,  H01L29/78 ,  H01L29/06 ,  H01L29/423 ,  H01L29/786 ,  H01L29/66

Abstract: In a general aspect, a transistor can include a fin having a proximal end and a distal end. The fin can include a dielectric portion longitudinally extending between the proximal end and the distal end, and a semiconductor layer disposed on the dielectric portion. The semiconductor layer can longitudinally extend between the proximal end and the distal end. The transistor can further include a source region disposed at the proximal end of the fin, and a drain region disposed at the distal end of the fin. The transistor can also include a gate dielectric layer disposed on a channel region of the semiconductor layer. The channel region can be disposed between the gate dielectric layer and the dielectric portion. The channel region can be longitudinally disposed between the source region and the drain region. The transistor can further include a conductive gate electrode disposed on the gate dielectric layer.

公开(公告)号：US20200105916A1

公开(公告)日：2020-04-02

申请号：US16148127

申请日：2018-10-01

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Peter MOENS ,  Aurore CONSTANT ,  Peter COPPENS ,  Abhishek BANERJEE

IPC: H01L29/778 ,  H01L29/417 ,  H01L29/20 ,  H01L29/205 ,  H01L29/66 ,  H01L21/02 ,  H01L29/10

Abstract: An electronic device can include a channel layer, a first carrier supply layer, a gate electrode of a HEMT, and a drain electrode of the HEMT. The HEMT can have a 2DEG along an interface between the channel and first carrier supply layers. In an aspect, the 2DEG can have a highest density that is the highest at a point between the drain and gate electrodes. In another aspect, the HEMT can further comprise first and second carrier supply layers, wherein the first carrier supply layer is disposed between the channel and second carrier supply layers. The second carrier supply layer be thicker at a location between the drain and gate electrodes. In a further aspect, a process of forming an electronic device can include the HEMT. In a particular embodiment, first and second carrier supply layers can be epitaxially grown from an underlying layer.

公开(公告)号：US20200044067A1

公开(公告)日：2020-02-06

申请号：US16052041

申请日：2018-08-01

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Abhishek BANERJEE ,  Piet VANMEERBEEK ,  Peter MOENS

IPC: H01L29/778 ,  H01L29/20 ,  H01L29/205 ,  H01L29/51 ,  H01L29/49 ,  H01L29/423 ,  H01L29/66 ,  H01L21/02 ,  H01L29/36 ,  H01L29/10 ,  H01L21/306 ,  H01L21/28

Abstract: An electronic device can include a channel layer including AlzGa(1-z)N, where 0≤z≤0.1; a gate dielectric layer; and a gate electrode of a high electron mobility transistor (HEMT). The gate dielectric layer can be disposed between the channel layer and the gate electrode. The gate electrode includes a gate electrode film that contacts the gate dielectric layer, wherein the gate electrode film can include a material, wherein the material has a sum of an electron affinity and a bandgap energy of at least 6 eV. In some embodiments, the material can include a p-type semiconductor material. The particular material for the gate electrode film can be selected to achieve a desired threshold voltage for an enhancement-mode HEMT. In another embodiment, a portion of the barrier layer can be left intact under the gate structure. Such a configuration can improve carrier mobility and reduce Rdson.

公开(公告)号：US20180033877A1

公开(公告)日：2018-02-01

申请号：US15730897

申请日：2017-10-12

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Peter MOENS ,  Balaji PADMANABHAN ,  Herbert DE VLEESCHOUWER ,  Prasad VENKATRAMAN

IPC: H01L29/747 ,  H01L23/495 ,  H01L23/00 ,  H01L25/11 ,  H01L29/205 ,  H01L29/74 ,  H03K17/687 ,  H01L29/778 ,  H01L29/423 ,  H01L29/40 ,  H01L21/8258 ,  H01L27/06 ,  H01L27/088

CPC classification number: H01L29/747 ,  H01L21/8258 ,  H01L23/4952 ,  H01L23/49524 ,  H01L23/49541 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/40 ,  H01L25/115 ,  H01L25/18 ,  H01L27/0629 ,  H01L27/088 ,  H01L27/0883 ,  H01L29/205 ,  H01L29/404 ,  H01L29/4238 ,  H01L29/7416 ,  H01L29/742 ,  H01L29/7786 ,  H01L29/7787 ,  H01L2224/0603 ,  H01L2224/40245 ,  H01L2224/48247 ,  H01L2224/49113 ,  H01L2224/73221 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2924/00014 ,  H03K17/6874 ,  H03K2017/6878 ,  H03K2217/0009 ,  H03K2217/0018 ,  H01L2224/37099

Abstract: An electronic device can include a bidirectional HEMT. In an aspect, the electronic device can include a pair of switch gate and blocking gate electrodes, wherein the switch gate electrodes are not electrically connected to the blocking gate electrodes, and the first blocking, first switch, second blocking, and second switch gate electrodes are on the same die. In another aspect, the electronic device can include shielding structures having different numbers of laterally extending portions. In a further aspect, the electronic device can include a gate electrode and a shielding structure, wherein a portion of the shielding structure defines an opening overlying the gate electrode.

公开(公告)号：US20170033176A1

公开(公告)日：2017-02-02

申请号：US15289340

申请日：2016-10-10

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Jaume ROIG-GUITART ,  Peter MOENS ,  Zia HOSSAIN

IPC: H01L29/06 ,  H01L21/761

CPC classification number: H01L29/0623 ,  H01L21/761 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/0634 ,  H01L29/0688 ,  H01L29/0692 ,  H01L29/402 ,  H01L29/7395 ,  H01L29/74 ,  H01L29/872

Abstract: At least one embodiment is directed to a semiconductor edge termination structure, where the edge termination structure comprises several doped layers and a buffer layer.

Abstract translation: 至少一个实施例涉及半导体边缘终端结构，其中边缘终端结构包括多个掺杂层和缓冲层。

公开(公告)号：US20160322969A1

公开(公告)日：2016-11-03

申请号：US15133644

申请日：2016-04-20

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Balaji PADMANABHAN ,  Prasad VENKATRAMAN ,  Peter MOENS ,  Mihir MUDHOLKAR ,  Joe FULTON ,  Philip CELAYA ,  Stephen ST. GERMAIN ,  Chun-Li LIU ,  Jason MCDONALD ,  Alexander YOUNG ,  Ali SALIH

IPC: H03K17/687 ,  H01L25/11 ,  H01L29/778

CPC classification number: H01L29/747 ,  H01L21/8258 ,  H01L23/4952 ,  H01L23/49524 ,  H01L23/49541 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/40 ,  H01L25/115 ,  H01L25/18 ,  H01L27/0629 ,  H01L27/088 ,  H01L27/0883 ,  H01L29/205 ,  H01L29/404 ,  H01L29/4238 ,  H01L29/7416 ,  H01L29/742 ,  H01L29/7786 ,  H01L29/7787 ,  H01L2224/0603 ,  H01L2224/40245 ,  H01L2224/48247 ,  H01L2224/49113 ,  H01L2224/73221 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2924/00014 ,  H03K17/6874 ,  H03K2017/6878 ,  H03K2217/0009 ,  H03K2217/0018 ,  H01L2224/37099

Abstract: A half-bridge circuit can include a high-side HEMT, a high-side switch transistor, a low-side HEMT, and a low-side switch transistor. The die substrates of the HEMTs can be coupled to the sources of their corresponding switch transistors. In another aspect, a packaged electronic device for a half-bridge circuit can have a design that can use shorter connectors that help to reduce parasitic inductance and resistance. In a further aspect, a packaged electronic device for a half-bridge circuit can include more than one connection along the bottom of the package allows less lead connections along the periphery of the packaged electronic device and can allow for a smaller package.

Abstract translation: 半桥电路可以包括高侧HEMT，高侧开关晶体管，低侧HEMT和低侧开关晶体管。 HEMT的管芯衬底可以耦合到其相应的开关晶体管的源极。 在另一方面，用于半桥电路的封装电子器件可以具有可以使用有助于减小寄生电感和电阻的较短连接器的设计。 在另一方面，用于半桥电路的封装电子设备可以包括沿着封装底部的多于一个的连接允许沿着封装的电子器件的周边的较少的引线连接并且可以允许较小的封装。

公开(公告)号：US20160322351A1

公开(公告)日：2016-11-03

申请号：US15133679

申请日：2016-04-20

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Peter MOENS ,  Balaji PADMANABHAN ,  Herbert DE VLEESCHOUWER ,  Prasad VENKATRAMAN

IPC: H01L27/088 ,  H01L29/423 ,  H01L29/40 ,  H01L29/778 ,  H01L29/20 ,  H01L29/205

CPC classification number: H01L29/747 ,  H01L21/8258 ,  H01L23/4952 ,  H01L23/49524 ,  H01L23/49541 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/40 ,  H01L25/115 ,  H01L25/18 ,  H01L27/0629 ,  H01L27/088 ,  H01L27/0883 ,  H01L29/205 ,  H01L29/404 ,  H01L29/4238 ,  H01L29/7416 ,  H01L29/742 ,  H01L29/7786 ,  H01L29/7787 ,  H01L2224/0603 ,  H01L2224/40245 ,  H01L2224/48247 ,  H01L2224/49113 ,  H01L2224/73221 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2924/00014 ,  H03K17/6874 ,  H03K2017/6878 ,  H03K2217/0009 ,  H03K2217/0018 ,  H01L2224/37099

Abstract: An electronic device can include a bidirectional HEMT. In an aspect, the electronic device can include a pair of switch gate and blocking gate electrodes, wherein the switch gate electrodes are not electrically connected to the blocking gate electrodes, and the first blocking, first switch, second blocking, and second switch gate electrodes are on the same die. In another aspect, the electronic device can include shielding structures having different numbers of laterally extending portions. In a further aspect, the electronic device can include a gate electrode and a shielding structure, wherein a portion of the shielding structure defines an opening overlying the gate electrode.

Abstract translation: 电子设备可以包括双向HEMT。 一方面，电子设备可以包括一对开关栅极和阻挡栅电极，其中开关栅极电极不与阻挡栅电极电连接，并且第一阻塞，第一开关，第二阻断和第二开关栅电极 在同一个死亡。 在另一方面，电子设备可以包括具有不同数量的横向延伸部分的屏蔽结构。 在另一方面，电子设备可以包括栅电极和屏蔽结构，其中屏蔽结构的一部分限定了覆盖栅电极的开口。

公开(公告)号：US20160276250A1

公开(公告)日：2016-09-22

申请号：US15166065

申请日：2016-05-26

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Stephen ST. GERMAIN ,  Roger ARBUTHNOT ,  Peter MOENS

IPC: H01L23/495 ,  H01L21/56 ,  H01L21/78 ,  H01L21/48 ,  H01L23/31 ,  H01L29/20

CPC classification number: H01L23/49524 ,  H01L21/4825 ,  H01L21/561 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/482 ,  H01L23/4824 ,  H01L23/49562 ,  H01L24/16 ,  H01L24/83 ,  H01L29/0696 ,  H01L29/2003 ,  H01L29/41758 ,  H01L29/78 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16245 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2924/014

Abstract: A semiconductor package. Implementations may include a lateral device that may include a lateral semiconductor device including one of interspersed and interdigitated source and drain regions and one or more gate regions, a single layer clip, and a leadframe. The single layer clip may be coupled to the one of interspersed and interdigitated source and drain regions and the one or more gate regions and to the leadframe. The single layer clip may be configured to redistribute and to isolate source, drain, and gate signals passing into and out from the lateral semiconductor device during operation of the semiconductor device package.

Abstract translation: 半导体封装。 实施方案可以包括横向设备，其可以包括横向半导体器件，其包括散在和交叉的源极和漏极区域之一以及一个或多个栅极区域，单层夹子和引线框架。 单层夹可以耦合到散在和交叉的源极和漏极区域以及一个或多个栅极区域和引线框架中的一个。 单层夹可以被配置为在半导体器件封装的操作期间重新分布并隔离通过和流出半导体器件的源极，漏极和栅极信号。

公开(公告)号：US20160087033A1

公开(公告)日：2016-03-24

申请号：US14930060

申请日：2015-11-02

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Jaume ROIG GUITART ,  Peter MOENS ,  Piet VANMEERBEEK

IPC: H01L29/06 ,  H01L29/10 ,  H01L29/66

CPC classification number: H01L29/7802 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/0646 ,  H01L29/0649 ,  H01L29/0873 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/41766 ,  H01L29/66477 ,  H01L29/66712 ,  H01L29/66734 ,  H01L29/7397 ,  H01L29/78 ,  H01L29/7813 ,  H01L29/7827

Abstract: In one embodiment, a semiconductor device has a superjunction structure formed adjoining a low-doped n-type region. A low-doped p-type region is formed adjoining the superjunction structure above the low-doped n-type region and is configured to improve Eas characteristics. A body region is formed adjacent the low-doped p-type region and a control electrode structure is formed adjacent the body region for controlling a channel region within the body region.

Abstract translation: 在一个实施例中，半导体器件具有邻接低掺杂n型区域形成的超结构结构。 在低掺杂n型区域之上形成邻接超结构结构的低掺杂p型区域，并且被配置为改善Eas特性。 在低掺杂p型区域附近形成体区，并且在身体区域附近形成控制电极结构，以控制体区内的通道区域。