公开(公告)号：US20070076392A1

公开(公告)日：2007-04-05

申请号：US11513034

申请日：2006-08-31

Applicant: Kazuhiro Urashima ,  Shinji Yuri ,  Manabu Sato ,  Kohki Ogawa

Inventor： Kazuhiro Urashima ,  Shinji Yuri ,  Manabu Sato ,  Kohki Ogawa

IPC: H05K1/18

CPC classification number: H05K1/185 ,  H01G2/06 ,  H01G4/40 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/49822 ,  H01L23/49838 ,  H01L24/81 ,  H01L2221/68345 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/81192 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01056 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/351 ,  H05K1/0233 ,  H05K1/0234 ,  H05K3/4602 ,  H05K2201/10045 ,  H05K2201/10674 ,  H05K2201/10712 ,  H01L2924/00 ,  H01L2224/05599

Abstract: A wiring board comprising: a board core (11) having a core main surface (12) and a core reverse surface (13); a capacitor (101, 101A, 101B, 101C, 101D, 101E, 101F, 101G, 101H, 101J, 1101, 1101′, 1101″, 1101′″, 1101″″, 1101′″″) having a capacitor main surface (102) and a capacitor reverse surface (103) and having a structure in which first inner electrode layers (141) and second inner electrode layers (142) are alternately laminated and arranged via a dielectric layer (105), the capacitor (101, 101A, 101B, 101C, 101D, 101E, 101F, 101G, 101H, 101J, 1101, 1101′, 1101″, 1101′″, 1101″″, 1101′″″) being accommodated in the board core (11) in a state in which the core main surface (12) and the capacitor main surface (102) are oriented on a same side; and a wiring laminated portion (31) having a structure in which interlayer insulating layers (33, 35) and conductor layers (42) are alternately laminated on the core main surface (12) and the capacitor main surface (102), wherein an inductor (251, 252, 253) or a resistor (301, 302, 311, 312, 321, 322) is formed on or in the capacitor (101, 101A, 101B, 101C, 101D, 101E, 101F, 101G, 101H, 101J, 1101, 1101′, 1101″, 1101′″, 1101″″, 1101′″″).

Abstract translation: 一种布线板，包括：具有芯主表面（12）和芯反向表面（13）的板芯（11）; 一个电容器（101,101A，101B，101C，101D，101E，101F，101G，101H，101J，1101,1101'，1101“，1101”'，1101“ 具有电容器主表面（102）和电容器反面（103）的第一内电极层（141）和第二内电极层（142）交替层叠的结构的电容器（1101“'），1101” 电容器（101,101A，101B，101C，101D，101E，101F，101G，101H，101J，1101,1101），1101“，经由电介质层（105） 1101“，1101”“，1101”“”）以芯主表面（12）和电容器主表面（102）取向为的状态容纳在板芯（11）中 同一边 以及具有层间绝缘层（33,35）和导体层（42）交替层叠在芯主表面（12）和电容器主表面（102）上的结构的布线层叠部分（31），其中电感器 （101,21A，101B，101C，101D，101E，101F）上形成有电阻（251,252,253）或电阻器（301,302,311,312,321,322） ，101G，101H，101J，1101,1101'，1101“，1101”'，1101“'，1101”''）。

公开(公告)号：US20060283547A1

公开(公告)日：2006-12-21

申请号：US11447018

申请日：2006-06-06

Applicant: Shinji Yuri ,  Masaki Muramatsu

Inventor： Shinji Yuri ,  Masaki Muramatsu

IPC: B32B3/00 ,  B32B18/00

CPC classification number: H05K1/185 ,  H01L21/4857 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/50 ,  H01L2221/68309 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05147 ,  H01L2224/05548 ,  H01L2224/05647 ,  H01L2224/16 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15311 ,  H05K1/0231 ,  H05K1/112 ,  H05K3/4602 ,  H05K2201/096 ,  H05K2201/10712 ,  Y10T428/24917 ,  Y10T428/24926 ,  H01L2924/00014

Abstract: A wiring board includes a plurality of via pads disposed on a ceramic sub-core accommodated in a core board. A Cu-plated layer is formed on the surface of a conductor pad and serves as a processed face, i.e., a face to which Cu surface chemical processing is applied in order to improve the adhesion between the surface of the Cu-plated layer and that of an adjacent polymer material. The lowermost dielectric layer of a laminated wiring portion, and a via conductor formed in the dielectric layer, are in electrical contact with the processed face.

公开(公告)号：US20180343739A1

公开(公告)日：2018-11-29

申请号：US15957246

申请日：2018-04-19

Applicant: REALTEK SEMICONDUCTOR CORP.

Inventor： CHAO-MIN LAI ,  SHOU-TE YEN

IPC: H05K1/11 ,  H05K1/14

CPC classification number: H05K1/115 ,  H05K1/0243 ,  H05K1/0248 ,  H05K1/113 ,  H05K1/114 ,  H05K1/144 ,  H05K1/181 ,  H05K3/3436 ,  H05K2201/09481 ,  H05K2201/10159 ,  H05K2201/10166 ,  H05K2201/10545 ,  H05K2201/10712 ,  H05K2201/10734

Abstract: An electronic apparatus and a circuit board thereof are provided. The electronic apparatus operates in cooperation with a packaged electronic component. The electronic apparatus includes a circuit board and a control device disposed on the circuit board. The circuit board includes a plurality of conductive vias passing therethrough, and the conductive vias includes a plurality of first conductive vias arranged respectively corresponding to the first contact pads of the packaged electronic component. The control device includes a signal contact array including a plurality of first signal contacts. When the packaged electronic component and the control device are respectively disposed on two opposite sides of the circuit board, the packaged electronic component and the control device at least partially overlap in a thickness direction of the circuit board, and the first signal contacts are respectively electrically connected to the first contact pads via the corresponding conductive vias.

公开(公告)号：US09167702B2

公开(公告)日：2015-10-20

申请号：US13626477

申请日：2012-09-25

Applicant: NGK SPARK PLUG CO., LTD.

Inventor： Kenji Suzuki

IPC: H05K3/30 ,  H05K1/18 ,  H05K3/46 ,  H05K3/00 ,  H05K1/02

CPC classification number: H05K3/306 ,  H01L2224/16225 ,  H01L2924/1461 ,  H01L2924/1531 ,  H05K1/0218 ,  H05K1/0222 ,  H05K1/185 ,  H05K3/0094 ,  H05K3/4602 ,  H05K2201/0187 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/09981 ,  H05K2201/10712 ,  H05K2203/1394 ,  Y10T29/49133 ,  Y10T29/49135 ,  H01L2924/00

Abstract: A method of manufacturing a component-built-in wiring substrate which exhibits excellent reliability, through improvement of adhesion between a resin filler and a core substrate, is provided. In some embodiments the method comprises a core substrate preparation step for preparing a core substrate, an accommodation-hole forming step for forming an accommodation hole in the core substrate, and a through-hole forming step for forming through-holes. In a plating-layer forming step, a plating layer is formed on an inner wall surface of the accommodation hole and plating layers are formed on the inner wall surfaces of the through-holes, which become through-hole conductors each having a hollow. In an accommodation step, a component is accommodated in the accommodation hole. In a resin charging step, a resin filler is filled into a gap between component side-surfaces and the inner wall surface of the accommodation hole and into the hollows.

Abstract translation: 提供了通过提高树脂填充剂和芯基板之间的粘附性而制造具有优异可靠性的组件内置布线基板的方法。 在一些实施例中，该方法包括用于制备芯基板的芯基板准备步骤，用于在芯基板中形成收纳孔的容纳孔形成步骤和用于形成通孔的通孔形成步骤。 在电镀层形成工序中，在容纳孔的内壁面上形成镀层，在形成有中空部的通孔导体的贯通孔的内壁面上形成镀覆层。 在调节步骤中，部件容纳在容纳孔中。 在树脂填充工序中，将树脂填料填充到部件侧面与容纳孔的内壁面之间的间隙中，并填充到中空部内。

公开(公告)号：US20150181722A1

公开(公告)日：2015-06-25

申请号：US14637655

申请日：2015-03-04

Applicant: NGK SPARK PLUG CO., LTD.

Inventor： Kenji SUZUKI

IPC: H05K3/30 ,  H05K3/00

CPC classification number: H05K3/306 ,  H01L2224/16225 ,  H01L2924/1461 ,  H01L2924/1531 ,  H05K1/0218 ,  H05K1/0222 ,  H05K1/185 ,  H05K3/0094 ,  H05K3/4602 ,  H05K2201/0187 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/09981 ,  H05K2201/10712 ,  H05K2203/1394 ,  Y10T29/49133 ,  Y10T29/49135 ,  H01L2924/00

Abstract: A method of manufacturing a component-built-in wiring substrate which exhibits excellent reliability, through improvement of adhesion between a resin filler and a core substrate, is provided. In some embodiments the method comprises a core substrate preparation step for preparing a core substrate, an accommodation-hole forming step for forming an accommodation hole in the core substrate, and a through-hole forming step for forming through-holes. In a plating-layer forming step, a plating layer is formed on an inner wall surface of the accommodation hole and plating layers are formed on the inner wall surfaces of the through-holes, which become through-hole conductors each having a hollow. In an accommodation step, a component is accommodated in the accommodation hole. In a resin charging step, a resin filler is filled into a gap between component side-surfaces and the inner wall surface of the accommodation hole and into the hollows.

Abstract translation: 提供了通过提高树脂填充剂和芯基板之间的粘附性而制造具有优异可靠性的组件内置布线基板的方法。 在一些实施例中，该方法包括用于制备芯基板的芯基板准备步骤，用于在芯基板中形成收纳孔的容纳孔形成步骤和用于形成通孔的通孔形成步骤。 在电镀层形成工序中，在容纳孔的内壁面上形成镀层，在形成有中空部的通孔导体的贯通孔的内壁面上形成镀覆层。 在调节步骤中，部件容纳在容纳孔中。 在树脂填充工序中，将树脂填料填充到部件侧面与容纳孔的内壁面之间的间隙中，并填充到中空部内。

公开(公告)号：US08863378B2

公开(公告)日：2014-10-21

申请号：US12706695

申请日：2010-02-16

Applicant: Masaki Muramatsu ,  Shinji Yuri ,  Makoto Origuchi ,  Kazuhiro Urashima

Inventor： Masaki Muramatsu ,  Shinji Yuri ,  Makoto Origuchi ,  Kazuhiro Urashima

IPC: H01K3/10 ,  H01L23/50 ,  H05K1/02 ,  H01L23/00 ,  H05K1/18 ,  H01L21/48 ,  H01L21/56 ,  H01L21/683 ,  H01L23/498 ,  H05K1/11 ,  H05K1/16 ,  H05K1/14 ,  H05K3/46

CPC classification number: H01L21/6835 ,  H01L21/4857 ,  H01L21/568 ,  H01L23/49822 ,  H01L23/50 ,  H01L24/81 ,  H01L24/97 ,  H01L2224/13111 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/81801 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01055 ,  H01L2924/01059 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/351 ,  H05K1/0231 ,  H05K1/112 ,  H05K1/142 ,  H05K1/162 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/096 ,  H05K2201/10674 ,  H05K2201/10712 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A method for manufacturing a wiring board including, as steps executed in written order: a sub-core accommodation step of accommodating the ceramic sub-core in the sub-core accommodation space through the first-major-surface-side opening of the sub-core accommodation space; and a film formation and charging step of forming a lowest resin insulating layer of the first-major-surface-side wiring laminate by sticking a resin material to the core body and the ceramic sub-core from the first major surface side, and forming a groove-filling portion that is continuous with the lowest resin insulating layer by charging the resin material into a gap between the core body and the ceramic sub-core.

Abstract translation: 一种布线板的制造方法，其特征在于，具有以下顺序执行的步骤：副芯放置步骤，通过所述副芯容纳空间中的所述子芯容纳空间的第一主表面侧开口容纳所述陶瓷副芯， 核心住宿空间; 以及成膜和充电步骤，通过从第一主表面侧将树脂材料粘附到芯体和陶瓷副芯，形成第一主表面侧布线层压体的最低树脂绝缘层，并形成 通过将树脂材料充填到芯体和陶瓷子芯之间的间隙中，与最低树脂绝缘层连续的凹槽填充部分。

公开(公告)号：US08698278B2

公开(公告)日：2014-04-15

申请号：US12933522

申请日：2009-03-24

Applicant: Masaki Muramatsu

Inventor： Masaki Muramatsu

IPC: H01L27/08

CPC classification number: H05K1/162 ,  H01L21/4857 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01019 ,  H01L2924/01025 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/1461 ,  H01L2924/15311 ,  H05K1/02 ,  H05K1/0231 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/09309 ,  H05K2201/096 ,  H05K2201/09763 ,  H05K2201/10674 ,  H05K2201/10712 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: An objective is to provide a component-incorporated wiring substrate capable of solving a problem caused by an increase in length of wiring lines that connect a component and a capacitor. A component-incorporated wiring substrate 10 includes a core substrate 11, a first capacitor 301, a wiring laminate portion 31, and a second capacitor 101. An accommodation hole portion 90 of the core substrate 11 accommodates the first capacitor 101 therein, and a component-mounting region 20 is set on a surface 39 of the wiring laminate portion 31. The second capacitor 101 has electrode layers 102, 103 and a dielectric layer 104. The second capacitor 101 is embedded in the wiring laminate portion 31 in such a state that first main surfaces 105, 107 and second main surfaces 106, 108 are in parallel with the surface 39 of the wiring laminate portion 31, and is disposed between the first capacitor 301 and the component-mounting region 20.

Abstract translation: 目的是提供一种能够解决由连接部件和电容器的布线的长度增加引起的问题的配有部件的布线基板。 构成部件的布线基板10具有芯基板11，第一电容器301，布线层叠部31和第二电容器101.芯基板11的容纳孔部90容纳第一电容器101， 安装区域20设置在布线层叠部分31的表面39上。第二电容器101具有电极层102,103和电介质层104.第二电容器101以这样的状态嵌入布线层叠部分31中 第一主表面105,107和第二主表面106,108与布线层压体部分31的表面39平行，并且设置在第一电容器301和部件安装区域20之间。

公开(公告)号：US08350306B2

公开(公告)日：2013-01-08

申请号：US12951739

申请日：2010-11-22

Applicant: Motohiko Sato ,  Kazuhiro Hayashi ,  Kenji Murakami ,  Motonobu Kurahashi ,  Yusuke Kaieda ,  Jun Otsuka ,  Manabu Sato

Inventor： Motohiko Sato ,  Kazuhiro Hayashi ,  Kenji Murakami ,  Motonobu Kurahashi ,  Yusuke Kaieda ,  Jun Otsuka ,  Manabu Sato

IPC: H01L21/02

CPC classification number: H05K1/0231 ,  H01G4/228 ,  H01G4/30 ,  H01G4/38 ,  H01L23/49822 ,  H01L2924/0002 ,  H01L2924/3511 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/10712 ,  H01L2924/00

Abstract: A wiring substrate in which a capacitor is provided, the capacitor comprising a capacitor body including a plurality of dielectric layers and internal electrode layers provided between the different dielectric layers, wherein said capacitor body has, in at least one side face of said capacitor body, recesses extending in a thickness direction of said capacitor body from at least one of a first principal face of said capacitor body and a second principal face positioned on the side opposite to the first principal face.

Abstract translation: 一种电容器，其具有电容器，所述电容器包括：电容器主体，包括多个电介质层和设置在所述不同电介质层之间的内部电极层，其中所述电容器本体在所述电容器主体的至少一个侧面中， 从所述电容器主体的第一主面和位于与所述第一主面相反的一侧的第二主面中的至少一个在所述电容器本体的厚度方向上延伸的凹部。

公开(公告)号：US08261435B2

公开(公告)日：2012-09-11

申请号：US12606593

申请日：2009-10-27

Applicant: Hiroyasu Nagata

Inventor： Hiroyasu Nagata

IPC: H05K3/30

CPC classification number: B32B37/025 ,  B32B2038/0092 ,  B32B2309/02 ,  B32B2309/105 ,  B32B2309/12 ,  B32B2457/08 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/2518 ,  H05K1/0231 ,  H05K1/0269 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/0187 ,  H05K2201/09781 ,  H05K2201/09918 ,  H05K2201/10674 ,  H05K2201/10712 ,  H05K2203/166 ,  Y10T29/4913 ,  Y10T29/49133 ,  Y10T29/49146 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T156/1052 ,  Y10T156/11 ,  Y10T156/1195

Abstract: A method for manufacturing printed wiring board including preparing an electronic component having first and second surfaces and electrode on the first surface, forming in an adhesive tape a mark, mounting based on the mark the component on the tape such that the second surface faces the adhesive of the tape, forming another mark on insulative substrate having first and second surfaces, forming in the substrate an opening larger than the component, mounting based on the marks the substrate on the tape such that the component is in the opening of the substrate, fixing the component to the substrate using resin, forming an insulation layer on the first surface of the substrate where the component is accommodated, removing the tape, forming in the layer an opening reaching the electrode, forming a conductive circuit on the layer, and forming in the opening of the layer a via connected to the electrode.

Abstract translation: 一种制造印刷线路板的方法，包括制备具有第一和第二表面的电子部件和在第一表面上的电极，在胶带上形成标记，基于将该部件标记在带上以使得第二表面面向粘合剂 的带，在具有第一和第二表面的绝缘基板上形成另一个标记，在基板上形成比部件大的开口，基于将基板标记在带上的安装，使得部件在基板的开口中，固定 使用树脂的基板上的部件，在容纳部件的基板的第一表面上形成绝缘层，去除带，在该层中形成到达电极的开口，在该层上形成导电电路，并形成 打开连接到电极的层a通孔。

公开(公告)号：US08148645B2

公开(公告)日：2012-04-03

申请号：US12189852

申请日：2008-08-12

Applicant: Kazuhiro Yoshikawa

Inventor： Kazuhiro Yoshikawa

IPC: H05K1/16 ,  H05K7/06

CPC classification number: H05K1/162 ,  H01L2224/16 ,  H01L2224/16227 ,  H01L2924/01004 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/3511 ,  H05K1/113 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/09309 ,  H05K2201/09718 ,  H05K2201/10515 ,  H05K2201/10712

Abstract: A wiring substrate and method of forming a wiring substrate. The wiring substrate includes a base substrate, a first resin insulating layer provided on the base substrate and a laminated capacitor formed within the first resin insulating layer. The laminated capacitor includes a plurality of capacitors laminated to each other by adhesive, each capacitor including a first electrode, a second electrode opposing the first electrode and a dielectric layer interposed between the first and second electrodes. A first via conductor electrically connects the first electrodes of the plurality of capacitors to each other, and a second via conductor electrically connects the second electrodes of the plurality of capacitors to each other. A first external terminal electrically connects to the first via conductor, and a second external terminal electrically connects to the second via conductor.

Abstract translation: 布线基板以及布线基板的形成方法。 布线基板包括基底基板，设置在基底基板上的第一树脂绝缘层和形成在第一树脂绝缘层内的叠层电容器。 层叠电容器包括通过粘合剂彼此层叠的多个电容器，每个电容器包括第一电极，与第一电极相对的第二电极和介于第一和第二电极之间的电介质层。 第一通孔导体将多个电容器的第一电极彼此电连接，并且第二通孔导体将多个电容器的第二电极彼此电连接。 第一外部端子电连接到第一通孔导体，第二外部端子电连接到第二通孔导体。