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62 条记录 (耗时 0.018 秒)

    Sensor semiconductor device and manufacturing method thereof
    52.
    发明申请
    Sensor semiconductor device and manufacturing method thereof 审中-公开
    传感器半导体器件及其制造方法

    公开(公告)号：US20080296716A1

    公开(公告)日：2008-12-04

    申请号：US12151570

    申请日：2008-05-07

    申请人： Chang-Yueh Chan ,  Chien-Ping Huang ,  Chih-Ming Huang ,  Cheng-Hsu Hsiao ,  Chun-Chi Ke

    发明人： Chang-Yueh Chan ,  Chien-Ping Huang ,  Chih-Ming Huang ,  Cheng-Hsu Hsiao ,  Chun-Chi Ke

    IPC分类号： H01L21/50 ,  H01L23/00

    CPC分类号： H01L21/56 ,  H01L23/3114 ,  H01L27/14618 ,  H01L27/14683 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

    摘要： A sensor semiconductor device and a manufacturing method thereof are disclosed. The method includes: providing a light-permeable carrier board with a plurality of metallic circuits; electrically connecting the metallic circuits to a plurality of sensor chips through conductive bumps formed on the bond pads of the sensor chips, wherein the sensor chips have been previously subjected to thinning and chip probing; filling a first dielectric layer between the sensor chips to cover the metallic circuits and peripheries of the sensor chips; forming a second dielectric layer on the sensor chips and the first dielectric layer; forming grooves between the sensor chips for exposing the metallic circuits such that a plurality of conductive traces electrically connected to the metallic circuits can be formed on the second dielectric layer; and singulating the sensor chips to form a plurality of sensor semiconductor devices. The present invention overcomes the drawbacks of breakage of trace connection due to a sharp angle formed at joints, poor electrical connection and chip damage due to an alignment error in cutting from the back of the wafer, as well as an increased cost due to multiple sputtering processes for forming traces.

    摘要翻译： 公开了一种传感器半导体器件及其制造方法。 该方法包括：提供具有多个金属电路的透光性载板; 通过形成在传感器芯片的接合焊盘上的导电凸块将金属电路电连接到多个传感器芯片，其中传感器芯片已经预先经受了薄化和芯片探测; 在传感器芯片之间填充第一电介质层以覆盖金属电路和传感器芯片的周边; 在所述传感器芯片和所述第一介电层上形成第二电介质层; 在所述传感器芯片之间形成用于暴露所述金属电路的槽，使得可以在所述第二介电层上形成电连接到所述金属电路的多个导电迹线; 并且分离传感器芯片以形成多个传感器半导体器件。 本发明克服了由于在接头处形成的尖角导致的迹线连接断裂的缺点，由于从晶片背面的切割中的对准误差导致的不良电连接和芯片损坏以及由于多次溅射而导致的成本增加 形成痕迹的过程。

    Package structure having micro-electromechanical element and fabrication method thereof
    55.
    发明授权
    Package structure having micro-electromechanical element and fabrication method thereof 有权
    具有微机电元件的封装结构及其制造方法

    公开(公告)号：US08198689B2

    公开(公告)日：2012-06-12

    申请号：US12769041

    申请日：2010-04-28

    申请人： Chang-Yueh Chan ,  Chien-Ping Huang ,  Chun-Chi Ke ,  Chun-An Huang ,  Chih-Ming Huang

    发明人： Chang-Yueh Chan ,  Chien-Ping Huang ,  Chun-Chi Ke ,  Chun-An Huang ,  Chih-Ming Huang

    IPC分类号： H01L23/485

    CPC分类号： H01L21/02 ,  B81B7/007 ,  B81B2207/07 ,  H01L23/52 ,  H01L29/84 ,  H01L2224/02166 ,  H01L2224/48091 ,  H01L2224/48465 ,  H01L2924/1461 ,  H01L2924/00014 ,  H01L2924/00

    摘要： Proposed is a package structure having a micro-electromechanical (MEMS) element, including a chip having a plurality of electrical connecting pads and a MEMS element formed thereon; a lid disposed on the chip for covering the MEMS element; a stud bump disposed on each of the electrical connecting pads; an encapsulant formed on the chip with part of the stud bumps being exposed from the encapsulant; and a metal conductive layer formed on the encapsulant and connected to the stud bumps. The invention is characterized by completing the packaging process on the wafer directly to enable thinner and cheaper package structures to be fabricated within less time. This invention further provides a method for fabricating the package structure as described above.

    摘要翻译： 提出具有微机电（MEMS）元件的封装结构，其包括具有多个电连接焊盘和形成在其上的MEMS元件的芯片; 设置在所述芯片上用于覆盖所述MEMS元件的盖; 设置在每个电连接焊盘上的螺柱凸块; 形成在芯片上的密封剂，其中一部分柱状凸块从密封剂暴露出来; 以及金属导电层，形成在密封剂上并连接到凸块上。 本发明的特征在于直接完成晶片上的封装工艺，以便在更短的时间内制造更薄和更便宜的封装结构。 本发明还提供如上所述的用于制造封装结构的方法。

    SEMICONDUCTOR PACKAGE STRUCTURE
    57.
    发明申请
    SEMICONDUCTOR PACKAGE STRUCTURE 有权
    半导体封装结构

    公开(公告)号：US20110156227A1

    公开(公告)日：2011-06-30

    申请号：US12770028

    申请日：2010-04-29

    申请人： Pang-Chun Lin ,  Chun-Yuan Li ,  Chien-Ping Huang ,  Chun-Chi Ke

    发明人： Pang-Chun Lin ,  Chun-Yuan Li ,  Chien-Ping Huang ,  Chun-Chi Ke

    IPC分类号： H01L23/495

    CPC分类号： H01L23/495 ,  H01L21/4832 ,  H01L23/3107 ,  H01L23/4951 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/181 ,  Y10T29/49117 ,  Y10T29/49171 ,  Y10T29/49172 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

    摘要： A semiconductor package structure includes: a dielectric layer; a metal layer disposed on the dielectric layer and having a die pad and traces, the traces each including a trace body, a bond pad extending to the periphery of the die pad, and an opposite trace end; metal pillars penetrating the dielectric layer with one ends thereof connecting to the die pad and the trace ends while the other ends thereof protruding from the dielectric layer; a semiconductor chip mounted on the die pad and electrically connected to the bond pads through bonding wires; and an encapsulant covering the semiconductor chip, the bonding wires, the metal layer, and the dielectric layer. The invention is characterized by disposing traces with bond pads close to the die pad to shorten bonding wires and forming metal pillars protruding from the dielectric layer to avoid solder bridging encountered in prior techniques.

    摘要翻译： 半导体封装结构包括：电介质层; 设置在电介质层上并具有芯片焊盘和迹线的金属层，每个迹线包括迹线体，延伸到管芯焊盘周边的接合焊盘和相对的迹线端; 金属柱贯穿电介质层，其一端连接到管芯焊盘并且其端部从电介质层突出; 半导体芯片，安装在芯片焊盘上，并通过接合线电连接到焊盘; 以及覆盖半导体芯片，接合线，金属层和电介质层的密封剂。 本发明的特征在于，将具有接合焊盘的迹线设置在芯片焊盘附近以缩短接合线并形成从电介质层突出的金属柱，以避免在现有技术中遇到的焊料桥接。

    Fabrication method of under bump metallurgy structure
    60.
    发明授权
    Fabrication method of under bump metallurgy structure 有权
    凸块冶金结构的制造方法

    公开(公告)号：US07358177B2

    公开(公告)日：2008-04-15

    申请号：US11190271

    申请日：2005-07-26

    申请人： Chun-Chi Ke ,  Chien-Ping Huang

    发明人： Chun-Chi Ke ,  Chien-Ping Huang

    IPC分类号： H01L21/44

    CPC分类号： H01L24/03 ,  H01L2224/0401 ,  H01L2224/73204 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/014

    摘要： A fabrication method of under bump metallurgy (UBM) structure is provided. A blocking layer is applied over a surface of a semiconductor element formed with at least one bond pad and a passivation layer thereon. The passivation layer covers the semiconductor element and exposes the bond pad, and the blocking layer covers the bond pad and the passivation layer. The blocking layer is formed with at least one opening at a position corresponding to the bond pad. Metallic layers are formed on a surface of the blocking layer and at the opening. The metallic layers are patterned to form a UBM structure at the opening corresponding to the bond pad. Then the blocking layer is removed. The blocking layer can separate the metallic layers for forming the UBM structure from the passivation layer to prevent metallic residues of the UBM structure from being left on the passivation layer.

    摘要翻译： 提供了一种凸块下冶金（UBM）结构的制造方法。 在其上形成有至少一个接合焊盘和钝化层的半导体元件的表面上施加阻挡层。 钝化层覆盖半导体元件并暴露接合焊盘，并且阻挡层覆盖接合焊盘和钝化层。 阻挡层在对应于接合焊盘的位置处形成有至少一个开口。 金属层形成在阻挡层的表面和开口处。 金属层被图案化以在对应于接合焊盘的开口处形成UBM结构。 然后去除阻挡层。 阻挡层可以将用于形成UBM结构的金属层与钝化层分开，以防止UBM结构的金属残留物残留在钝化层上。