公开(公告)号：US20170229326A1

公开(公告)日：2017-08-10

申请号：US15581497

申请日：2017-04-28

Applicant: Applied Materials, Inc.

Inventor： Toan Q. Tran ,  Zilu Weng ,  Dmitry Lubomirsky ,  Satoru Kobayashi ,  Tae Seung Cho ,  Soonam Park ,  Son M. Phi ,  Shankar Venkataraman

IPC: H01L21/67 ,  H01L21/683

CPC classification number: H01L21/67069 ,  H01L21/3065 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/67103 ,  H01L21/67248 ,  H01L21/6831 ,  H01L21/68757 ,  H01L21/68785 ,  H01L21/68792

Abstract: A wafer chuck assembly includes a puck, a shaft and a base. The puck includes an electrically insulating material that defines a top surface of the puck; a plurality of electrodes are embedded within the electrically insulating material. The puck also includes an inner puck element that forms one or more channels for a heat exchange fluid, the inner puck element being in thermal communication with the electrically insulating material, and an electrically conductive plate disposed proximate to the inner puck element. The shaft includes an electrically conductive shaft housing that is electrically coupled with the plate, and a plurality of connectors, including electrical connectors for the electrodes. The base includes an electrically conductive base housing that is electrically coupled with the shaft housing, and an electrically insulating terminal block disposed within the base housing, the plurality of connectors passing through the terminal block.

公开(公告)号：US09496167B2

公开(公告)日：2016-11-15

申请号：US14448059

申请日：2014-07-31

Applicant: Applied Materials, Inc.

Inventor： Vinod R. Purayath ,  Randhir Thakur ,  Shankar Venkataraman ,  Nitin K. Ingle

IPC: H01L21/764 ,  H01L27/115 ,  H01L21/311 ,  H01L29/06 ,  H01L21/28 ,  H01L29/66 ,  H01L21/02

CPC classification number: H01L21/764 ,  H01J37/32357 ,  H01L21/02071 ,  H01L21/28273 ,  H01L21/28282 ,  H01L21/31116 ,  H01L21/67069 ,  H01L21/67103 ,  H01L21/68764 ,  H01L27/11568 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/66833 ,  H01L29/7887

Abstract: Methods of forming flash memory cells are described which incorporate air gaps for improved performance. The methods are useful for so-called “2-d flat cell” flash architectures. 2-d flat cell flash memory involves a reactive ion etch to dig trenches into multi-layers containing high work function and other metal layers. The methods described herein remove the metal oxide debris from the sidewalls of the multi-layer trench and then, without breaking vacuum, selectively remove shallow trench isolation (STI) oxidation which become the air gaps. Both the metal oxide removal and the STI oxidation removal are carried out in the same mainframe with highly selective etch processes using remotely excited fluorine plasma effluents.

Abstract translation: 描述形成闪速存储器单元的方法，其包括用于改善性能的气隙。 这些方法对于所谓的“2-d平坦单元”闪存架构是有用的。 2-d平板电池闪存包括反应离子蚀刻，以将沟槽挖掘成包含高功函数和其它金属层的多层。 本文描述的方法从多层沟槽的侧壁去除金属氧化物碎屑，然后在不破坏真空的情况下选择性地去除成为气隙的浅沟槽隔离（STI）氧化。 金属氧化物去除和STI氧化去除都是使用远程激发的氟等离子体流出物，在相同的主机中进行高选择性蚀刻工艺。

公开(公告)号：US20160225652A1

公开(公告)日：2016-08-04

申请号：US14612857

申请日：2015-02-03

Applicant: Applied Materials, Inc.

Inventor： Toan Q. Tran ,  Zilu Weng ,  Dmitry Lubomirsky ,  Satoru Kobayashi ,  Tae Seung Cho ,  Soonam Park ,  Son M. Phi ,  Shankar Venkataraman

IPC: H01L21/683 ,  H01L21/3065 ,  H01L21/67

CPC classification number: H01L21/67069 ,  H01L21/3065 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/67103 ,  H01L21/67248 ,  H01L21/6831 ,  H01L21/68757 ,  H01L21/68785 ,  H01L21/68792

Abstract: A wafer chuck assembly includes a puck, a shaft and a base. The puck includes an electrically insulating material that defines a top surface of the puck; a plurality of electrodes are embedded within the electrically insulating material. The puck also includes an inner puck element that forms one or more channels for a heat exchange fluid, the inner puck element being in thermal communication with the electrically insulating material, and an electrically conductive plate disposed proximate to the inner puck element. The shaft includes an electrically conductive shaft housing that is electrically coupled with the plate, and a plurality of connectors, including electrical connectors for the electrodes. The base includes an electrically conductive base housing that is electrically coupled with the shaft housing, and an electrically insulating terminal block disposed within the base housing, the plurality of connectors passing through the terminal block.

Abstract translation: 晶片卡盘组件包括圆盘，轴和基座。 圆盘包括限定冰球顶表面的电绝缘材料; 多个电极嵌入电绝缘材料内。 该圆盘还包括内部圆盘元件，其形成用于热交换流体的一个或多个通道，内部圆盘元件与电绝缘材料热连通，以及设置在靠近内部圆锥元件的导电板。 所述轴包括与所述板电耦合的导电轴壳体，以及包括用于所述电极的电连接器的多个连接器。 基座包括与轴壳体电耦合的导电基座壳体，以及设置在基座壳体内的电绝缘接线块，多个连接器穿过接线端子。

公开(公告)号：US20160225651A1

公开(公告)日：2016-08-04

申请号：US14612472

申请日：2015-02-03

Applicant: Applied Materials, Inc.

Inventor： Toan Q. Tran ,  Sultan Malik ,  Dmitry Lubomirsky ,  Shambhu N. Roy ,  Satoru Kobayashi ,  Tae Seung Cho ,  Soonam Park ,  Shankar Venkataraman

IPC: H01L21/683 ,  H01L21/67 ,  H01L21/3065

CPC classification number: H01L21/6833 ,  H01L21/3065 ,  H01L21/67103

Abstract: A wafer chuck assembly includes a puck, a shaft and a base. An insulating material defines a top surface of the puck, a heater element is embedded within the insulating material, and a conductive plate lies beneath the insulating material. The shaft includes a housing coupled with the plate, and electrical connectors for the heater elements and the electrodes. A conductive base housing couples with the shaft housing, and the connectors pass through a terminal block within the base housing. A method of plasma processing includes loading a workpiece onto a chuck having an insulating top surface, providing a DC voltage differential across two electrodes within the top surface, heating the chuck by passing current through heater elements, providing process gases in a chamber surrounding the chuck, and providing an RF voltage between a conductive plate beneath the chuck, and one or more walls of the chamber.

Abstract translation: 晶片卡盘组件包括圆盘，轴和基座。 绝缘材料限定了圆盘的顶表面，加热元件嵌入绝缘材料内，导电板位于绝缘材料的下方。 轴包括与板连接的壳体，以及用于加热器元件和电极的电连接器。 导电基座壳体与轴壳体耦合，并且连接器穿过基座壳体内的端子块。 等离子体处理的方法包括将工件加载到具有绝缘顶表面的卡盘上，在顶表面内的两个电极之间提供直流电压差，通过使电流通过加热器元件来加热卡盘，在围绕卡盘的腔室中提供工艺气体 并且在卡盘下方的导电板与腔室的一个或多个壁之间提供RF电压。

公开(公告)号：US09373517B2

公开(公告)日：2016-06-21

申请号：US13829669

申请日：2013-03-14

Applicant: Applied Materials, Inc.

Inventor： Jang-Gyoo Yang ,  Xinglong Chen ,  Soonam Park ,  Jonghoon Baek ,  Saurabh Garg ,  Shankar Venkataraman

IPC: H01L21/3065 ,  H01L21/67 ,  C23C16/50 ,  C23C16/503 ,  C23C16/505 ,  C23C16/509 ,  H01J37/32 ,  H01L21/3213

CPC classification number: H01J37/32091 ,  C23C16/50 ,  C23C16/503 ,  C23C16/505 ,  C23C16/509 ,  C23C16/5093 ,  H01J37/32146 ,  H01J37/32422 ,  H01J37/3244 ,  H01J37/32568 ,  H01J2237/332 ,  H01J2237/334 ,  H01L21/02274 ,  H01L21/0262 ,  H01L21/28556 ,  H01L21/3065 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/32136 ,  H01L21/67069 ,  H01L21/67075

Abstract: Semiconductor processing systems are described including a process chamber. The process chamber may include a lid assembly, grid electrode, conductive insert, and ground electrode. Each component may be coupled with one or more power supplies operable to produce a plasma within the process chamber. Each component may be electrically isolated through the positioning of a plurality of insulation members. The one or more power supplies may be electrically coupled with the process chamber with the use of switching mechanisms. The switches may be switchable to electrically couple the one or more power supplies to the components of the process chamber.

Abstract translation: 描述了包括处理室的半导体处理系统。 处理室可以包括盖组件，栅格电极，导电插入件和接地电极。 每个部件可以与可操作以在处理室内产生等离子体的一个或多个电源耦合。 每个部件可以通过定位多个绝缘部件而被电隔离。 一个或多个电源可以利用开关机构与处理室电耦合。 开关可以切换以将一个或多个电源电耦合到处理室的组件。

公开(公告)号：US20160064233A1

公开(公告)日：2016-03-03

申请号：US14936448

申请日：2015-11-09

Applicant: Applied Materials, Inc.

Inventor： Anchuan Wang ,  Xinglong Chen ,  Zihui Li ,  Hiroshi Hamana ,  Zhijun Chen ,  Ching-Mei Hsu ,  Jiayin Huang ,  Nitin K. Ingle ,  Dmitry Lubomirsky ,  Shankar Venkataraman ,  Randhir Thakur

IPC: H01L21/3065

CPC classification number: H01L21/324 ,  C23C16/4405 ,  H01J37/32357 ,  H01J37/32862 ,  H01L21/02041 ,  H01L21/02057 ,  H01L21/0206 ,  H01L21/263 ,  H01L21/2686 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/3105 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/32136 ,  H01L21/32137 ,  H01L21/67069 ,  H01L21/67075 ,  H01L21/6708 ,  H01L21/67109 ,  H01L21/67115 ,  H01L21/67184 ,  H01L21/6719 ,  H01L21/67196 ,  H01L21/67201 ,  H01L21/67207 ,  H01L21/67248 ,  H01L21/67253 ,  H01L21/67288 ,  H01L21/67703 ,  H01L21/67739 ,  H01L21/67742 ,  H01L21/6831

Abstract: Systems, chambers, and processes are provided for controlling process defects caused by moisture contamination. The systems may provide configurations for chambers to perform multiple operations in a vacuum or controlled environment. The chambers may include configurations to provide additional processing capabilities in combination chamber designs. The methods may provide for the limiting, prevention, and correction of aging defects that may be caused as a result of etching processes performed by system tools.

公开(公告)号：US20160005572A1

公开(公告)日：2016-01-07

申请号：US14853838

申请日：2015-09-14

Applicant: Applied Materials, Inc.

Inventor： Qiwei Liang ,  Xinglong Chen ,  Kien Chuc ,  Dimitry Lubomirsky ,  Soonam Park ,  Jang-Gyoo Yang ,  Shankar Venkataraman ,  Toan Tran ,  Kimberly Hinckley ,  Saurabh Garg

IPC: H01J37/32 ,  C23C16/455

CPC classification number: H01J37/32449 ,  B05B1/005 ,  B05B1/18 ,  C23C16/452 ,  C23C16/455 ,  C23C16/45561 ,  C23C16/45565 ,  C23C16/45574 ,  C23C16/45582 ,  C23C16/50 ,  H01J37/32009 ,  H01J37/32357 ,  H01J37/3244 ,  H01J37/32568 ,  H01J2237/002 ,  H01L21/67069

Abstract: Gas distribution assemblies are described including an annular body, an upper plate, and a lower plate. The upper plate may define a first plurality of apertures, and the lower plate may define a second and third plurality of apertures. The upper and lower plates may be coupled with one another and the annular body such that the first and second apertures produce channels through the gas distribution assemblies, and a volume is defined between the upper and lower plates.

Abstract translation: 描述了气体分配组件，其包括环形体，上板和下板。 上板可以限定第一多个孔，并且下板可以限定第二和第三多个孔。 上板和下板可以彼此耦合并且环形体使得第一和第二孔产生通过气体分配组件的通道，并且在上板和下板之间限定一个体积。

公开(公告)号：US20150371866A1

公开(公告)日：2015-12-24

申请号：US14309625

申请日：2014-06-19

Applicant: Applied Materials, Inc.

Inventor： Zhijun Chen ,  Zihui Li ,  Nitin K. Ingle ,  Anchuan Wang ,  Shankar Venkataraman

IPC: H01L21/311 ,  H01L21/02

CPC classification number: H01L21/31116 ,  H01J37/32357 ,  H01J2237/334 ,  H01L21/02164 ,  H01L21/0337 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/32139 ,  H01L21/70

Abstract: A method of etching doped silicon oxide on patterned heterogeneous structures is described and includes a gas phase etch using partial remote plasma excitation. The remote plasma excites a fluorine-containing precursor and the plasma effluents created are flowed into a substrate processing region. A hydrogen-containing precursor, e.g. water, is concurrently flowed into the substrate processing region without plasma excitation. The plasma effluents are combined with the unexcited hydrogen-containing precursor in the substrate processing region where the combination reacts with the doped silicon oxide. The plasmas effluents react with the patterned heterogeneous structures to selectively remove doped silicon oxide.

Abstract translation: 描述了在图案化的异质结构上蚀刻掺杂的氧化硅的方法，并且包括使用部分远程等离子体激发的气相蚀刻。 远程等离子体激发含氟前体，产生的等离子体流出物流入基板处理区域。 含氢前体，例如 水同时流入基板处理区域而没有等离子体激发。 在衬底处理区域中，等离子体流出物与未掺杂的含氢前体结合，其中组合与掺杂的氧化硅反应。 等离子体流出物与图案化的异质结构反应以选择性地去除掺杂的氧化硅。

公开(公告)号：US09209012B2

公开(公告)日：2015-12-08

申请号：US14479671

申请日：2014-09-08

Applicant: Applied Materials, Inc.

Inventor： Zhijun Chen ,  Zihui Li ,  Anchuan Wang ,  Nitin K. Ingle ,  Shankar Venkataraman

IPC: H01L21/302 ,  H01L21/461 ,  H01L21/02 ,  H01L21/311 ,  H01L21/3065 ,  H01J37/32

CPC classification number: H01L21/02205 ,  H01J37/32357 ,  H01J2237/334 ,  H01L21/3065 ,  H01L21/31116

Abstract: A method of etching silicon nitride on patterned heterogeneous structures is described and includes a remote plasma etch formed from a fluorine-containing precursor and a nitrogen-and-oxygen-containing precursor. Plasma effluents from two remote plasmas are flowed into a substrate processing region where the plasma effluents react with the silicon nitride. The plasmas effluents react with the patterned heterogeneous structures to selectively remove silicon nitride while very slowly removing silicon, such as polysilicon. The silicon nitride selectivity results partly from the introduction of fluorine-containing precursor and nitrogen-and-oxygen-containing precursor using distinct (but possibly overlapping) plasma pathways which may be in series or in parallel.

公开(公告)号：US09184055B2

公开(公告)日：2015-11-10

申请号：US14246952

申请日：2014-04-07

Applicant: APPLIED MATERIALS, INC.

Inventor： Anchuan Wang ,  Xinglong Chen ,  Zihui Li ,  Hiroshi Hamana ,  Zhijun Chen ,  Ching-Mei Hsu ,  Jiayin Huang ,  Nitin K. Ingle ,  Dmitry Lubomirsky ,  Shankar Venkataraman ,  Randhir Thakur

IPC: H01L21/263 ,  H01L21/02 ,  H01L21/67 ,  C23C16/44 ,  H01L21/677 ,  H01L21/306 ,  H01L21/3065 ,  H01L21/683 ,  H01L21/3213 ,  H01L21/311 ,  H01J37/32

CPC classification number: H01L21/324 ,  C23C16/4405 ,  H01J37/32357 ,  H01J37/32862 ,  H01L21/02041 ,  H01L21/02057 ,  H01L21/0206 ,  H01L21/263 ,  H01L21/2686 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/3105 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/32136 ,  H01L21/32137 ,  H01L21/67069 ,  H01L21/67075 ,  H01L21/6708 ,  H01L21/67109 ,  H01L21/67115 ,  H01L21/67184 ,  H01L21/6719 ,  H01L21/67196 ,  H01L21/67201 ,  H01L21/67207 ,  H01L21/67248 ,  H01L21/67253 ,  H01L21/67288 ,  H01L21/67703 ,  H01L21/67739 ,  H01L21/67742 ,  H01L21/6831

Abstract: Systems, chambers, and processes are provided for controlling process defects caused by moisture contamination. The systems may provide configurations for chambers to perform multiple operations in a vacuum or controlled environment. The chambers may include configurations to provide additional processing capabilities in combination chamber designs. The methods may provide for the limiting, prevention, and correction of aging defects that may be caused as a result of etching processes performed by system tools.

Abstract translation: 提供系统，室和过程以控制由水分污染引起的过程缺陷。 这些系统可以提供腔室的配置，以在真空或受控环境中执行多个操作。 腔室可以包括在组合腔室设计中提供附加处理能力的构造。 这些方法可以提供由系统工具执行的蚀刻工艺可能引起的老化缺陷的限制，预防和校正。