公开(公告)号：US10008652B2

公开(公告)日：2018-06-26

申请号：US15469518

申请日：2017-03-25

Applicant: Invensas Corporation

Inventor： Liang Wang ,  Eric Tosaya

IPC: H01L33/00 ,  H01L33/62 ,  H01L25/075 ,  H01L21/66 ,  H01L33/40 ,  G01R31/26

CPC classification number: H01L33/62 ,  G01R31/2635 ,  H01L22/14 ,  H01L22/32 ,  H01L23/481 ,  H01L24/95 ,  H01L25/0753 ,  H01L33/0095 ,  H01L33/385 ,  H01L33/405 ,  H01L2224/81

Abstract: Disclosed herein are technologies for forming a plurality of known good die (KGD)-light emitting diode (LED) components into a larger size optically coherent LED chips or devices. This Abstract is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

公开(公告)号：US09947618B2

公开(公告)日：2018-04-17

申请号：US15619160

申请日：2017-06-09

Applicant: Invensas Corporation

Inventor： Cyprian Emeka Uzoh ,  Charles G. Woychik ,  Arkalgud R. Sitaram ,  Hong Shen ,  Zhuowen Sun ,  Liang Wang ,  Guilian Gao

IPC: H01L23/04 ,  H01L23/52 ,  H01L21/44 ,  H01L23/522 ,  H01L49/02 ,  H01L21/768 ,  H01L21/8234

CPC classification number: H01L23/5223 ,  H01L21/76802 ,  H01L21/76877 ,  H01L21/823431 ,  H01L21/823475 ,  H01L23/5226 ,  H01L28/60 ,  H01L2924/0002 ,  H01L2924/00

Abstract: In a microelectronic component having conductive vias (114) passing through a substrate (104) and protruding above the substrate, conductive features (120E.A, 120E.B) are provided above the substrate that wrap around the conductive vias' protrusions (114′) to form capacitors, electromagnetic shields, and possibly other elements. Other features and embodiments are also provided.

公开(公告)号：US20180096973A1

公开(公告)日：2018-04-05

申请号：US15834658

申请日：2017-12-07

Applicant: Invensas Corporation

Inventor： Hong Shen ,  Liang Wang ,  Guilian Gao

IPC: H01L25/065 ,  H01L23/00 ,  H01L21/768 ,  H01L21/3105 ,  H01L21/304 ,  H01L21/306 ,  H01L25/00 ,  H01L21/683 ,  H01L21/78 ,  H01L21/56

CPC classification number: H01L24/94 ,  H01L21/304 ,  H01L21/30625 ,  H01L21/31051 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/76877 ,  H01L21/76898 ,  H01L21/78 ,  H01L24/32 ,  H01L24/83 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2224/32145 ,  H01L2224/83005 ,  H01L2224/83895 ,  H01L2224/83896 ,  H01L2225/06541 ,  H01L2924/10253 ,  H01L2924/1032 ,  H01L2924/1205 ,  H01L2924/1207 ,  H01L2924/1304 ,  H01L2924/1436

Abstract: Systems and methods for providing 3D wafer assembly with known-good-dies are provided. An example method compiles an index of dies on a semiconductor wafer and removes the defective dies to provide a wafer with dies that are all operational. Defective dies on multiple wafers may be removed in parallel, and resulting wafers with all good dies stacked in 3D wafer assembly. In an implementation, the spaces left by removed defective dies may be filled at least in part with operational dies or with a fill material. Defective dies may be replaced either before or after wafer-to-wafer assembly to eliminate production of defective stacked devices, or the spaces may be left empty. A bottom device wafer may also have its defective dies removed or replaced, resulting in wafer-to-wafer assembly that provides 3D stacks with no defective dies.

公开(公告)号：US09888584B2

公开(公告)日：2018-02-06

申请号：US14942781

申请日：2015-11-16

Applicant: Invensas Corporation

Inventor： Liang Wang ,  Rajesh Katkar ,  Hong Shen ,  Cyprian Emeka Uzoh

IPC: H05K1/11 ,  H01L23/00 ,  H05K3/40 ,  H05K3/34

CPC classification number: H05K3/4007 ,  H01L24/81 ,  H01L2224/81193 ,  H01L2924/3841 ,  H05K1/111 ,  H05K3/3431

Abstract: A contact pad includes a solder-wettable porous network (310) which wicks the molten solder (130) and thus restricts the lateral spread of the solder, thus preventing solder bridging between adjacent contact pads.

公开(公告)号：US20170374738A1

公开(公告)日：2017-12-28

申请号：US15682049

申请日：2017-08-21

Applicant: Invensas Corporation

Inventor： Bong-Sub Lee ,  Cyprian Emeka Uzoh ,  Charles G. Woychik ,  Liang Wang ,  Laura Wills Mirkarimi ,  Arkalgud R. Sitaram

IPC: H05K1/09 ,  H01L23/498 ,  H01L21/48 ,  H05K1/11

CPC classification number: H05K1/097 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/4867 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L2224/16225 ,  H01L2924/0002 ,  H01L2924/15192 ,  H01L2924/15311 ,  H05K1/112 ,  H05K1/113 ,  H05K1/165 ,  H05K3/188 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/5313 ,  H01L2924/00

Abstract: Interposer circuitry (130) is formed on a possibly sacrificial substrate (210) from a porous core (130′) covered by a conductive coating (130″) which increases electrical conductance. The core is printed from nanoparticle ink. Then a support (120S) is formed, e.g. by molding, to mechanically stabilize the circuitry. A magnetic field can be used to stabilize the circuitry while the circuitry or the support are being formed. Other features are also provided.

公开(公告)号：US20170236794A1

公开(公告)日：2017-08-17

申请号：US15584961

申请日：2017-05-02

Applicant: Invensas Corporation

Inventor： Liang Wang ,  Rajesh Katkar ,  Hong Shen

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/34

CPC classification number: H01L24/09 ,  B81B7/008 ,  B81B2207/07 ,  B81C1/0023 ,  H01L21/565 ,  H01L21/76877 ,  H01L23/3107 ,  H01L23/3157 ,  H01L23/34 ,  H01L23/367 ,  H01L23/481 ,  H01L23/49838 ,  H01L23/5389 ,  H01L24/06 ,  H01L24/17 ,  H01L24/19 ,  H01L24/20 ,  H01L24/33 ,  H01L24/48 ,  H01L24/49 ,  H01L24/89 ,  H01L24/96 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/10 ,  H01L25/105 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/06181 ,  H01L2224/08225 ,  H01L2224/09181 ,  H01L2224/12105 ,  H01L2224/16145 ,  H01L2224/33517 ,  H01L2224/48135 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73209 ,  H01L2224/73253 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/80001 ,  H01L2224/81005 ,  H01L2224/92124 ,  H01L2224/92133 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06548 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/1511 ,  H01L2924/15153 ,  H01L2924/15192 ,  H01L2924/18161 ,  H01L2924/18162 ,  H01L2924/3511 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/32225 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/85399

Abstract: In a multi-chip module (MCM), a “super” chip (110N) is attached to multiple “plain” chips (110F′ “super” and “plain” chips can be any chips). The super chip is positioned above the wiring board (WB) but below at least some of plain chips (110F). The plain chips overlap the super chip. Further, the plain chips' low speed IOs can be connected to the WB by long direct connections such as bond wires (e.g. BVAs) or solder stacks; such connections can be placed side by side with the super chip. Such connections can be long, so the super chip is not required to be thin. Also, if through-substrate vias (TSVs) are omitted, the manufacturing yield is high and the manufacturing cost is low. Other structures are provided that combine the short and long direct connections to obtain desired physical and electrical properties.

公开(公告)号：US20170200877A1

公开(公告)日：2017-07-13

申请号：US15469518

申请日：2017-03-25

Applicant: Invensas Corporation

Inventor： Liang Wang ,  Eric Tosaya

IPC: H01L33/62 ,  G01R31/26 ,  H01L21/66 ,  H01L33/40 ,  H01L25/075 ,  H01L33/00

CPC classification number: H01L33/62 ,  G01R31/2635 ,  H01L22/14 ,  H01L22/32 ,  H01L23/481 ,  H01L24/95 ,  H01L25/0753 ,  H01L33/0095 ,  H01L33/385 ,  H01L33/405 ,  H01L2224/81

Abstract: Disclosed herein are technologies for forming a plurality of known good die (KGD)-light emitting diode (LED) components into a larger size optically coherent LED chips or devices. This Abstract is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims

公开(公告)号：US09691702B2

公开(公告)日：2017-06-27

申请号：US15200554

申请日：2016-07-01

Applicant: Invensas Corporation

Inventor： Cyprian Emeka Uzoh ,  Charles G. Woychik ,  Arkalgud R. Sitaram ,  Hong Shen ,  Zhuowen Sun ,  Liang Wang ,  Guilian Gao

IPC: H01L23/04 ,  H01L23/52 ,  H01L21/44 ,  H01L23/522 ,  H01L49/02 ,  H01L21/768 ,  H01L21/8234

CPC classification number: H01L23/5223 ,  H01L21/76802 ,  H01L21/76877 ,  H01L21/823431 ,  H01L21/823475 ,  H01L23/5226 ,  H01L28/60 ,  H01L2924/0002 ,  H01L2924/00

Abstract: In a microelectronic component having conductive vias (114) passing through a substrate (104) and protruding above the substrate, conductive features (120E.A, 120E.B) are provided above the substrate that wrap around the conductive vias' protrusions (114′) to form capacitors, electromagnetic shields, and possibly other elements. Other features and embodiments are also provided.

公开(公告)号：US09673124B2

公开(公告)日：2017-06-06

申请号：US15151176

申请日：2016-05-10

Applicant: Invensas Corporation

Inventor： Liang Wang ,  Rajesh Katkar ,  Charles G. Woychik ,  Cyprian Emeka Uzoh

IPC: H01L23/31 ,  H01L21/56 ,  H01L25/065 ,  H01L25/00 ,  H01L23/13 ,  H01L21/48 ,  H01L21/52 ,  H01L21/54 ,  H01L23/498

CPC classification number: H01L23/3178 ,  H01L21/4853 ,  H01L21/52 ,  H01L21/54 ,  H01L21/563 ,  H01L23/13 ,  H01L23/3157 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/49838 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/26175 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/92125 ,  H01L2225/06517 ,  H01L2225/06555 ,  H01L2225/06593 ,  H01L2924/15153 ,  H01L2924/15156 ,  H01L2924/014

Abstract: A device and method for localizing underfill includes a substrate, a plurality of dies, and underfill material. The substrate includes a plurality of contacts and a plurality of cavities separated by a plurality of mesas. The plurality of dies is mounted to the substrate using the plurality of contacts. The underfill material is located between the substrate and the dies. The underfill material is localized into a plurality of regions using the mesas. Each of the contacts is located in a respective one of the cavities. In some embodiments, the substrate further includes a plurality of channels interconnecting the cavities. In some embodiments, the substrate further includes a plurality of intra-cavity mesas for further localizing the underfill material. In some embodiments, outer edges of a first one of the dies rest on first mesas located on edges of a first one of the cavities.

公开(公告)号：US09620436B2

公开(公告)日：2017-04-11

申请号：US14338327

申请日：2014-07-22

Applicant: Invensas Corporation

Inventor： Liang Wang ,  Eric Tosaya

IPC: H01L33/00 ,  H01L23/48 ,  H01L23/00 ,  G01R31/26 ,  H01L25/075

CPC classification number: H01L33/62 ,  G01R31/2635 ,  H01L22/14 ,  H01L22/32 ,  H01L23/481 ,  H01L24/95 ,  H01L25/0753 ,  H01L33/0095 ,  H01L33/385 ,  H01L33/405 ,  H01L2224/81

Abstract: Disclosed herein are technologies for forming a plurality of known good die (KGD)-light emitting diode (LED) components into a larger size optically coherent LED chips or devices. This Abstract is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.