公开(公告)号：US20080277152A1

公开(公告)日：2008-11-13

申请号：US11665561

申请日：2005-12-02

Applicant: Masaki Watanabe

Inventor： Masaki Watanabe

IPC: H05K1/11 ,  G06F17/50 ,  H05K3/34

CPC classification number: H05K3/3452 ,  H01L2224/16225 ,  H05K1/114 ,  H05K3/0005 ,  H05K3/3436 ,  H05K3/3484 ,  H05K3/429 ,  H05K2201/09036 ,  H05K2201/09845 ,  H05K2201/099 ,  H05K2201/09909 ,  H05K2201/10734 ,  H05K2203/0588 ,  Y10T29/49144

Abstract: The invention provides a printed circuit board capable of mounting BGA or other IC package of narrow terminal interval by using through-holes of conventional size. On one principal surface of printed circuit board (1), soldering lands (2a), (2b), (2c), and (2d) for connecting solder balls are disposed in lattice. Central point (B) of through-hole (3) is set eccentric to the side of soldering land (2a) at the same potential as through-hole (3), remote from intersection (A) formed by diagonal line (200ab) linking soldering lands (2a) and (2b) and diagonal line (200cd) linking soldering lands (2c) and (2d).

Abstract translation: 本发明提供一种能够通过使用常规尺寸的通孔来安装窄端子间隔的BGA或其它IC封装的印刷电路板。 在印刷电路板（1）的一个主表面上，格栅地布置用于连接焊球的焊台（2a），（2b），（2c）和（2d）。 通孔（3）的中心点（B）以与通孔（3）相同的电位偏心于焊接区域（2a）的一侧，远离由对角线（200bb）形成的交叉点（A） ）连接焊接焊盘（2a）和（2b）和连接焊接焊盘（2c）和（2d）的对角线（200cd）。

公开(公告)号：US20080275527A1

公开(公告)日：2008-11-06

申请号：US11924696

申请日：2007-10-26

Applicant: Robert J. Greenberg ,  Matthew J. McMahon ,  James Singleton Little ,  Kelly H. McClure ,  Brian V. Mech ,  Neil Hamilton Talbot ,  Jordan M. Neysmith

Inventor： Robert J. Greenberg ,  Matthew J. McMahon ,  James Singleton Little ,  Kelly H. McClure ,  Brian V. Mech ,  Neil Hamilton Talbot ,  Jordan M. Neysmith

IPC: A61N1/00

CPC classification number: A61N1/36046 ,  A61N1/0543 ,  A61N1/37223 ,  H05K1/028 ,  H05K1/0281 ,  H05K1/118 ,  H05K3/0014 ,  H05K3/28 ,  H05K2201/0133 ,  H05K2201/09018 ,  H05K2201/09145 ,  H05K2201/09909 ,  H05K2201/2009 ,  H05K2203/1105 ,  H05K2203/1476 ,  H05K2203/302 ,  Y10T29/49158

Abstract: Polymer materials are useful as electrode array bodies for neural stimulation. They are particularly useful for retinal stimulation to create artificial vision, cochlear stimulation to create artificial hearing, and cortical stimulation, and many related purposes. The pressure applied against the retina, or other neural tissue, by an electrode array is critical. Too little pressure causes increased electrical resistance, along with electric field dispersion. Too much pressure may block blood flow. Common flexible circuit fabrication techniques generally require that a flexible circuit electrode array be made flat. Since neural tissue is almost never flat, a flat array will necessarily apply uneven pressure. Further, the edges of a flexible circuit polymer array may be sharp and cut the delicate neural tissue. By applying the right amount of heat to a completed array, a curve can be induced. With a thermoplastic polymer it may be further advantageous to repeatedly heat the flexible circuit in multiple molds, each with a decreasing radius. Further, it is advantageous to add material along the edges. It is further advantageous to provide a fold or twist in the flexible circuit array. Additional material may be added inside and outside the fold to promote a good seal with tissue.

Abstract translation: 聚合物材料可用作用于神经刺激的电极阵列体。 它们特别有用于视网膜刺激以产生人造视觉，耳蜗刺激以产生人造听觉和皮质刺激以及许多相关目的。 通过电极阵列对视网膜或其他神经组织施加的压力是至关重要的。 太小的压力会导致电阻增加以及电场分散。 太大的压力可能会阻止血液流动。 通常的柔性电路制造技术通常需要使柔性电路电极阵列平坦。 由于神经组织几乎从不平坦，平面阵列必然会施加不均匀的压力。 此外，柔性电路聚合物阵列的边缘可以是尖锐的并切割精细的神经组织。 通过将适量的热应用于完整的阵列，可以引起曲线。 对于热塑性聚合物，可以进一步有利的是在多个模具中反复加热柔性电路，每个模具具有减小的半径。 此外，沿着边缘添加材料是有利的。 在柔性电路阵列中提供折叠或扭曲是更有利的。 可以在折叠内部和外部添加附加材料以促进与组织的良好密封。

公开(公告)号：US20080203564A1

公开(公告)日：2008-08-28

申请号：US12068438

申请日：2008-02-06

Applicant: Souichirou Motoyoshi ,  Hirokazu Honda

Inventor： Souichirou Motoyoshi ,  Hirokazu Honda

IPC: H01L23/488 ,  H01L21/56 ,  H05K1/00

CPC classification number: H05K1/0271 ,  H01L21/563 ,  H01L23/3107 ,  H01L23/562 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/0554 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/16225 ,  H01L2224/26175 ,  H01L2224/27013 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/83051 ,  H01L2224/83192 ,  H01L2224/83194 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01088 ,  H01L2924/18301 ,  H05K3/305 ,  H05K2201/09909 ,  H05K2201/10674 ,  H05K2201/10977 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/3512 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A semiconductor device has a wiring substrate, a semiconductor chip, a conductive bump, and an under-fill resin. The wiring substrate has a solder resist layer, and a stress alleviating portion. The stress alleviating portion is mounted on the solder resist layer opposed to the outer circumference of the semiconductor chip. The material of the stress alleviating portion is different from that of the solder resist layer. The stress alleviating portion alleviates the stress acting on the solder resist layer and the under-fill resin. The semiconductor chip is mounted above the wiring substrate via the conductive bump. The gap between the wiring substrate and the semiconductor chip is filled with the under-fill resin.

Abstract translation: 半导体器件具有布线基板，半导体芯片，导电凸块和欠填充树脂。 布线基板具有阻焊层和应力减轻部。 应力减轻部安装在与半导体芯片的外周相对的阻焊层上。 应力缓解部的材料与阻焊层的材质不同。 应力减轻部分减轻作用在阻焊层和未填充树脂上的应力。 半导体芯片通过导电凸块安装在布线基板上。 配线基板和半导体芯片之间的间隙填充有未填充树脂。

公开(公告)号：US20080158470A1

公开(公告)日：2008-07-03

申请号：US11949138

申请日：2007-12-03

Applicant: Jaemo Chung ,  Sunghwan Kim ,  Jinhee Sung

Inventor： Jaemo Chung ,  Sunghwan Kim ,  Jinhee Sung

IPC: G02F1/1333 ,  H05K1/05 ,  H05K1/02

CPC classification number: H05K1/0274 ,  G02F1/133615 ,  G02F1/13452 ,  H05K1/189 ,  H05K3/28 ,  H05K2201/0112 ,  H05K2201/09909 ,  H05K2201/10106 ,  H05K2201/10522

Abstract: A flexible circuit board and a liquid crystal display having the same prevents emission of light from a light source to peripheral undesired areas, and firmly connects the board to a mold frame. The board includes a first insulating film, conductive patterns formed on the first insulating film, a second insulating film formed on the first insulating film to cover the conductive patterns, a light source coupled to the conductive patterns, and a light absorbing layer formed on the outer circumference of the light source to absorb light from the light source. Also, a mold frame includes an outer frame, an inner frame, and a guide boss. The board is connected to the mold frame, the light guide plate is connected to the mold frame and optically coupled to the board, and the liquid crystal display panel is placed on the light guide plate and coupled to the board.

Abstract translation: 柔性电路板和具有该柔性电路板的液晶显示器防止光从光源发射到外围不期望的区域，并将该板牢固地连接到模架上。 板包括第一绝缘膜，形成在第一绝缘膜上的导电图案，形成在第一绝缘膜上以覆盖导电图案的第二绝缘膜，耦合到导电图案的光源和形成在第一绝缘膜上的光吸收层 光源的外周以吸收来自光源的光。 此外，模框包括外框架，内框架和导向凸台。 该板与模架连接，导光板连接到模架上，光耦合到板上，液晶显示面板放置在导光板上，并与板相连。

公开(公告)号：US07381903B2

公开(公告)日：2008-06-03

申请号：US11208884

申请日：2005-08-23

Applicant: Kunihiko Azeyanagi ,  Hideya Yoshikawa ,  Hiroaki Inose

Inventor： Kunihiko Azeyanagi ,  Hideya Yoshikawa ,  Hiroaki Inose

IPC: H05K1/00 ,  H05K1/09

CPC classification number: H05K1/0268 ,  H05K1/0218 ,  H05K3/28 ,  H05K2201/0715 ,  H05K2201/09781 ,  H05K2201/09909 ,  H05K2203/163 ,  H05K2203/166

Abstract: It is an object of the present invention to provide a printed circuit board and an inspection method therefor capable of electrically inspecting misregistration of a solder resist and a display by silk printing with respect to a wiring pattern on a printed circuit board. The present invention provides a printed circuit board provided with a conductive layer for electromagnetic shielding including at least two targets 11, 12 formed as conductive patterns of the same shape on the printed circuit board, insulating layers 21, 22, 23, 4 greater than the targets and analogous to the targets provided in such a way as to be overlaid on the targets and an electromagnetic shielding layer 3 provided on the insulating layers, and an inspection method using the printed circuit board.

Abstract translation: 本发明的一个目的是提供一种印刷电路板及其检查方法，该印刷电路板及其检查方法能够相对于印刷电路板上的布线图案，通过丝印印刷电阻检测阻焊剂和显示器的不对齐。 本发明提供了一种印刷电路板，其具有用于电磁屏蔽的导电层，其包括在印刷电路板上形成为相同形状的导电图案的至少两个靶11,12，绝缘层21,22,23,4大于 目标，并且类似于以覆盖在目标上的方式提供的目标和设置在绝缘层上的电磁屏蔽层3，以及使用该印刷电路板的检查方法。

公开(公告)号：US07377032B2

公开(公告)日：2008-05-27

申请号：US10991921

申请日：2004-11-18

Applicant: Shinichi Sumi ,  Yutaka Iguchi

Inventor： Shinichi Sumi ,  Yutaka Iguchi

IPC: H05K3/02

CPC classification number: H05K3/4069 ,  H05K1/113 ,  H05K3/246 ,  H05K2201/0347 ,  H05K2201/0394 ,  H05K2201/09909 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T29/53548

Abstract: A printed wiring board for mounting electronic components includes an insulating layer and a wiring pattern formed on one surface of the insulating layer, wherein one end portion of a filled via 4 is connected with the wiring pattern and the other end portion is overlaid with a covering layer 9 obtained by applying a conductive paste to cover at least the boundary between the filled via 4 and the insulating layer 2; alternatively, a plating resist 7 is formed at the other end portion to cover at least the boundary between the filled via 4 and the insulating layer 2, and is removed after an end portion of the filled via 4 enclosed within the plating resist 7 is plated to produce a terminal layer, thereby preventing a wet processing liquid such as a tin plating solution from leaking in between the filled via 4 and the insulating layer 2.

Abstract translation: 一种用于安装电子部件的印刷线路板包括绝缘层和形成在绝缘层的一个表面上的布线图案，其中填充的通孔4的一个端部与布线图案连接，另一个端部覆盖有覆盖层 通过施加导电浆料至少覆盖填充的通孔4和绝缘层2之间的边界获得的层9; 可选地，在另一端部形成电镀抗蚀剂7，以至少覆盖填充的通孔4和绝缘层2之间的边界，并且在封装在电镀抗蚀剂7中的填充通孔4的端部被电镀之后被去除 以制造端子层，从而防止诸如镀锡溶液之类的湿处理液体在填充的通孔4和绝缘层2之间泄漏。

公开(公告)号：US07365008B2

公开(公告)日：2008-04-29

申请号：US11508885

申请日：2006-08-24

Applicant: Toshimitsu Hirai ,  Toshiaki Mikoshiba

Inventor： Toshimitsu Hirai ,  Toshiaki Mikoshiba

IPC: H01L21/44

CPC classification number: H01L29/66765 ,  H01L21/4867 ,  H01L21/76838 ,  H01L27/12 ,  H01L27/1292 ,  H01L27/3295 ,  H01L29/41733 ,  H01L29/78669 ,  H01L51/0005 ,  H01L51/0022 ,  H01L51/56 ,  H05K3/125 ,  H05K2201/09727 ,  H05K2201/09909 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49155

Abstract: A method of forming a predetermined pattern by disposing a functional liquid on a substrate, the method includes the steps of forming banks on the substrate, and disposing the functional liquid on a region divided by the banks, wherein a width of the region is partially formed so as to be large.

Abstract translation: 一种通过在基板上配置功能性液体而形成规定图案的方法，其特征在于，在基板上形成堤，并将该功能液配置在由堤部分割的区域上，其中，部分宽度形成 以便大。

公开(公告)号：US07364999B2

公开(公告)日：2008-04-29

申请号：US11051257

申请日：2005-02-04

Applicant: Ioannis Dotsikas

Inventor： Ioannis Dotsikas

IPC: H01L21/488

CPC classification number: H05K3/4007 ,  H01L21/4853 ,  H01L23/49811 ,  H01L24/81 ,  H01L24/90 ,  H01L2224/81192 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/90 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H05K1/111 ,  H05K2201/0133 ,  H05K2201/0367 ,  H05K2201/09909 ,  H05K2201/10674 ,  Y02P70/611

Abstract: A semiconductor component includes a substrate having a plurality of compliant contact bumps formed over a surface thereof. A semiconductor chip has a plurality of contact regions formed over a surface thereof. The compliant contact bumps of the substrate are electrically connected with the contact regions of the semiconductor chip and wherein the semiconductor chip is mechanically attached to the substrate. As an example, this connection and attachment can be achieved by soldering the contact bumps to the contact regions.

Abstract translation: 半导体部件包括在其表面上形成有多个柔性接触凸块的基板。 半导体芯片具有在其表面上形成的多个接触区域。 衬底的柔性接触凸块与半导体芯片的接触区域电连接，并且其中半导体芯片机械地附接到衬底。 作为示例，可以通过将接触凸块焊接到接触区域来实现该连接和附接。

公开(公告)号：US20080005897A1

公开(公告)日：2008-01-10

申请号：US11822202

申请日：2007-07-03

Applicant: Futoshi Nakanishi

Inventor： Futoshi Nakanishi

IPC: H05K3/00 ,  H01L23/02 ,  H05K1/00

CPC classification number: H05K3/361 ,  G02F1/13452 ,  H01L23/4985 ,  H01L2924/0002 ,  H01L2924/12044 ,  H05K3/323 ,  H05K2201/09781 ,  H05K2201/09909 ,  Y10T29/49124 ,  H01L2924/00

Abstract: A flexible wiring sheet operable to electrically connect with an electronic apparatus includes a flexible sheet, a wiring line formed on the flexible sheet, an electric terminal which connects with the wiring line, the electric terminal being operable to electrically connects with the electronic apparatus, and an island-shaped resin which is formed in an area of the flexible sheet. The area of the flexible sheet overlaps with the electronic apparatus when the flexible sheet electrically connects with the electronic apparatus.

Abstract translation: 可操作地与电子设备电连接的柔性布线板包括柔性片，形成在柔性片上的布线，与布线连接的电端子，电端子可与电子设备电连接，以及 形成在柔性片的区域中的岛状树脂。 当柔性片与电子设备电连接时，柔性片的区域与电子设备重叠。

公开(公告)号：US20080000874A1

公开(公告)日：2008-01-03

申请号：US11822200

申请日：2007-07-03

Applicant: Takahiro Nakano

Inventor： Takahiro Nakano

IPC: H01B13/00

CPC classification number: H05K1/0271 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L2924/0002 ,  H05K1/0206 ,  H05K3/3452 ,  H05K3/429 ,  H05K3/4652 ,  H05K2201/068 ,  H05K2201/09781 ,  H05K2201/0989 ,  H05K2201/09909 ,  H05K2203/0588 ,  H01L2924/00

Abstract: A multilayer printed wiring board (1) in which conductor wiring layers (12, 14a, 14b) and interlayer insulating resin layers (13) are alternately stacked on both sides of a core substrate (11) and the outermost conductor wiring layer is covered with a surface insulating resin layer (16), wherein in a mounting area (10) of a semiconductor device, the surface insulating resin layer (16) formed on the interlayer insulating resin layer (13) is removed like a quadrilateral in an area other than the conductor lands (14a) and immediately below the semiconductor device to leave a removed portion (17) at the center of the mounting area (10), the conductor lands (14a) being bonded to external electrodes of the semiconductor device.

Abstract translation: 其中导体布线层（12,14a，14b）和层间绝缘树脂层（13）在芯基板（11）的两侧和最外面的导体布线层交替堆叠的多层印刷布线板（1）是 覆盖有表面绝缘树脂层（16），其中在半导体器件的安装区域（10）中，形成在层间绝缘树脂层（13）上的表面绝缘树脂层（16）在区域中被排除成四边形 除了导体焊盘（14a）和半导体器件正下方以在安装区域（10）的中心离开去除部分（17）之外，导体焊盘（14a）接合到半导体器件的外部电极 。