Electrodeposition systems and methods that minimize anode and/or plating solution degradation

    公开(公告)号:US10041183B2

    公开(公告)日:2018-08-07

    申请号:US15482938

    申请日:2017-04-10

    Abstract: Disclosed are electrodeposition systems and methods wherein at least three electrodes are placed in a container containing a plating solution. The electrodes are connected to a polarity-switching unit and include a first electrode, a second electrode and a third electrode. The polarity-switching unit establishes a constant polarity state between the first and second electrodes in the solution during an active plating mode, wherein the first electrode has a negative polarity and the second electrode has a positive polarity, thereby allowing a plated layer to form on a workpiece at the first electrode. The polarity-switching unit further establishes an oscillating polarity state between the second and third electrodes during a non-plating mode (i.e., when the first electrode is removed from the plating solution), wherein the second electrode and the third electrode have opposite polarities that switch at regular, relatively fast, intervals, thereby limiting degradation of the second electrode and/or the plating solution.

    ELECTRODEPOSITION SYSTEMS AND METHODS THAT MINIMIZE ANODE AND/OR PLATING SOLUTION DEGRADATION

    公开(公告)号:US20170211199A1

    公开(公告)日:2017-07-27

    申请号:US15482938

    申请日:2017-04-10

    CPC classification number: C25D5/18 C25D17/10 C25D21/12

    Abstract: Disclosed are electrodeposition systems and methods wherein at least three electrodes are placed in a container containing a plating solution. The electrodes are connected to a polarity-switching unit and include a first electrode, a second electrode and a third electrode. The polarity-switching unit establishes a constant polarity state between the first and second electrodes in the solution during an active plating mode, wherein the first electrode has a negative polarity and the second electrode has a positive polarity, thereby allowing a plated layer to form on a workpiece at the first electrode. The polarity-switching unit further establishes an oscillating polarity state between the second and third electrodes during a non-plating mode (i.e., when the first electrode is removed from the plating solution), wherein the second electrode and the third electrode have opposite polarities that switch at regular, relatively fast, intervals, thereby limiting degradation of the second electrode and/or the plating solution.

    Electrodeposition systems and methods that minimize anode and/or plating solution degradation

    公开(公告)号:US09689084B2

    公开(公告)日:2017-06-27

    申请号:US14284932

    申请日:2014-05-22

    CPC classification number: C25D5/18 C25D17/10 C25D21/12

    Abstract: Disclosed are electrodeposition systems and methods wherein at least three electrodes are placed in a container containing a plating solution. The electrodes are connected to a polarity-switching unit and include a first electrode, a second electrode and a third electrode. The polarity-switching unit establishes a constant polarity state between the first and second electrodes in the solution during an active plating mode, wherein the first electrode has a negative polarity and the second electrode has a positive polarity, thereby allowing a plated layer to form on a workpiece at the first electrode. The polarity-switching unit further establishes an oscillating polarity state between the second and third electrodes during a non-plating mode (i.e., when the first electrode is removed from the plating solution), wherein the second electrode and the third electrode have opposite polarities that switch at regular, relatively fast, intervals, thereby limiting degradation of the second electrode and/or the plating solution.

    FAN-OUT CIRCUIT PACKAGING WITH INTEGRATED LID

    公开(公告)号:US20180166356A1

    公开(公告)日:2018-06-14

    申请号:US15377496

    申请日:2016-12-13

    Abstract: Various embodiments include integrated circuit (IC) package structures. In some cases, an IC package includes: a carrier having a recess; a plurality of IC chips coupled with the carrier inside the recess, the plurality of IC chips each including a plurality of connectors; a thermally conductive material between the plurality of IC chips and the carrier within the recess, the thermally conductive material coupling the plurality of IC chips with the carrier; a dielectric layer contacting the plurality of IC chips and the carrier; a redistribution layer (RDL) contacting the dielectric layer and the plurality of connectors, the RDL including a plurality of fan-out vias extending from the plurality of connectors and at least one connector coupling adjacent IC chips in the plurality of IC chips; and a set of solder balls contacting the RDL and connected with the plurality of fan-out vias.

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