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公开(公告)号：US20160100484A1
公开(公告)日：2016-04-07
申请号：US14874606
申请日：2015-10-05
Applicant: IBIDEN CO., LTD.
Inventor： Masatoshi KUNIEDA , Katsuhiko TANNO
CPC classification number: H05K3/4007 , H01L23/13 , H01L23/49811 , H01L23/5383 , H01L23/5384 , H01L23/5385 , H01L24/00 , H01L25/0655 , H01L25/105 , H01L2224/16227 , H01L2224/48091 , H01L2224/48227 , H01L2225/1023 , H01L2225/1058 , H01L2924/00014 , H01L2924/15153 , H01L2924/15311 , H01L2924/15313 , H05K2201/0367 , H05K2201/09563 , H05K2203/043 , H01L2224/45099
Abstract: A printed wiring board includes a base insulating layer including an insulating material, a conductor layer formed on the base insulating layer and including conductor pads, a coating insulating layer formed on the base insulating layer such that the coating insulating layer is covering the conductor layer and having opening portions exposing the conductor pads, respectively, and bumps formed on the conductor pads respectively such that each of the bumps includes an electroless plating metal layer formed on a respective one of the conductor pads and a solder layer formed on the electroless plating metal layer, the electroless plating metal layer having an upper end surface formed such that a central portion of the upper end surface is recessed relative to a peripheral portion of the upper end surface.
Abstract translation: 印刷电路板包括：绝缘层，包括绝缘材料的基底绝缘层，形成在基底绝缘层上的导体层，并且包括导体焊盘;涂覆绝缘层，形成在基底绝缘层上，使得覆盖绝缘层覆盖导体层; 具有分别暴露导体焊盘的开口部分和形成在导体焊盘上的凸起，使得每个凸起包括形成在相应的一个导体焊盘上的无电电镀金属层和形成在化学镀金属层上的焊料层 所述无电镀金属层的上端面形成为使得所述上端面的中央部相对于所述上端面的周边部凹陷。
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公开(公告)号：US20150136459A1
公开(公告)日：2015-05-21
申请号：US14549951
申请日：2014-11-21
Applicant: IBIDEN Co., Ltd.
Inventor： Masatoshi KUNIEDA , Makoto Terui , Ryoujiro Tominaga , Takashi Kariya
CPC classification number: H05K3/4682 , H01L2224/16227 , H05K1/0256 , H05K1/0265 , H05K1/09 , H05K1/112 , H05K1/113 , H05K1/114 , H05K1/185 , H05K3/243 , H05K3/244 , H05K3/3436 , H05K2201/0352 , H05K2201/0391 , H05K2201/0761 , H05K2201/0769 , H05K2201/094 , H05K2201/09736 , H05K2201/0989 , H05K2201/10015 , H05K2201/10636 , H05K2201/10674 , H05K2201/2081 , H05K2203/1394 , Y02P70/611 , Y10T29/49155
Abstract: A wiring board includes a first resin insulating layer, conductor pads on the first insulating layer including first and second conductor pads, a second resin insulating layer on the first insulating layer covering the first and second pads, an outermost conductor layer on the second insulating layer including first and second outermost wiring layers, via conductors through the second insulating layer including a first via conductor connecting the first wiring layer and first pad and a second via conductor connecting the second wiring layer and second pad, and a solder resist layer on the second insulating layer such that the solder resist layer is covering the first wiring layer and has one or more openings exposing the second wiring layer. The first wiring layer includes first main metal, and the second wiring layer includes second main metal which is different from the first metal of the first wiring layer.
Abstract translation: 布线基板包括第一树脂绝缘层，第一绝缘层上包括第一和第二导体焊盘的导体焊盘，覆盖第一和第二焊盘的第一绝缘层上的第二树脂绝缘层，第二绝缘层上的最外层导体层 包括第一和第二最外面布线层，通过第二绝缘层的通孔导体包括连接第一布线层和第一焊盘的第一通孔导体和连接第二布线层和第二焊盘的第二通孔导体，以及在第二绝缘层上的阻焊层 绝缘层，使得阻焊层覆盖第一布线层并且具有暴露第二布线层的一个或多个开口。 第一布线层包括第一主金属，第二布线层包括与第一布线层的第一金属不同的第二主金属。
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公开(公告)号：US20140360767A1
公开(公告)日：2014-12-11
申请号：US14294588
申请日：2014-06-03
Applicant: IBIDEN CO., LTD.
Inventor： Makoto TERUI , Masatoshi KUNIEDA , Yoshinori SHIZUNO , Asuka Il
CPC classification number: H01L24/19 , H01L23/49816 , H01L23/5381 , H01L23/5383 , H01L23/5384 , H01L23/5385 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/12042 , H05K3/4688 , H05K2201/0187 , H05K2201/09136 , H05K2201/10159 , H01L2924/00
Abstract: A wiring board includes a first insulation layer, first conductive patterns formed on the first insulation layer and including first mounting pads positioned to mount a semiconductor element, a wiring structure positioned in the first insulation layer and including a second insulation layer, second conductive patterns formed on the second insulation layer, and second mounting pads connected to the second conductive patterns, and third mounting pads formed on the first insulation layer above the second mounting pads and connected to the second mounting pads such that the third mounting pads are positioned to mount the semiconductor element and are set off from the second mounting pads toward the semiconductor element.
Abstract translation: 布线板包括第一绝缘层，形成在第一绝缘层上的第一导电图案，并且包括定位成安装半导体元件的第一安装焊盘，位于第一绝缘层中并包括第二绝缘层的布线结构，形成第二导电图案 在第二绝缘层上，以及连接到第二导电图案的第二安装焊盘以及形成在第二安装焊盘上方的第一绝缘层上并连接到第二安装焊盘的第三安装焊盘，使得第三安装焊盘被定位成安装 半导体元件并且从第二安装焊盘朝向半导体元件脱离。
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4.发明申请公开(公告)号：US20140284820A1
公开(公告)日：2014-09-25
申请号：US14295528
申请日：2014-06-04
Applicant: IBIDEN CO., LTD.
Inventor： Toshiki FURUTANI , Daiki KOMATSU , Masatoshi KUNIEDA , Naomi FUJITA , Nobuya TAKAHASHI
CPC classification number: H05K1/113 , H01L21/4857 , H01L21/568 , H01L23/147 , H01L23/28 , H01L23/3128 , H01L23/49822 , H01L23/562 , H01L24/82 , H01L2224/131 , H01L2224/16225 , H01L2224/16227 , H01L2224/32225 , H01L2224/73204 , H01L2224/81005 , H01L2224/81192 , H01L2924/00013 , H01L2924/12042 , H01L2924/15311 , H01L2924/181 , H01L2924/18161 , H01L2924/351 , H05K1/0298 , H01L2224/13099 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2924/014 , H01L2924/00012 , H01L2924/00
Abstract: A substrate for mounting a semiconductor includes a first insulation layer having first and second surfaces on the opposite sides and having a penetrating hole penetrating through the first insulation layer, an electrode formed in the penetrating hole in the first insulation layer and having a protruding portion protruding from the second surface of the first insulation layer, a first conductive pattern formed on the first surface of the first insulation layer and connected to the electrode, a second insulation layer formed on the first surface of the first insulation layer and the first conductive pattern and having a penetrating hole penetrating through the second insulating layer, a second conductive pattern formed on the second insulation layer and for mounting a semiconductor element, and a via conductor formed in the penetrating hole in the second insulation layer and connecting the first and second conductive patterns.
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公开(公告)号：US20190232218A1
公开(公告)日：2019-08-01
申请号：US16260495
申请日：2019-01-29
Applicant: IBIDEN CO., LTD.
Inventor： Masatoshi KUNIEDA , Hirokazu HIGASHI , Tatsuhiro KAWAI
CPC classification number: B01D53/228 , B01D69/06 , B01D69/12 , B01D2325/02 , B01D2325/06 , B01D2325/08 , B01D2325/44
Abstract: A filter membrane includes a membrane having through holes that selectively separates specific material in processing medium, the membrane including first, second and third layers such that the first layer has first surface that is supplied with processing medium, the third layer has second surface on the opposite side of the first surface, and the second layer is formed between the first and third layers. The first layer includes first convex and concave portions, the third layer includes second convex and concave portions each having a larger area than each first concave portion, the second convex portions are formed to surround the second concave portions and connected to one another, the second layer has through holes connecting the second concave portions and first set of the first concave portions, and the first concave portions include second set in regions opposing the second convex portions that is connected to each other.
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Patent Agency Ranking
6.发明申请公开(公告)号：US20140311780A1
公开(公告)日：2014-10-23
申请号：US14259522
申请日：2014-04-23
Applicant: IBIDEN CO., LTD.
Inventor： Yoshinori SHIZUNO , Makoto TERUI , Masatoshi KUNIEDA , Asuka Il
CPC classification number: H05K1/0269 , H05K3/4644 , H05K2201/09918 , H05K2203/166
Abstract: An electronic component includes an insulation layer, an alignment mark positioned on a first surface of the insulation layer, and an adhesive layer including an optically opaque agent and formed on the first surface of the insulation layer or a second surface of the insulation layer on the opposite side with respect to the first surface of the insulation layer. The adhesive layer has an opening portion formed at the position corresponding to the alignment mark such that the opening portion exposes the alignment mark directly or through the insulation layer.
Abstract translation: 电子部件包括绝缘层，定位在绝缘层的第一表面上的对准标记，以及包含光不透明剂的粘合剂层，形成在绝缘层的第一表面或绝缘层的第二表面上 相对于绝缘层的第一表面的相对侧。 粘合剂层具有形成在与对准标记对应的位置处的开口部分，使得开口部分直接或通过绝缘层露出对准标记。
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公开(公告)号：US20240255695A1
公开(公告)日：2024-08-01
申请号：US18632346
申请日：2024-04-11
Applicant: IBIDEN CO., LTD.
Inventor： Masatoshi KUNIEDA
IPC: G02B6/12 , H01L23/00 , H01L23/538 , H01L25/16
CPC classification number: G02B6/12004 , H01L23/5386 , H01L24/13 , H01L24/16 , H01L24/05 , H01L24/11 , H01L25/167 , H01L2224/0557 , H01L2224/11462 , H01L2224/13082 , H01L2224/13111 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/16227
Abstract: A wiring substrate includes an insulating layer, a conductor pad that is formed on a surface of the insulating layer and is connected to a component such that the insulating layer has a component region that is covered by the component connected to the conductor pad, and an optical waveguide including a core part that transmits light and is positioned on an outer side of the component region of the insulating layer such that the core part has an end surface exposed and facing a component region side. The optical waveguide is positioned such that the end surface of the core part is adjacent to the component region.
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公开(公告)号：US20230007768A1
公开(公告)日：2023-01-05
申请号：US17809352
申请日：2022-06-28
Applicant: IBIDEN CO., LTD.
Inventor： Masatoshi KUNIEDA
Abstract: A wiring substrate includes an insulating layer, a conductor layer formed on a surface of the insulating layer and including a conductor pad, a covering layer formed on the insulating layer and covering a portion of the insulating layer, an optical waveguide positioned on the surface of the insulating layer and including a core part, and a conductor post including plating metal and formed on the conductor pad such that the conductor post is penetrating through the covering layer and connected to a component. The insulating layer has a component region covered by the component when the component is connected to the conductor post, the core part has an end surface facing the opposite direction with respect to the insulating layer and exposed in the component region and a distance between the end surface and the surface of the insulating layer is greater than a thickness of the covering layer.
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公开(公告)号：US20160268188A1
公开(公告)日：2016-09-15
申请号：US15055921
申请日：2016-02-29
Applicant: IBIDEN CO., LTD.
Inventor： Takashi KARIYA , Shigeru YAMADA , Masatoshi KUNIEDA
IPC: H01L23/498 , H01L23/31
CPC classification number: H01L23/3121 , H01L23/49811 , H01L23/5389 , H01L2224/16225 , H01L2924/181 , H01L2924/00012
Abstract: A printed wiring board for package-on-package includes a first insulating layer, a wiring layer including a conductor pattern and formed on first surface of the first insulating layer, a second insulating layer formed on first surface side of the first insulating layer, electrodes formed in through holes of the first insulating layer respectively such that the electrodes electrically connect to the conductor pattern and have exposed surfaces exposed from second surface of the first insulating layer, first pads formed on the second insulating layer and positioned to connect an IC chip in center portion of the second insulating layer, second pads formed on the second insulating layer and positioned in outer edge portion of the second insulating layer to connect a second printed wiring board, and via conductors formed in the second insulating layer such that the via conductors electrically connect the first and second pads to the conductor pattern.
Abstract translation: 一种用于封装封装的印刷线路板包括：第一绝缘层，包括导体图案的布线层，并形成在第一绝缘层的第一表面上;第二绝缘层，形成在第一绝缘层的第一表面侧;电极 分别形成在第一绝缘层的通孔中，使得电极电连接到导体图案，并且具有从第一绝缘层的第二表面露出的暴露表面，形成在第二绝缘层上的第一焊盘并且定位成将IC芯片 所述第二绝缘层的中心部分，形成在所述第二绝缘层上并位于所述第二绝缘层的外边缘部分中以连接第二印刷线路板的第二焊盘，以及形成在所述第二绝缘层中的通孔导体， 将第一和第二焊盘连接到导体图案。
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公开(公告)号：US20150060124A1
公开(公告)日：2015-03-05
申请号：US14473235
申请日：2014-08-29
Applicant: IBIDEN CO., LTD.
Inventor： Makoto TERUI , Takashi KARIYA , Yoshinori SHIZUNO , Masatoshi KUNIEDA
CPC classification number: H05K1/111 , H01L23/5383 , H01L23/5384 , H01L23/5385 , H01L25/0655 , H01L25/18 , H01L2224/0401 , H01L2224/16227 , H01L2224/1703 , H01L2924/15313 , H05K1/141 , H05K1/181 , H05K3/3436 , H05K3/429 , H05K3/4644 , H05K2201/041 , H05K2201/094 , H05K2201/09472 , H05K2201/09827 , H05K2201/10159 , H05K2201/10674 , H05K2203/0465 , Y02P70/611 , Y10T29/49128
Abstract: A combined printed wiring board includes a multilayer printed wiring board having an outermost insulation layer, and a wiring film fixed to a portion of the outermost insulation layer of the multilayer printed wiring board. The wiring film includes dense-pitch pads formed on a semiconductor-mounting surface of the wiring film, the multilayer printed wiring board has sparse-pitch pads formed on a semiconductor-mounting surface of the multilayer printed wiring board, the dense-pitch pads are formed to facilitate electrical connection between a first semiconductor element and a second semiconductor element, and the sparse-pitch pads are formed to facilitate electrical connection between the multilayer printed wiring board and the first semiconductor element and/or the second semiconductor element.
Abstract translation: 组合印刷线路板包括具有最外绝缘层的多层印刷布线板和固定到多层印刷线路板的最外层绝缘层的一部分的布线膜。 布线膜包括形成在布线膜的半导体安装表面上的密集垫片，多层印刷布线板具有形成在多层印刷布线板的半导体安装表面上的稀疏间距衬垫，密集衬垫是 形成为促进第一半导体元件和第二半导体元件之间的电连接，并且形成稀疏间距焊盘以便于多层印刷线路板与第一半导体元件和/或第二半导体元件之间的电连接。
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