Foldover packages and manufacturing and test methods therefor
    1.
    发明申请
    Foldover packages and manufacturing and test methods therefor 审中-公开
    折叠包装及其制造和测试方法

    公开(公告)号:US20050150813A1

    公开(公告)日:2005-07-14

    申请号:US10969527

    申请日:2004-10-20

    摘要: A microelectronic fold package is formed from an in-process unit including an internal unit such as a chip and a tape defining a bottom run extending beneath the internal unit, a top run extending above the internal unit and a fold connecting said top and bottom runs. The in-process unit is engaged between a pair of elements having flat surfaces so that these elements form the top and bottom runs to a substantially flat condition at least in regions between the internal unit and the fold and so that the engagement elements form the fold to a height equal to the height of the internal unit.

    摘要翻译: 微电子折叠包装由包括诸如芯片的内部单元和限定在内部单元下方延伸的底部行程的带的内部单元形成,在内部单元上方延伸的顶部行程以及连接所述顶部和底部行程的折叠 。 在处理单元被接合在具有平坦表面的一对元件之间,使得这些元件至少在内部单元和折叠之间的区域中形成顶部和底部行程至基本上平坦的状态,并且使得接合元件形成折叠 高度等于内部单元的高度。