公开(公告)号：US06818461B2

公开(公告)日：2004-11-16

申请号：US10062463

申请日：2002-02-05

申请人： Kazuyoshi Amami ,  Tsukasa Shiraishi ,  Yoshihiro Bessho

发明人： Kazuyoshi Amami ,  Tsukasa Shiraishi ,  Yoshihiro Bessho

IPC分类号： G01R3126

CPC分类号： H01L24/81 ,  H01L21/56 ,  H01L2224/0401 ,  H01L2224/0603 ,  H01L2224/1134 ,  H01L2224/11822 ,  H01L2224/13082 ,  H01L2224/13099 ,  H01L2224/1329 ,  H01L2224/133 ,  H01L2224/1403 ,  H01L2224/16 ,  H01L2224/81801 ,  H01L2224/83102 ,  H01L2224/83191 ,  H01L2224/92125 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01056 ,  H01L2924/01057 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H05K3/305 ,  H05K3/321 ,  H01L2924/00014

摘要： A mounting structure is formed by flip-chip mounting a semiconductor device onto a substrate. An electrical connecting portion of the semiconductor device is connected to an electrical connecting portion of the substrate by means of an electrically conductive adhesive. A region of the semiconductor device which is not involved in electrical connection is bonded to a region of the substrate which is not involved in electrical connection by means of an adhesive. A test of electrical properties is performed on the semiconductor device and the substrate which are connected to each other. If it is determined that the electrical properties are poor in the test, the semiconductor device is separated from the substrate after heating a bonding place of the adhesive up to a temperature higher than a glass transition point or a melting point of the adhesive. If it is determined that the electrical properties are good in the test, the semiconductor device and the substrate are sealed by means of a sealing resin.

摘要翻译： 通过将半导体器件倒装安装到衬底上来形成安装结构。 半导体器件的电连接部分通过导电粘合剂连接到基片的电连接部分。 不参与电连接的半导体器件的区域通过粘合剂结合到不涉及电连接的基板的区域。 对彼此连接的半导体器件和衬底进行电特性的测试。 如果在测试中确定电气性能差，则在将粘合剂的粘合位置加热到高于粘合剂的玻璃化转变点或熔点的温度之后，半导体器件与基板分离。 如果在测试中确定电性能良好，则半导体器件和衬底通过密封树脂密封。

公开(公告)号：US06756663B2

公开(公告)日：2004-06-29

申请号：US10337879

申请日：2003-01-08

申请人： Tsukasa Shiraishi ,  Tsutomu Mitani ,  Kazuyoshi Amami ,  Yoshihiro Bessho

发明人： Tsukasa Shiraishi ,  Tsutomu Mitani ,  Kazuyoshi Amami ,  Yoshihiro Bessho

IPC分类号： H05K346

CPC分类号： H01L21/563 ,  H01L23/5385 ,  H01L24/45 ,  H01L24/48 ,  H01L25/0652 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/19041 ,  H01L2924/19106 ,  H01L2924/19107 ,  H05K1/0284 ,  H05K1/141 ,  H05K1/147 ,  H05K1/189 ,  H05K3/328 ,  H05K3/3421 ,  H05K3/3442 ,  H05K3/363 ,  H05K3/368 ,  H05K2201/056 ,  H05K2201/10386 ,  H05K2201/10674 ,  H05K2203/049 ,  H05K2203/1572 ,  H01L2924/00 ,  H01L2224/05599

摘要： A semiconductor device is made by mounting semiconductor elements on both sides of a wiring board having three-dimensional wiring including inner-via holes. A high operating speed and smaller size are made possible by employing a laminated structure of semiconductor elements without using the chip-on-chip configuration. Semiconductor elements are mounted on both sides of a wiring board having three-dimensional wiring including inner via holes so that the semiconductor elements oppose each other via the wiring board. The electrodes of the semiconductor elements are connected with each other by the three-dimensional wiring of the wiring board.

摘要翻译： 半导体器件通过将半导体元件安装在具有包括内通孔的三维布线的布线板的两侧上而制成。 通过采用半导体元件的叠层结构而不使用片上芯片配置，可以实现高工作速度和较小尺寸。 半导体元件安装在具有包括内部通孔的三维布线的布线板的两侧，使得半导体元件经由布线板彼此相对。 半导体元件的电极通过布线板的三维布线彼此连接。

公开(公告)号：US06525414B2

公开(公告)日：2003-02-25

申请号：US09725283

申请日：2000-11-29

申请人： Tsukasa Shiraishi ,  Tsutomu Mitani ,  Kazuyoshi Amami ,  Yoshihiro Bessho

发明人： Tsukasa Shiraishi ,  Tsutomu Mitani ,  Kazuyoshi Amami ,  Yoshihiro Bessho

IPC分类号： H05K346

CPC分类号： H01L21/563 ,  H01L23/5385 ,  H01L24/45 ,  H01L24/48 ,  H01L25/0652 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/19041 ,  H01L2924/19106 ,  H01L2924/19107 ,  H05K1/0284 ,  H05K1/141 ,  H05K1/147 ,  H05K1/189 ,  H05K3/328 ,  H05K3/3421 ,  H05K3/3442 ,  H05K3/363 ,  H05K3/368 ,  H05K2201/056 ,  H05K2201/10386 ,  H05K2201/10674 ,  H05K2203/049 ,  H05K2203/1572 ,  H01L2924/00 ,  H01L2224/05599

摘要： A semiconductor device is made by mounting semiconductor elements on both sides of a wiring board having three-dimensional wiring including inner-via holes. A high operating speed and smaller size are made possible by employing a laminated structure of semiconductor elements without using the chip-on-chip configuration. Semiconductor elements are mounted on both sides of a wiring board having three-dimensional wiring including inner via holes so that the semiconductor elements oppose each other via the wiring board. The electrodes of the semiconductor elements are connected with each other by the three-dimensional wiring of the wiring board.

摘要翻译： 半导体器件通过将半导体元件安装在具有包括内通孔的三维布线的布线板的两侧上而制成。 通过采用半导体元件的叠层结构而不使用片上芯片配置，可以实现高工作速度和较小尺寸。 半导体元件安装在具有包括内部通孔的三维布线的布线板的两侧，使得半导体元件经由布线板彼此相对。 半导体元件的电极通过布线板的三维布线彼此连接。

公开(公告)号：US06429382B1

公开(公告)日：2002-08-06

申请号：US09547922

申请日：2000-04-11

申请人： Kazuyoshi Amami ,  Hiroaki Takezawa ,  Tsukasa Shiraishi ,  Yoshihiro Bessho

发明人： Kazuyoshi Amami ,  Hiroaki Takezawa ,  Tsukasa Shiraishi ,  Yoshihiro Bessho

IPC分类号： H05K102

CPC分类号： H01L24/83 ,  H01L23/4828 ,  H01L23/49883 ,  H01L24/29 ,  H01L2224/04026 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/1134 ,  H01L2224/13019 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/29355 ,  H01L2224/29439 ,  H01L2224/29499 ,  H01L2224/73204 ,  H01L2224/8319 ,  H01L2224/838 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01016 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/1579 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/351 ,  H05K3/321 ,  H05K3/323 ,  H05K2201/0769 ,  H05K2201/10636 ,  H05K2201/10674 ,  H05K2203/121 ,  Y02P70/611 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/0105 ,  H01L2924/00012 ,  H01L2224/05644

摘要： For the reliability in insulation and against sulfurization, the mounting structure of the invention includes an electric structure, and an electrically conductive adhesive layer including an electrically conductive filler disposed on the electric structure, and at least a portion of surface of the electrically conductive filler is exposed to an external environment, and an elution preventive film is disposed on at least a portion of the exposed surface. Further, an electrically conductive adhesive of this invention includes the electrically conductive filler, and an elution preventive film is disposed on the entire surface of the electrically conductive filler.

摘要翻译： 为了绝缘和耐硫化的可靠性，本发明的安装结构包括电结构，以及包括设置在电结构上的导电填料的导电粘合剂层，并且导电填料表面的至少一部分是 暴露在外部环境中，并且防洗掉膜被设置在暴露表面的至少一部分上。 此外，本发明的导电性粘合剂包括导电填料，并且在导电填料的整个表面上设置防淘汰膜。

公开(公告)号：US06694613B2

公开(公告)日：2004-02-24

申请号：US09873461

申请日：2001-06-05

申请人： Yoshifumi Nakamura ,  Minehiro Itagaki ,  Hiroaki Takezawa ,  Yoshihiro Bessho ,  Tsukasa Shiraishi

发明人： Yoshifumi Nakamura ,  Minehiro Itagaki ,  Hiroaki Takezawa ,  Yoshihiro Bessho ,  Tsukasa Shiraishi

IPC分类号： H05K302

CPC分类号： H01L23/49811 ,  H01L21/4853 ,  H01L2924/0002 ,  H05K1/095 ,  H05K3/4007 ,  H05K3/4069 ,  H05K3/4614 ,  H05K2201/0355 ,  H05K2203/0191 ,  H05K2203/1461 ,  Y10T29/49126 ,  Y10T29/49149 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/49165 ,  Y10T428/24926 ,  H01L2924/00

摘要： A method for producing a printed-circuit board includes forming via holes that penetrate through a prepreg to whose surface a parting film is applied; filling the via holes with a conducting paste; compressing the prepreg under heat to cure the prepreg and the paste; and then peeling off the parting film. Thus, projection electrodes with a height corresponding to the thickness of the film are formed in a manner such that the projection electrodes are integrated with the via hole conductors.

摘要翻译： 一种印刷电路板的制造方法，其特征在于，具有形成贯通预浸料坯的通孔，该预浸料坯具有分隔膜的表面， 用导电膏填充通孔; 在加热下压制预浸料以固化预浸料和糊料; 然后剥离分离膜。 因此，以使得突起电极与通孔导体一体化的方式形成具有与膜的厚度对应的高度的突起电极。

公开(公告)号：US06369450B1

公开(公告)日：2002-04-09

申请号：US09482103

申请日：2000-01-13

申请人： Kazuyoshi Amani ,  Tsukasa Shiraishi ,  Yoshihiro Bessho

发明人： Kazuyoshi Amani ,  Tsukasa Shiraishi ,  Yoshihiro Bessho

IPC分类号： H01L2348

CPC分类号： H01L24/81 ,  H01L21/56 ,  H01L2224/0401 ,  H01L2224/0603 ,  H01L2224/1134 ,  H01L2224/11822 ,  H01L2224/13082 ,  H01L2224/13099 ,  H01L2224/1329 ,  H01L2224/133 ,  H01L2224/1403 ,  H01L2224/16 ,  H01L2224/81801 ,  H01L2224/83102 ,  H01L2224/83191 ,  H01L2224/92125 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01056 ,  H01L2924/01057 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H05K3/305 ,  H05K3/321 ,  H01L2924/00014

摘要： A mounting structure is formed by flip-chip mounting a semiconductor device onto a substrate. An electrical connecting portion of the semiconductor device is connected to an electrical connecting portion of the substrate by means of an electrically conductive adhesive. A region of the semiconductor device which is not involved in electrical connection is bonded to a region of the substrate which is not involved in electrical connection by means of an adhesive. A test of electrical properties is performed on the semiconductor device and the substrate which are connected to each other. If it is determined that the electrical properties are poor in the test, the semiconductor device is separated from the substrate after heating a bonding place of the adhesive up to a temperature higher than a glass transition point or a melting point of the adhesive. If it is determined that the electrical properties are good in the test, the semiconductor device and the substrate are sealed by means of a sealing resin.

摘要翻译： 通过将半导体器件倒装安装到衬底上来形成安装结构。 半导体器件的电连接部分通过导电粘合剂连接到基片的电连接部分。 不参与电连接的半导体器件的区域通过粘合剂结合到不涉及电连接的基板的区域。 对彼此连接的半导体器件和衬底进行电特性的测试。 如果在测试中确定电气性能差，则在将粘合剂的粘合位置加热到高于粘合剂的玻璃化转变点或熔点的温度之后，半导体器件与基板分离。 如果在测试中确定电性能良好，则半导体器件和衬底通过密封树脂密封。

公开(公告)号：US06300576B1

公开(公告)日：2001-10-09

申请号：US09106302

申请日：1998-06-29

申请人： Yoshifumi Nakamura ,  Minehiro Itagaki ,  Hiroaki Takezawa ,  Yoshihiro Bessho ,  Tsukasa Shiraishi

发明人： Yoshifumi Nakamura ,  Minehiro Itagaki ,  Hiroaki Takezawa ,  Yoshihiro Bessho ,  Tsukasa Shiraishi

IPC分类号： H01R909

CPC分类号： H01L23/49811 ,  H01L21/4853 ,  H01L2924/0002 ,  H05K1/095 ,  H05K3/4007 ,  H05K3/4069 ,  H05K3/4614 ,  H05K2201/0355 ,  H05K2203/0191 ,  H05K2203/1461 ,  Y10T29/49126 ,  Y10T29/49149 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/49165 ,  Y10T428/24926 ,  H01L2924/00

摘要： A printed-circuit board, especially a multilayer printed-circuit board, with projection electrodes integrated with via hole conductors. Each of the projection electrodes is highly adhesive to a corresponding one of the via hole conductors and has high strength, and thus the production method of the printed-circuit board is simplified. Projection electrodes formed of a cured conducting paste are formed in such a manner that the electrodes are integrated with the via hole conductors which consist of a conducting paste embedded into the via hole formed in an insulating resin substrate to form a printed board. The method for producing a printed-circuit board, includes making via holes that penetrate through a prepreg to whose surface a parting film is applied; filling the via hole with a conducting paste; compressing the prepreg under heat to cure the prepreg and the paste; and then peeling off the film. Thus, projection electrodes with a height corresponding the thickness of the film are formed in a manner such that the projecting electrodes are integrated with the via hole conductors.

摘要翻译： 印刷电路板，特别是多层印刷电路板，其具有与通孔导体集成的突出电极。 每个突起电极与相应的一个通孔导体高度粘合，并且具有高强度，因此简化了印刷电路板的制造方法。 由固化导电膏形成的投影电极以这样的方式形成，使得电极与通孔导体集成，通孔导体包括嵌入到形成在绝缘树脂基板中的通孔中的导电膏，以形成印刷板。 制造印刷电路板的方法包括制造穿透预浸料的通孔，其中涂覆有分离膜的表面; 用导电膏填充通孔; 在加热下压制预浸料以固化预浸料和糊料; 然后剥离胶片。 因此，以使得突出电极与通孔导体一体化的方式形成具有与膜的厚度对应的高度的突起电极。

公开(公告)号：US06284640B1

公开(公告)日：2001-09-04

申请号：US09427807

申请日：1999-10-27

申请人： Masahiro Ono ,  Tsukasa Shiraishi ,  Yoshihiro Bessho ,  Kazuo Eda

发明人： Masahiro Ono ,  Tsukasa Shiraishi ,  Yoshihiro Bessho ,  Kazuo Eda

IPC分类号： H01L2144

CPC分类号： H01L24/85 ,  H01L24/11 ,  H01L24/45 ,  H01L24/48 ,  H01L24/78 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/0508 ,  H01L2224/05572 ,  H01L2224/1134 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48465 ,  H01L2224/78301 ,  H01L2224/81191 ,  H01L2224/85181 ,  H01L2224/85205 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/00

摘要： A manufacturing method for a semiconductor device using a wire bonding method using a metal wire. In the wire bonding method, an impact load applied when a metal ball formed at the tip of the metal wire by electric discharge is brought into contact with a terminal electrode of a semiconductor device is smaller than a static load applied after the metal ball is brought into contact with the terminal electrode. The method makes it possible to prevent an element or wiring from being damaged while securing the pressure necessary for bonding the metal ball to the terminal electrode even when the terminal electrode is placed on the element or the wiring.

摘要翻译： 一种使用金属线的引线接合方法的半导体器件的制造方法。 在引线接合方法中，当通过放电在金属线的前端形成的金属球与半导体器件的端子电极接触时施加的冲击载荷小于在金属球被带入之后施加的静态载荷 与端子电极接触。 该方法使得即使当将端子电极放置在元件或布线上时，也可以确保将金属球接合到端子电极所需的压力，从而防止元件或布线损坏。

公开(公告)号：US5920142A

公开(公告)日：1999-07-06

申请号：US813279

申请日：1997-03-10

申请人： Keiji Onishi ,  Hideki Iwaki ,  Shun-ichi Seki ,  Yutaka Taguchi ,  Tsukasa Shiraishi ,  Yoshihiro Bessho ,  Osamu Kawasaki ,  Kazuo Eda

发明人： Keiji Onishi ,  Hideki Iwaki ,  Shun-ichi Seki ,  Yutaka Taguchi ,  Tsukasa Shiraishi ,  Yoshihiro Bessho ,  Osamu Kawasaki ,  Kazuo Eda

IPC分类号： H03H3/08 ,  H03H9/10 ,  H01L41/08

CPC分类号： H03H9/0509 ,  H03H3/08 ,  H03H9/0585 ,  H03H9/059 ,  H03H9/1042 ,  H03H9/1071 ,  H03H9/1085 ,  H03H9/1092 ,  H01L2224/1134 ,  H01L2224/131 ,  H01L2224/13124 ,  H01L2224/13144 ,  H01L2224/45144 ,  H01L2924/00013 ,  H01L2924/09701 ,  H01L2924/16152 ,  Y10T29/42 ,  Y10T29/4913 ,  Y10T29/49146

摘要： The present invention relates to an electronic part used for mobile communications apparatuses and the like, and more particularly to an electronic part, such as an acoustic surface-wave device, a piezoelectric ceramic device or the like, which requires an oscillation space near the surface of the functional device chip thereof, and a method of production thereof. With this method, a space retainer for forming a sealed space at the functional portion of the chip can be hermetically sealed and have high moisture resistance, and the process of forming the space retainer can be carried out easily.The electronic part of the present invention comprises a functional device chip, a space retainer for forming a sealed space at the functional portion of the chip, a circuit substrate to which the chip is secured, electrode interconnection portions for establishing electric connection between the chip and the circuit substrate, and a sealing resin for covering and sealing at least the space retainer, wherein the space retainer comprises a support layer made of a synthetic resin film, provided with an opening enclosing the functional portion and joined onto the main surface, and a cover formed and joined onto the support layer so as to cover the functional portion and form a sealed space between the cover and the functional portion.

公开(公告)号：US06452280B1

公开(公告)日：2002-09-17

申请号：US09117695

申请日：1998-08-04

申请人： Tsukasa Shiraishi ,  Yoshihiro Bessho

发明人： Tsukasa Shiraishi ,  Yoshihiro Bessho

IPC分类号： H01L2352

CPC分类号： H01L24/81 ,  H01L21/563 ,  H01L24/11 ,  H01L24/75 ,  H01L2224/05124 ,  H01L2224/05644 ,  H01L2224/05671 ,  H01L2224/13099 ,  H01L2224/1403 ,  H01L2224/17 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/75 ,  H01L2224/81192 ,  H01L2224/81801 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/00014

摘要： A semiconductor apparatus in which the height of the projected electrode (4) formed on the semiconductor element (1) is deformed plastically so as to unify the distance of the protruding surface of the projected electrode (4) and the surface of the electrode terminal (7) at the side of the circuit substrate (5), and the semiconductor element and the circuit substrate are connected electrically with reliability. A method for producing the semiconductor apparatus also is disclosed. After the semiconductor element (1) is positioned on the predetermined part of the circuit substrate (5), the projected electrode (4) is deformed plastically by pushing the semiconductor element (1) from the back and the height of the projected electrode (4) is processed appropriately. According to the method for producing the semiconductor apparatus, even if there is irregularity of the height of the surface of the electrode terminal (7) formed on the circuit substrate (5) which connects with the semiconductor element (1), the semiconductor element (1) and the circuit substrate (5) can be connected electrically with reliability.

摘要翻译： 形成在半导体元件（1）上的突出电极（4）的高度塑性变形的半导体装置，以将突出的电极（4）的突出表面与电极端子的表面 7），电路基板（5）的一侧，半导体元件和电路基板电连接的可靠性。 还公开了一种半导体装置的制造方法。 在将半导体元件（1）定位在电路基板（5）的预定部分上之后，通过从后部推出半导体元件（1）并将突出的电极（4）的高度 ）被适当地处理。 根据半导体装置的制造方法，即使形成在与半导体元件（1）连接的电路基板（5）上的电极端子（7）的表面高度不规则，半导体元件 1），并且电路基板（5）可以可靠地电连接。