公开(公告)号：US5969413A

公开(公告)日：1999-10-19

申请号：US855931

申请日：1997-05-14

申请人： Keiichi Yano ,  Kazuo Kimura ,  Hironori Asai ,  Jun Monma ,  Koji Yamakawa ,  Mitsuyoshi Endo ,  Hirohisa Osoguchi

发明人： Keiichi Yano ,  Kazuo Kimura ,  Hironori Asai ,  Jun Monma ,  Koji Yamakawa ,  Mitsuyoshi Endo ,  Hirohisa Osoguchi

IPC分类号： H01L23/10 ,  H01L23/15 ,  H01L23/28 ,  H01L23/495 ,  H01L23/02 ,  H01L23/12 ,  H01L23/48

CPC分类号： H01L23/10 ,  H01L23/15 ,  H01L23/49572 ,  H01L24/50 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/07802 ,  H01L2924/30107

摘要： A semiconductor chip is supported on a tape carrier provided with lead wirings. The semiconductor chip is electrically connected to the lead wirings. The semiconductor chip of this quality is bonded in combination with the pe carrier to an aluminum nitride substrate. The lead wirings provided on the carrier combine the two functions as an internal lead and an external lead. The semiconductor package of such a structure as is described above allows multi-terminal connection by the narrowing of pitches between the leads and permits provision of a miniature package excelling in the heat-radiating property. Alternatively, the lead wirings supported on the tape carrier and electrically connected to the semiconductor chip are utilized as internal leads. For the external leads, such lead frames as are bonded to the aluminum nitride substrate are used. The lead frames are electrically connected to the internal leads provided in the tape carrier.

摘要翻译： 半导体芯片被支撑在带有引线配线的带载体上。 半导体芯片电连接到引线配线。 该质量的半导体芯片与pe载体结合到氮化铝衬底上。 载体上提供的导线结合了作为内部引线和外部引线的两个功能。 如上所述的这种结构的半导体封装允许通过引线之间的间距变窄来实现多端子连接，并且允许提供具有优异的散热性能的微型封装。 或者，支撑在带载体上并电连接到半导体芯片的引线配线被用作内部引线。 对于外部引线，使用与氮化铝基板结合的引线框架。 引线框架电连接到设置在带式载体中的内部引线。

公开(公告)号：US5703397A

公开(公告)日：1997-12-30

申请号：US745367

申请日：1996-11-08

申请人： Mitsuyoshi Endo ,  Hironori Asai ,  Keiichi Yano ,  Yoshitoshi Sato

发明人： Mitsuyoshi Endo ,  Hironori Asai ,  Keiichi Yano ,  Yoshitoshi Sato

IPC分类号： H01L23/10 ,  H01L23/13 ,  H01L23/15 ,  H01L23/367 ,  H01L23/373 ,  H01L23/498 ,  H01L23/053 ,  H01L23/12

CPC分类号： H01L23/13 ,  H01L23/10 ,  H01L23/15 ,  H01L23/3675 ,  H01L23/3731 ,  H01L23/49822 ,  H01L23/49838 ,  H01L2224/48227 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15174 ,  H01L2924/15312 ,  H01L2924/16152 ,  H01L2924/16195 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025

摘要： A semiconductor ceramic multilayer package comprising an aluminum nitride substrate having a semiconductor element mounted on one surface thereof and a wiring pattern electrically connected to the semiconductor element, connecting terminals connected to the wiring pattern and disposed on the other surface of the aluminum nitride substrate, and a sealing member connected to the aluminum nitride substrate with a metallic bonding layer or a glass layer having a thickness of not more than 100 .mu.m in such a manner as to seal the semiconductor element possesses a notably improved heat-radiating property and accomplishes the object of increasing the number of pins and reducing the size of package.

摘要翻译： 一种半导体陶瓷多层封装，包括具有安装在其一个表面上的半导体元件的氮化铝衬底和与半导体元件电连接的布线图案，连接到布线图案并且设置在氮化铝衬底的另一表面上的连接端子，以及 用氮化铝衬底与金属接合层或厚度不大于100μm的玻璃层以密封半导体元件的方式连接的密封构件具有显着提高的散热性能并实现该物体 增加引脚数量并减小封装尺寸。

公开(公告)号：US5736790A

公开(公告)日：1998-04-07

申请号：US710769

申请日：1996-09-20

申请人： Kiyoshi Iyogi ,  Kaoru Koiwa ,  Keiichi Yano ,  Hironori Asai

发明人： Kiyoshi Iyogi ,  Kaoru Koiwa ,  Keiichi Yano ,  Hironori Asai

IPC分类号： H01L23/485 ,  H05K1/11 ,  H05K3/34 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/10 ,  H01L24/13 ,  H05K1/111 ,  H05K3/3436 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/181 ,  H05K2201/0212 ,  H05K2201/0367 ,  H05K2201/09736 ,  H05K2201/09745 ,  H05K2201/10234 ,  H05K2201/10992 ,  H05K2203/041 ,  Y02P70/611 ,  Y02P70/613

摘要： Disclosed is a bump formed on a pad which is provided on either a semiconductor chip or a package or a wiring substrate for input or output thereof, for making electric connection on the pad. The bump has: a projection projecting from the pad; a ball having conductivity and located above the pad; and a conductive bonding material for bonding the pad for and the ball, wherein creep strength of the ball is larger than strength of the conductive bonding material. With another conductive bonding material provided on the other pad of a wiring substrate or a package, the ball of the bump of the semiconductor chip or the package is placed close to another pad of the wiring substrate or package. The conductive bonding material of the other pad is heated and melted to connect the ball and the other pad of the wiring substrate or package by the conductive bonding material.

摘要翻译： 公开了一种形成在焊盘上的凸块，其设置在半导体芯片或封装或其输入或输出的布线基板上，用于在焊盘上进行电连接。 凸起具有：从该垫突出的突起; 具有导电性并位于垫上方的球; 以及用于接合焊盘和球的导电接合材料，其中球的蠕变强度大于导电接合材料的强度。 通过设置在布线基板或封装的另一个焊盘上的另一个导电接合材料，将半导体芯片或封装的凸块的球放置成靠近布线基板或封装的另一个焊盘。 另一个焊盘的导电接合材料被加热熔化，以通过导电接合材料将接线衬底或封装的球和另一焊盘连接起来。

公开(公告)号：US5909058A

公开(公告)日：1999-06-01

申请号：US934775

申请日：1997-09-22

申请人： Keiichi Yano ,  Hironori Asai ,  Kaoru Koiwa ,  Nobuo Iwase

发明人： Keiichi Yano ,  Hironori Asai ,  Kaoru Koiwa ,  Nobuo Iwase

IPC分类号： H01L23/24 ,  H01L23/498 ,  H01L23/34 ,  H01L23/29 ,  H01L23/48

CPC分类号： H01L23/49816 ,  H01L23/24 ,  H01L23/49833 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/49109 ,  H01L2224/73265 ,  H01L24/48 ,  H01L24/49 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01322 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/3011

摘要： A thin type semiconductor package having a low thermal resistance and a low electric resistance is disclosed, that comprises a nitride ceramic supporting substrate having a first main surface and a second main surface, the nitride ceramic supporting substrate having via-holes that pass through from the first main surface to the second main surface, a resin film having a wiring layer, the resin film being bonded to the first main surface of the supporting substrate, the wiring layer being electrically connected to an edge portion of the via-holes on the first main surface, the resin film having an opening region, a semiconductor chip directly mounted on the first main surface of the nitride ceramic supporting substrate, disposed at the opening region of the resin film, and electrically connected to the wiring layer of the resin film, and external connection terminals disposed on the edge portion of the via-holes of the second main surface.

摘要翻译： 公开了一种具有低热阻和低电阻的薄型半导体封装，其包括具有第一主表面和第二主表面的氮化物陶瓷支撑衬底，所述氮化物陶瓷支撑衬底具有通孔， 第一主表面到第二主表面的树脂膜，具有布线层的树脂膜，树脂膜粘合到支撑基板的第一主表面，布线层电连接到第一主表面上的通孔的边缘部分 主表面，具有开口区域的树脂膜，直接安装在氮化物陶瓷支撑基板的第一主表面上的半导体芯片，设置在树脂膜的开口区域，并与树脂膜的布线层电连接， 以及设置在第二主表面的通孔的边缘部分上的外部连接端子。

公开(公告)号：US6046499A

公开(公告)日：2000-04-04

申请号：US824844

申请日：1997-03-26

申请人： Keiichi Yano ,  Hironori Asai

发明人： Keiichi Yano ,  Hironori Asai

IPC分类号： H01L23/367 ,  H01L23/498 ,  H01L23/34 ,  H01L23/48

CPC分类号： H01L23/49816 ,  H01L23/3677 ,  H01L24/45 ,  H01L2224/05599 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45565 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L24/48 ,  H01L24/73 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/3011

摘要： Disclosed is a semiconductor package having: a semiconductor chip; a package substrate; a wire connected to the semiconductor chip; and an electric connection member formed on the package substrate to electrically connect the wire to a printed board when the package substrate is mounted on the printed board. One surface of the package substrate has a first area in which the semiconductor chip is mounted and a second area in which the wire are arranged, and the other surface has a third area which is located in the rear of the second area and in which the electric connection member connects the wire to the printed board and a fourth area which is located in the rear of the first area. A heat-transfer member is provided in the fourth area and transmits heat generated by the semiconductor chip to the printed board through the package substrate.

摘要翻译： 公开了一种半导体封装，其具有：半导体芯片; 封装衬底; 连接到半导体芯片的导线; 以及电连接构件，形成在所述封装基板上，以在将所述封装基板安装在所述印刷电路板上时将所述导线电连接到印刷电路板。 封装基板的一个表面具有其中安装半导体芯片的第一区域和布置导线的第二区域，另一个表面具有位于第二区域的后部的第三区域， 电连接构件将导线连接到印刷电路板和位于第一区域后部的第四区域。 传热部件设置在第四区域中，并且通过封装基板将由半导体芯片产生的热量传递到印刷电路板。

公开(公告)号：US5714801A

公开(公告)日：1998-02-03

申请号：US624081

申请日：1996-03-29

申请人： Keiichi Yano ,  Jun-ichi Kudo ,  Koji Yamakawa ,  Kiyoshi Iyogi

发明人： Keiichi Yano ,  Jun-ichi Kudo ,  Koji Yamakawa ,  Kiyoshi Iyogi

IPC分类号： H01L23/498 ,  H01L23/52

CPC分类号： H01L23/49822 ,  H01L23/49838 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/1433 ,  H01L2924/15174 ,  H01L2924/15312 ,  H01L2924/15787 ,  H01L2924/16152 ,  H01L2924/3011

摘要： A semiconductor package is disclosed which is provided with a multilayer ceramic substrate such as, for example, a multilayer aluminum nitride substrate having a surface for mounting a semiconductor device and, at the same time, having an inner wiring layer electrically connected to the semiconductor device. On the surface of the multilayer ceramic substrate for forming terminals thereon, input and output terminals such as, for example, pin terminals and bump terminals electrically connected to the inner wiring layer. The input and output terminals embrace signal terminals, ground terminals, and power source terminals. The signal terminals among other terminals are so disposed that they may be each positioned adjacently to at least one ground terminal or power source terminal. This semiconductor package possesses perfect transmission properties even for signals of such a high frequency as exceeds the order of GHz. The dispersion of the transmission properties is small.

摘要翻译： 公开了一种半导体封装，其具有多层陶瓷衬底，例如具有用于安装半导体器件的表面的多层氮化铝衬底，并且同时具有与半导体器件电连接的内部布线层 。 在用于在其上形成端子的多层陶瓷基板的表面上，诸如引脚端子和凸起端子的输入和输出端子电连接到内部布线层。 输入和输出端子包括信号端子，接地端子和电源端子。 其他端子之间的信号端子被布置成使得它们可以各自邻近于至少一个接地端子或电源端子。 该半导体封装即使对于超过GHz数量级的高频的信号也具有完美的传输特性。 透射性能的分散性很小。

公开(公告)号：US5463248A

公开(公告)日：1995-10-31

申请号：US243864

申请日：1994-05-17

申请人： Keiichi Yano ,  Takashi Takahashi ,  Kazuo Kimura ,  Yoshitoshi Sato ,  Kouji Yamakawa ,  Toshishige Yamamoto ,  Masafumi Fujii ,  Shizuki Hashimoto ,  Hiroshi Takamichi

发明人： Keiichi Yano ,  Takashi Takahashi ,  Kazuo Kimura ,  Yoshitoshi Sato ,  Kouji Yamakawa ,  Toshishige Yamamoto ,  Masafumi Fujii ,  Shizuki Hashimoto ,  Hiroshi Takamichi

IPC分类号： H01L23/08 ,  H01L23/10 ,  H01L23/495 ,  H01L23/50 ,  H01L23/02 ,  H01L23/48

CPC分类号： H01L23/49582 ,  H01L23/10 ,  H01L24/48 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48472 ,  H01L2224/73265 ,  H01L2224/85455 ,  H01L2224/8546 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15747 ,  H01L2924/15787 ,  H01L2924/16152 ,  H01L2924/30107 ,  H01L2924/351

摘要： A semiconductor package comprises an aluminum nitride substrate having a semiconductor element mounted thereon, a lead frame junctioned to the side of the aluminum nitride substrate directly contacting the mounted semiconductor element, and a ceramic sealing member junctioned to the aluminum nitride substrate so as to seal the semiconductor element. The lead frame has a coating layer of a nonmagnetic metallic material formed in a thickness of not more than 20 .mu.m on only one of the opposite surfaces of a lead frame matrix made of a ferromagnetic metal to which a bonding wire is to be junctioned. The layer of the nonmagnetic metallic material is formed by any of such thin film forming technique as the vacuum deposition technique, the spattering technique, and the plating technique. The coating layer formed on only one of the opposite surfaces of the lead frame matrix is capable of amply curbing the resistance and the dependency of inductance on frequency. The aluminum nitride substrate is capable of imparting an ideal ability to radiate heat. The semiconductor package enables a high-speed quality semiconductor element having such a high system clock frequency as is not less than 50 MHz to be operated stably.

摘要翻译： 半导体封装包括其上安装有半导体元件的氮化铝衬底，与直接接触安装的半导体元件的氮化铝衬底侧连接的引线框架和与氮化铝衬底结合的陶瓷密封构件，以密封 半导体元件。 引线框架具有非磁性金属材料的涂层，所述涂层的厚度不大于20μm，仅由引线框架矩阵的相反表面形成，所述引线框架矩阵由铁磁金属制成，所述引线框矩阵由所述铁磁金属连接。 非磁性金属材料层由真空沉积技术，溅射技术和电镀技术中的任何一种薄膜形成技术形成。 仅形成在引线框架矩阵的相对表面之一上的涂层能够充分地抑制电阻和电感对频率的依赖性。 氮化铝衬底能够赋予理想的辐射热能力。 半导体封装使得能够稳定地操作具有不低于50MHz的系统时钟频率的高速质量的半导体元件。

公开(公告)号：US08973759B2

公开(公告)日：2015-03-10

申请号：US13418970

申请日：2012-03-13

申请人： Hideo Ichikawa ,  Kaori Ozeki ,  Tatsushi Umayahara ,  Takashi Ono ,  Masayoshi Suzuki ,  Teruo Shibata ,  Keiichi Yano ,  Masato Suzuki ,  Eiichi Masushio ,  Hiroshi Sano ,  Yusuke Uchida ,  Junji Yamabe ,  Seiji Terazawa ,  Masashi Hasegawa

发明人： Hideo Ichikawa ,  Kaori Ozeki ,  Tatsushi Umayahara ,  Takashi Ono ,  Masayoshi Suzuki ,  Teruo Shibata ,  Keiichi Yano ,  Masato Suzuki ,  Eiichi Masushio ,  Hiroshi Sano ,  Yusuke Uchida ,  Junji Yamabe ,  Seiji Terazawa ,  Masashi Hasegawa

IPC分类号： G03G15/08 ,  B07B1/06 ,  B07B1/55 ,  B07B4/08 ,  B07B13/16 ,  B65G65/48 ,  G03G9/08

CPC分类号： B07B1/06 ,  B07B1/55 ,  B07B4/08 ,  B07B13/16 ,  B65G65/48 ,  B65G65/4809 ,  G03G9/08 ,  G03G9/0817

摘要： A sieving device including a hollow cylindrical body, a filter disposed at a bottom portion of the hollow cylindrical body, and a blade configured to rotate in close proximity to the filter around a rotation axis thereof crossing the filter to thereby stir powder supplied to the hollow cylindrical body.

摘要翻译： 一种筛分装置，包括中空圆柱体，设置在中空圆柱体的底部的过滤器和一个叶片，其构造成围绕过滤器的旋转轴线紧邻过滤器旋转，从而搅拌供应到中空的粉末 圆柱体。

公开(公告)号：US08613666B2

公开(公告)日：2013-12-24

申请号：US12872790

申请日：2010-08-31

申请人： Chris Esaki ,  Keiichi Yano

发明人： Chris Esaki ,  Keiichi Yano

IPC分类号： A63F13/00

CPC分类号： A63F13/42 ,  A63F13/213 ,  A63F13/533 ,  A63F13/5375 ,  A63F2300/1093 ,  A63F2300/305 ,  A63F2300/308 ,  A63F2300/6607 ,  G06F3/017

摘要： A system for performing user selection of an option is provided. A user interface displays one or more options. Each option is associated with a sequence of a looped motion. In response, a user will perform one of the displayed sequences of looped motion. User motion data is received from one or more sensors connected to the computing device. The user's progress of performing the sequence of the looped motion is determined based on the user motion data matching one or more looped motion criteria associated with the performed looped motion. The user's progress of performing the sequence of the looped motion is displayed to the user. A selection of the option associated with the performed looped motion is automatically triggered in response to determining that the user has completed the sequence of looped motion.

摘要翻译： 提供了一种用于执行选项的用户选择的系统。 用户界面显示一个或多个选项。 每个选项与循环运动的顺序相关联。 作为响应，用户将执行所显示的循环运动序列之一。 从连接到计算设备的一个或多个传感器接收用户运动数据。 基于与所执行的循环运动相关联的一个或多个循环运动标准的用户运动数据来确定执行循环运动序列的用户进度。 向用户显示用户执行循环运动序列的进度。 响应于确定用户已经完成了循环运动的顺序，自动地触发与执行的循环运动相关联的选项的选择。

公开(公告)号：US08610145B2

公开(公告)日：2013-12-17

申请号：US10572595

申请日：2004-09-29

申请人： Keiichi Yano

发明人： Keiichi Yano

IPC分类号： H01L33/00

CPC分类号： H01L33/486 ,  H01L33/60 ,  H01L33/641 ,  H01L33/647 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2224/0401

摘要： A light emitting apparatus 10 includes an aluminum nitride co-fired substrate 11 and a light emitting device 12 arranged on a front surface of the co-fired substrate, in which the front surface of the aluminum nitride substrate 11 bearing the light emitting device 12 is mirror-polished so as to have a surface roughness of 0.3 μm Ra or less, and the light emitting apparatus 10 further includes a vapor-deposited metal film 14 and via holes 15. The vapor-deposited metal film 14 is arranged on the front surface of the aluminum nitride substrate 11 around the light emitting device 12 and has a reflectivity of 90% or more with respect to light emitted from the light emitting device 12. The via holes 15 penetrates the aluminum nitride substrate 11 from the front surface bearing the light emitting device 12 to the rear surface to thereby allow conduction to the light emitting device 12 from the rear surface. This configuration can reduce light emitting apparatuses in size and can provide light emitting apparatuses that are excellent in heat radiation performance, allow a larger current to pass therethrough, and can have a significantly increased luminance with a high luminous efficiency.

摘要翻译： 发光装置10包括氮化铝共烧基板11和布置在共烧基板的前表面上的发光装置12，其中承载发光装置12的氮化铝基板11的前表面是 镜面抛光以使表面粗糙度为0.3μmRa或更小，并且发光装置10还包括蒸镀金属膜14和通孔15.蒸镀金属膜14配置在前表面 的氮化铝衬底11，并且相对于从发光器件12发射的光具有90％或更多的反射率。通孔15从承载光的前表面穿透氮化铝衬底11 发射器件12到后表面，从而允许从后表面传导到发光器件12。 这种结构可以减小发光装置的尺寸，并且可以提供散热性能优异的发光装置，允许较大的电流通过，并且可以以高发光效率显着提高亮度。