公开(公告)号：US4818981A

公开(公告)日：1989-04-04

申请号：US95268

申请日：1987-09-11

申请人： Ken-ichi Oki ,  Satoru Kawai ,  Ken-ichi Yanai ,  Kazuhiro Takahara

发明人： Ken-ichi Oki ,  Satoru Kawai ,  Ken-ichi Yanai ,  Kazuhiro Takahara

IPC分类号： G02F1/1368 ,  G09G3/36

CPC分类号： G02F1/1368 ,  G09G3/3648 ,  G09G3/3659 ,  G02F2201/122 ,  G09G2300/0809 ,  G09G2330/08

摘要： An active matrix display device of an improved and simplified configuration and a driving method for the same are disclosed. The display device according to the present invention is characterized in that data bus lines and scan bus lines are separately formed on first and second transparent substrates respectively and the drain electrode of each TFT on the second substrate is connected to the scan bus line to be addressed next. This configuration eliminates earth bus lines of the prior art. This arrangement has effects of simplifying a bus line design and obtaining a higher yield and an increased opening rate for each display element. In order to drive the above device, an address pulse having a stepped waveform is used. Each address pulse has Vgon, Vgc, and Vgoff levels, and a width of two horizontal scan time. The first step of address pulse Vgc corresponds to the address time of the adjacent scan bus line to be scanned previously; and the second step Vgon corresponds to the address time for the TFT to be scanned. The present invention discloses a voltage relation for waveforms of the address pulse and data pulse in order to obtain a high quality display.

摘要翻译： 公开了一种改进和简化配置的有源矩阵显示装置及其驱动方法。 根据本发明的显示装置的特征在于，分别在第一和第二透明基板上分别形成数据总线和扫描总线，并且将第二基板上的每个TFT的漏极连接到要寻址的扫描总线上 下一个。 该配置消除了现有技术的接地总线。 这种布置具有简化总线设计并且为每个显示元件获得更高的产量和增加的打开速率的效果。 为了驱动上述装置，使用具有阶梯式波形的地址脉冲。 每个地址脉冲具有Vgon，Vgc和Vgoff电平，宽度为两个水平扫描时间。 寻址脉冲Vgc的第一步对应于先前要扫描的相邻扫描总线的地址时间; 并且第二步骤Vgon对应于要扫描的TFT的寻址时间。 本发明公开了用于寻址脉冲和数据脉冲的波形的电压关系，以获得高质量的显示。

公开(公告)号：US09078343B2

公开(公告)日：2015-07-07

申请号：US13325105

申请日：2011-12-14

申请人： Tsutomo Yamauchi ,  Satoru Kawai

发明人： Tsutomo Yamauchi ,  Satoru Kawai

IPC分类号： H05K3/00 ,  H05K3/46

CPC分类号： H05K3/0032 ,  H05K3/4602 ,  H05K2201/09827 ,  H05K2201/09854 ,  H05K2203/1476 ,  H05K2203/1572

摘要： A method for manufacturing a printed wiring board including forming a penetrating hole in a core substrate, forming a first conductor on a first surface of the substrate, forming a second conductor on a second surface of the substrate, and filling a conductive material in the hole such that a through-hole conductor is formed in the hole and the first and second conductors are connected via the through-hole conductor. The forming of the hole includes forming a first opening in the first surface, forming a second opening from the bottom of the first opening toward the second surface such that the second opening has a smaller diameter than the first opening, forming a third opening in the second surface, and forming a fourth opening from the bottom of the third opening toward the first surface such that the fourth opening has a smaller diameter than the third opening.

摘要翻译： 一种制造印刷线路板的方法，包括在芯基板中形成贯通孔，在基板的第一表面上形成第一导体，在基板的第二表面上形成第二导体，并在该孔中填充导电材料 使得在孔中形成通孔导体，并且第一和第二导体经由通孔导体连接。 孔的形成包括在第一表面中形成第一开口，从第一开口的底部朝向第二表面形成第二开口，使得第二开口具有比第一开口更小的直径，在第二开口中形成第三开口 并且从第三开口的底部朝向第一表面形成第四开口，使得第四开口具有比第三开口小的直径。

公开(公告)号：US20120005888A1

公开(公告)日：2012-01-12

申请号：US13240626

申请日：2011-09-22

申请人： Toru Nakai ,  Satoru Kawai ,  Hiroshi Niwa ,  Yoshiyuki Iwata

发明人： Toru Nakai ,  Satoru Kawai ,  Hiroshi Niwa ,  Yoshiyuki Iwata

IPC分类号： H05K3/00

CPC分类号： C25D5/02 ,  H05K3/108 ,  H05K3/421 ,  H05K3/423 ,  H05K3/429 ,  H05K3/4661 ,  H05K2201/0116 ,  H05K2201/09563 ,  H05K2203/025 ,  H05K2203/0257 ,  Y10T29/49124 ,  Y10T428/24917 ,  Y10T428/24926 ,  Y10T428/249955 ,  Y10T428/249958

摘要： A method for manufacturing a multilayer printed circuit board including providing a core substrate having a penetrating-hole, forming an electroless plated film on a surface of the substrate and an inner wall surface of the penetrating-hole, electrolytically plating the substrate while moving with respect to the surface of the substrate an insulating member in contact with the surface of the substrate such that an electrolytic plated film is formed on the electroless plated film, an opening space inside the penetrating-hole is filled with an electrolytic material, and a through-hole conductor structure is formed in the penetrating-hole, forming an etching resist having an opening pattern on the electrolytic plated film, and removing an exposed pattern of the electrolytic plated film exposed by the opening pattern and a pattern of the electroless plated film under the exposed pattern such that a conductor circuit is formed on the surface of the substrate.

摘要翻译： 一种多层印刷电路板的制造方法，其特征在于，具有提供具有贯通孔的芯基板，在所述基板的表面上形成无电镀膜和所述贯通孔的内壁面，对所述基板进行电解电镀，同时相对于 在所述基板的表面上与所述基板的表面接触的绝缘构件，使得在所述无电镀膜上形成电解电镀膜，所述贯通孔内的开口空间填充有电解材料， 在导电孔中形成空穴导体结构，在电解镀膜上形成具有开口图案的抗蚀剂，并且除去由开口图案露出的电解电镀膜的露出图案，以及将化学镀膜的图案 使得在基板的表面上形成导体电路。

公开(公告)号：US5824623A

公开(公告)日：1998-10-20

申请号：US672593

申请日：1996-06-28

申请人： Satoru Kawai ,  Masayasu Yamazaki ,  Kenichiro Sudo ,  Hitoshi Saito

发明人： Satoru Kawai ,  Masayasu Yamazaki ,  Kenichiro Sudo ,  Hitoshi Saito

IPC分类号： B41M5/382 ,  B32B27/00 ,  B32B27/10 ,  B32B27/18 ,  B32B27/30 ,  B41M5/50 ,  B41M5/52 ,  B41M5/035 ,  B41M5/38

CPC分类号： B41M5/5254 ,  Y10S428/913 ,  Y10S428/914 ,  Y10T428/273 ,  Y10T428/31935

摘要： There is provided a thermal transfer image-receiving sheet comprising: a substrate sheet; and an image-receiving layer provided on one side of the substrate sheet, the image-receiving layer comprising a copolymer, having an average degree of polymerization of 800 to 2000, of at least vinyl chloride and vinyl acetate as main comonomers.

摘要翻译： 提供一种热转印图像接收片，其包括：基片; 以及设置在基片的一侧的图像接收层，所述图像接收层包含平均聚合度为800至2000的至少氯乙烯和乙酸乙烯酯作为主要共聚单体的共聚物。

公开(公告)号：US5354725A

公开(公告)日：1994-10-11

申请号：US983167

申请日：1992-11-30

申请人： Hiroshi Eguchi ,  Minoru Furuse ,  Satoru Kawai

发明人： Hiroshi Eguchi ,  Minoru Furuse ,  Satoru Kawai

IPC分类号： A61B1/04 ,  B41M5/34 ,  B41M5/382 ,  B41M5/41 ,  B41M5/035 ,  B41M5/38

CPC分类号： B41M5/345 ,  Y10S428/913 ,  Y10S428/914 ,  Y10T428/24942 ,  Y10T428/273

摘要： A medical image forming method including the steps of superposing a three-primary-color thermal transfer sheet and an image receiving sheet, the thermal transfer sheet having a base film and three color dye layers of yellow, magenta, and cyan, each of the dye layer being composed of a dye and a binder, the image receiving sheet having a dye accepting layer; heating the rear surface of the thermal transfer sheet with a heating device in an image shape; and driving and controlling the heating device with a control unit so as to form a full color image on the image receiving sheet. The control unit is adapted to compensate tones of the image so that chromaticity values thereof formed on the image receiving sheet are in a region defined by four points of (a*=0, b*=0), (a*=20, b*=-5), (a*=18, b*=15), and (a*=0, b*=15) when an achromatic color signal is input and L*=80. According to an aspect of the present invention, the control unit is adapted to compensate tones of three primary colors so that the density graduation of light red of an image in accordance with a light red signal sent to the control unit becomes high and thereby the low density region (light region) of the image formed in accordance with a achromatic color signal becomes reddish. According to another aspect of the present invention, since the dye layers are formed so that the light region becomes reddish and the dark region greenish, images where colors from light orange to light red can be easily distinguished are formed.

摘要翻译： 一种医学图像形成方法，包括以下步骤：叠加三原色热转印片和图像接收片，所述热转印片具有基膜和黄色，品红色和青色的三色染料层，每种染料 该层由染料和粘合剂组成，图像接收片具有染料接收层; 用图像形状的加热装置加热热转印片的后表面; 以及通过控制单元驱动和控制加热装置，以在图像接收片材上形成全色图像。 控制单元适于补偿图像的色调，使得在图像接收片上形成的色度值位于由（a * = 0，b * = 0），（a * = 20，b * = - 5），（a * = 18，b * = 15）和（a * = 0，b * = 15）时，输入无彩色信号，L * = 80。 根据本发明的一个方面，控制单元适用于补偿三原色的色调，使得根据发送到控制单元的浅红色信号的图像的红色的浓度刻度变高，从而低 根据无彩色信号形成的图像的浓度区域（光区域）变得微红。 根据本发明的另一方面，由于形成染色层，所以能够容易地区分出从浅橙色到浅红色的颜色的区域变得浅红色，暗区域变绿。

公开(公告)号：US09021692B2

公开(公告)日：2015-05-05

申请号：US13305907

申请日：2011-11-29

申请人： Satoru Kawai ,  Kenji Sakai ,  Liyi Chen

发明人： Satoru Kawai ,  Kenji Sakai ,  Liyi Chen

IPC分类号： H05K3/10 ,  H05K3/40 ,  H05K1/11 ,  H05K3/20 ,  H05K3/46

CPC分类号： H05K1/112 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/16238 ,  H01L2224/81192 ,  H01L2924/00014 ,  H01L2924/15311 ,  H05K1/0298 ,  H05K1/032 ,  H05K1/113 ,  H05K3/205 ,  H05K3/3457 ,  H05K3/4007 ,  H05K3/4644 ,  H05K3/4682 ,  H05K2201/0195 ,  H05K2201/0367 ,  H05K2201/09472 ,  H05K2201/096 ,  H05K2203/0361 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A printed wiring board includes a resin insulation layer having a first surface and a second surface on an opposite side of the first surface, the resin insulation layer having an opening for a first via conductor, a pad formed on the first surface of the resin insulation layer and provided to mount an electronic component, a first conductive circuit formed on the second surface of the resin insulation layer, and a first via conductor formed in the opening and connecting the pad and the first conductive circuit. The pad has an embedded portion embedded in the resin insulation layer and a protruding portion protruding from the resin insulation layer, and the embedded portion has an external shape which is greater than an external shape the protruding portion.

摘要翻译： 印刷电路板包括具有在第一表面的相对侧的第一表面和第二表面的树脂绝缘层，树脂绝缘层具有用于第一通孔导体的开口，形成在树脂绝缘体的第一表面上的焊盘 并且提供以安装电子部件，形成在树脂绝缘层的第二表面上的第一导电电路和形成在开口中并连接焊盘和第一导电电路的第一通孔导体。 垫具有嵌入在树脂绝缘层中的嵌入部分和从树脂绝缘层突出的突出部分，并且嵌入部分具有大于突出部分的外部形状的外部形状。

公开(公告)号：US08552312B2

公开(公告)日：2013-10-08

申请号：US12944813

申请日：2010-11-12

申请人： Satoru Kawai ,  Yasuki Kimishima

发明人： Satoru Kawai ,  Yasuki Kimishima

IPC分类号： H05K1/11

CPC分类号： H05K3/423 ,  H05K3/427 ,  H05K2201/0959 ,  H05K2203/1476

摘要： A printed wiring board including a substrate having first and second surfaces and a penetrating hole extending through the substrate between the surfaces, a first conductive circuit on the first surface, a second conductive circuit on the second surface, and a through-hole conductor in the hole and connecting the first and second conductive circuits. The conductor includes an electroless plated film on the inner-wall surface of the hole, a first electrolytic plated film formed on the electroless plated film and forming a first opening portion opening on the first surface and a second opening portion opening on the second surface, a second electrolytic plated film filling the first portion, and a third electrolytic plated film filling the second portion. The first and second portions taper toward the central portion of the hole with respect to the axis direction of the hole and have cross sections forming a substantially U-shape, respectively.

摘要翻译： 一种印刷电路板，包括具有第一表面和第二表面的基底和在表面之间延伸穿过基底的穿透孔，第一表面上的第一导电电路，第二表面上的第二导电电路和第二表面上的通孔导体 并连接第一和第二导电电路。 所述导体在所述孔的内壁面上具有无电解电镀膜，形成在所述无电解电镀膜上的第一电解电镀膜，在所述第一面上形成开口部的开口部，在所述第二面上开设第二开口部， 填充第一部分的第二电解电镀膜和填充第二部分的第三电解电镀膜。 第一和第二部分相对于孔的轴线方向朝向孔的中心部分逐渐变细，并且分别形成大致U形的横截面。

公开(公告)号：US08413324B2

公开(公告)日：2013-04-09

申请号：US12757157

申请日：2010-04-09

申请人： Kota Noda ,  Tsutomu Yamauchi ,  Satoru Kawai

发明人： Kota Noda ,  Tsutomu Yamauchi ,  Satoru Kawai

IPC分类号： H01K3/10

CPC分类号： H05K1/115 ,  H05K1/0269 ,  H05K3/0032 ,  H05K3/0038 ,  H05K3/423 ,  H05K3/427 ,  H05K3/4602 ,  H05K2201/09254 ,  H05K2201/09563 ,  H05K2201/09827 ,  H05K2201/09845 ,  H05K2201/09918 ,  H05K2203/0554 ,  H05K2203/1572 ,  H05K2203/166

摘要： A method for manufacturing a double-sided circuit board includes preparing a substrate having the first and second surfaces, forming a first hole having a first opening with a diameter R1 on the first surface of the substrate, forming a second hole having a second opening with a diameter R2 on the second surface of the substrate, forming a third hole having a diameter smaller than R1 and/or R2 and connecting the first and second holes such that a penetrating hole formed of the first hole, the second hole and the third hole is formed in the substrate, forming a first conductive circuit on the first surface of the substrate, forming a second conductive circuit on the second surface of the substrate, and filling the penetrating hole with conductive material such that a through-hole conductor electrically connecting the first conductive circuit and the second conductive circuit is formed.

摘要翻译： 一种制造双面电路板的方法包括制备具有第一和第二表面的基板，在基板的第一表面上形成具有直径为R1的第一开口的第一孔，形成具有第二开口的第二孔， 在所述基板的第二表面上的直径R2，形成直径小于R1和/或R2的第三孔，并且连接所述第一孔和所述第二孔，使得由所述第一孔，所述第二孔和所述第三孔形成的穿透孔 形成在基板上，在基板的第一表面上形成第一导电电路，在基板的第二表面上形成第二导电电路，并用导电材料填充该贯穿孔，使得通孔导体将 形成第一导电电路和第二导电电路。

公开(公告)号：US07897027B2

公开(公告)日：2011-03-01

申请号：US12342866

申请日：2008-12-23

申请人： Toru Nakai ,  Satoru Kawai ,  Hiroshi Niwa ,  Yoshiyuki Iwata

发明人： Toru Nakai ,  Satoru Kawai ,  Hiroshi Niwa ,  Yoshiyuki Iwata

IPC分类号： C25D5/22 ,  C25D21/10 ,  C25D7/12

CPC分类号： C25D5/02 ,  H05K3/108 ,  H05K3/421 ,  H05K3/423 ,  H05K3/429 ,  H05K3/4661 ,  H05K2201/0116 ,  H05K2201/09563 ,  H05K2203/025 ,  H05K2203/0257 ,  Y10T29/49124 ,  Y10T428/24917 ,  Y10T428/24926 ,  Y10T428/249955 ,  Y10T428/249958

摘要： A plating method includes providing an article in a plating bath, covering a surface of the article with an insulating member in the plating bath, and electrolytically plating the article while moving one of the insulating member and the article relative to each other.

摘要翻译： 电镀方法包括在镀浴中提供物品，在电镀槽中用绝缘构件覆盖制品的表面，以及在使绝缘构件和制品相对于彼此移动中的同时对制品进行电解电镀。

公开(公告)号：US06259494B1

公开(公告)日：2001-07-10

申请号：US09010688

申请日：1998-01-22

申请人： Satoru Kawai ,  Kiyoshi Ozaki ,  Jun Inoue ,  Yoshio Dejima ,  Kenji Okamoto

发明人： Satoru Kawai ,  Kiyoshi Ozaki ,  Jun Inoue ,  Yoshio Dejima ,  Kenji Okamoto

IPC分类号： G01F11345

CPC分类号： G02F1/136259 ,  G02F1/136213 ,  G02F2001/136263 ,  G02F2001/136272

摘要： A repairable integrated thin film transistor matrix substrate includes an insulated substrate, and a plurality of parallel gate bus lines and a plurality of accumulated capacitance bus lines formed on the insulated substrate. Each of the accumulated capacitance bus lines extend parallel to and between a pair of the gate bus lines, and has a plurality of auxiliary capacitance electrodes which extend from it. A first insulated film is provided on the gate and accumulated capacitance bus lines and the auxiliary capacitance electrodes. A plurality of operating films are formed on the first insulated film, and on each of the operating films, a corresponding thin film transistors are provided. At least two of the thin film transistors are electrically connected to each of the gate bus lines. Also included is a plurality of parallel drain bus lines which are provided substantially perpendicular to the gate and the accumulated capacitance bus lines on the first insulated film. Each drain bus line electrically connects at least two of the thin film transistors. In addition, a second insulated film having an opening over each of the thin film transistors is provided on the thin film transistors and the drain bus lines. Further, a plurality of pixel electrodes are provided on the second insulated film, which pixel electrodes being electrically connected to a corresponding one of the transistors via the opening. At least one first portion of at least one of the gate and the drain bus lines overlaps with at least one second portion of at least one of the auxiliary capacitance and the pixel electrodes. A method for repairing the matrix substrate generally includes electrically connecting a conductor to either sides of a defect to act as a bypass.

摘要翻译： 可修复的集成薄膜晶体管矩阵基板包括绝缘基板，以及形成在绝缘基板上的多个平行栅极总线和多个累积电容总线。 每个累积的电容总线平行于一对栅极总线之间延伸，并且具有从其延伸的多个辅助电容电极。 在栅极上设置第一绝缘膜，并且累积电容总线和辅助电容电极。 在第一绝缘膜上形成多个操作膜，并且在每个操作膜上设置相应的薄膜晶体管。 至少两个薄膜晶体管电连接到每个栅极总线。 还包括多个平行的漏极总线，它们大致垂直于第一绝缘膜上的栅极和累积的电容总线。 每个漏极总线线路将至少两个薄膜晶体管电连接。 此外，在薄膜晶体管和漏极总线上设置有在每个薄膜晶体管上具有开口的第二绝缘膜。 此外，多个像素电极设置在第二绝缘膜上，这些像素电极经由开口电连接到相应的一个晶体管。 栅极和漏极总线中的至少一个的至少一个第一部分与辅助电容和像素电极中的至少一个的至少一个第二部分重叠。 用于修复矩阵衬底的方法通常包括将导体电连接到缺陷的任一侧以用作旁路。