公开(公告)号：US20110101510A1

公开(公告)日：2011-05-05

申请号：US12912202

申请日：2010-10-26

申请人： Kyung-Ro YOON ,  Young-Mi Lee ,  Young-Hwan Shin

发明人： Kyung-Ro YOON ,  Young-Mi Lee ,  Young-Hwan Shin

IPC分类号： H01L23/495 ,  H01L21/58

CPC分类号： H01L23/49827 ,  H01L21/486 ,  H01L23/49816 ,  H01L24/16 ,  H01L2924/01079 ,  H01L2924/15311

摘要： A single-layer board on chip package substrate and a manufacturing method thereof are disclosed. In accordance with an embodiment of the present invention, the substrate includes an insulator, a first pad and a second pad, which are provided on an upper surface of the insulator, a through-hole, which is formed in the insulator such that a lower surface of the first pad is exposed, and a solder resist layer, which is formed on the upper surface of the insulator such that at least a portion of the second pad is exposed.

摘要翻译： 公开了一种单层片上封装衬底及其制造方法。 根据本发明的实施例，基板包括设置在绝缘体的上表面上的绝缘体，第一焊盘和第二焊盘，形成在绝缘体中的通孔使得下部 暴露第一焊盘的表面和形成在绝缘体的上表面上的阻焊层，使得第二焊盘的至少一部分露出。

公开(公告)号：US20110110058A1

公开(公告)日：2011-05-12

申请号：US12748082

申请日：2010-03-26

申请人： Ji-Eun KIM ,  Nam-Keun Oh ,  Jung-Hyun Park ,  Young-Ji Kim ,  Jong-Gyu Choi ,  Sang-Duck Kim ,  Young-Hwan Shin ,  Kyung-Ro Yoon

发明人： Ji-Eun KIM ,  Nam-Keun Oh ,  Jung-Hyun Park ,  Young-Ji Kim ,  Jong-Gyu Choi ,  Sang-Duck Kim ,  Young-Hwan Shin ,  Kyung-Ro Yoon

IPC分类号： H05K7/02 ,  H05K3/00

CPC分类号： H05K3/00 ,  H01L2224/16225 ,  H05K3/30 ,  Y10T29/49124

摘要： A single-layer board on chip package substrate and a manufacturing method thereof are disclosed. In accordance with an embodiment of the present invention, the single-layer board on chip package substrate includes an insulator, a circuit pattern and a flip-chip bonding pad, which are formed on an upper surface of the insulator, a conductive bump, which is in contact with a lower surface of the circuit pattern and penetrates through the insulator, a solder resist layer, which is formed on the upper surface of the insulator such that at least a portion of the flip-chip bonding pad is exposed, and a flip-chip bonding bump, which is formed on an upper surface of the flip-chip bonding pad in order to make a flip-chip connection with an electronic component.

摘要翻译： 公开了一种单层片上封装衬底及其制造方法。 根据本发明的实施例，片上封装衬底上的单层板包括形成在绝缘体上表面上的绝缘体，电路图案和倒装焊接焊盘，导体凸块， 与电路图案的下表面接触并穿透绝缘体，阻焊层，其形成在绝缘体的上表面上，使得至少一部分倒装芯片接合焊盘露出，并且 倒装芯片焊接凸块，其形成在倒装焊盘的上表面上，以便与电子部件进行倒装芯片连接。

公开(公告)号：US20120244662A1

公开(公告)日：2012-09-27

申请号：US13491279

申请日：2012-06-07

申请人： Ji-Eun KIM ,  Nam-Keun Oh ,  Jung-Hyun Park ,  Young-Ji Kim ,  Jong-Gyu Choi ,  Sang-Duck Kim ,  Young-Hwan Shin ,  Kyung-Ro Yoon

发明人： Ji-Eun KIM ,  Nam-Keun Oh ,  Jung-Hyun Park ,  Young-Ji Kim ,  Jong-Gyu Choi ,  Sang-Duck Kim ,  Young-Hwan Shin ,  Kyung-Ro Yoon

IPC分类号： H01L21/50

CPC分类号： H05K3/00 ,  H01L2224/16225 ,  H05K3/30 ,  Y10T29/49124

摘要： A single-layer board on chip package substrate and a manufacturing method thereof are disclosed. In accordance with an embodiment of the present invention, the single-layer board on chip package substrate includes an insulator, a circuit pattern and a flip-chip bonding pad, which are formed on an upper surface of the insulator, a conductive bump, which is in contact with a lower surface of the circuit pattern and penetrates through the insulator, a solder resist layer, which is formed on the upper surface of the insulator such that at least a portion of the flip-chip bonding pad is exposed, and a flip-chip bonding bump, which is formed on an upper surface of the flip-chip bonding pad in order to make a flip-chip connection with an electronic component.

摘要翻译： 公开了一种单层片上封装衬底及其制造方法。 根据本发明的实施例，片上封装衬底上的单层板包括形成在绝缘体上表面上的绝缘体，电路图案和倒装焊接焊盘，导体凸块， 与电路图案的下表面接触并穿透绝缘体，阻焊层，其形成在绝缘体的上表面上，使得至少一部分倒装芯片接合焊盘露出，并且 倒装芯片焊接凸块，其形成在倒装焊盘的上表面上，以便与电子部件进行倒装芯片连接。

公开(公告)号：US20100258545A1

公开(公告)日：2010-10-14

申请号：US12759083

申请日：2010-04-13

申请人： Hwa-Sub OH ,  Young-Hwan Shin ,  Jung-Woo Cho ,  Sung-Jin Lim

发明人： Hwa-Sub OH ,  Young-Hwan Shin ,  Jung-Woo Cho ,  Sung-Jin Lim

IPC分类号： B23K26/38 ,  B23K31/02 ,  B23K1/20

CPC分类号： H05K3/243 ,  B23K26/389 ,  H05K3/0023 ,  H05K3/0035 ,  H05K3/244 ,  H05K3/28 ,  H05K3/282 ,  H05K2201/0391 ,  H05K2203/0505 ,  H05K2203/1476

摘要： A method of manufacturing a printed circuit board is disclosed. The method in accordance with an embodiment of the present invention includes providing an insulation layer having a first area and a second area formed thereon, forming a solder resist layer on the insulation layer, in which the solder resist layer has a first opening formed thereon and the first opening exposes the first area, forming a first surface treatment layer on the first area inside the first opening, forming a second opening on the solder resist layer, in which the second opening exposes the second area, and forming a second surface treatment layer on the second area inside the second opening.

摘要翻译： 公开了一种制造印刷电路板的方法。 根据本发明的实施例的方法包括提供具有形成在其上的第一区域和第二区域的绝缘层，在绝缘层上形成阻焊层，其中阻焊层具有形成在其上的第一开口， 第一开口暴露第一区域，在第一开口内的第一区域上形成第一表面处理层，在阻焊层上形成第二开口，其中第二开口暴露第二区域，并形成第二表面处理层 在第二个开口的第二个区域。

公开(公告)号：US20100012364A1

公开(公告)日：2010-01-21

申请号：US12359416

申请日：2009-01-26

申请人： Byoung-Chan KIM ,  Young-Hwan Shin ,  Jong-Jin Lee

发明人： Byoung-Chan KIM ,  Young-Hwan Shin ,  Jong-Jin Lee

IPC分类号： H05K1/16 ,  H05K3/36

CPC分类号： H01L24/91 ,  H01L24/24 ,  H01L24/82 ,  H01L24/97 ,  H01L2224/04105 ,  H01L2224/16 ,  H01L2224/24227 ,  H01L2224/32145 ,  H01L2224/73267 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/18162 ,  H05K1/187 ,  H05K3/205 ,  H05K3/4602 ,  H05K2201/10515 ,  H05K2201/10674 ,  H05K2203/0376 ,  H05K2203/1469 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49133 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2224/82 ,  H01L2224/0401

摘要： An electronic component embedded printed circuit board and a method for manufacturing the same are disclosed. The method includes: providing a first carrier having a first circuit pattern formed on one surface thereof; providing a second carrier having a second circuit pattern formed on one surface thereof; flip-chip bonding an electronic component to the first circuit pattern; stacking one side of an insulator on one side of the first carrier to cover the electronic component; compressing the second carrier having the second circuit pattern formed on one surface thereof on an other side of the insulator; and removing the first carrier and the second carrier. The method can improve the degree of conformation for an electrical component by embedding the electrical component using a flip-chip bonding method and can improve the yield by simplifying the production process.

摘要翻译： 公开了电子部件嵌入式印刷电路板及其制造方法。 该方法包括：提供具有形成在其一个表面上的第一电路图案的第一载体; 提供具有形成在其一个表面上的第二电路图案的第二载体; 将电子部件倒装成第一电路图案; 将绝缘体的一侧堆叠在第一载体的一侧以覆盖电子部件; 在绝缘体的另一侧上压制在其一个表面上形成有第二电路图案的第二载体; 以及去除所述第一载体和所述第二载体。 该方法可以通过使用倒装芯片接合方法嵌入电子部件来提高电气部件的构造程度，并且可以通过简化制造工艺来提高成品率。

公开(公告)号：US20060017151A1

公开(公告)日：2006-01-26

申请号：US10969403

申请日：2004-10-20

申请人： Kyoung-Ro Yoon ,  Young-Hwan Shin ,  Tae-Gon Lee

发明人： Kyoung-Ro Yoon ,  Young-Hwan Shin ,  Tae-Gon Lee

IPC分类号： H01L23/12 ,  H01L21/50

CPC分类号： H05K3/243 ,  H01L21/4853 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/0401 ,  H01L2224/05155 ,  H01L2224/05599 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/484 ,  H01L2224/73265 ,  H01L2224/85444 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/15311 ,  H05K3/061 ,  H05K3/28 ,  H05K3/427 ,  H05K3/429 ,  H05K3/4652 ,  H05K2201/0352 ,  H05K2201/09536 ,  H05K2201/09736 ,  H05K2203/0353 ,  H05K2203/0574 ,  H05K2203/0577 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49135 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

摘要： Disclosed herein is a Ball Grid Array (BGA) package board. The BGA package board includes a first external layer on which a pattern comprising a circuit pattern and a wire bonding pad pattern is formed, a second external layer on which a pattern comprising a circuit pattern and a solder ball pad pattern is formed, an insulating layer formed between the first and second external layers, a first outer via hole to electrically connect the first and second external layers to each other, and a solder resist layer formed on each of the first and second external layers, with portions of the solder resist layer corresponding to the wire bonding pad pattern and the solder ball pad pattern being opened. The solder ball pad pattern is thinner than the circuit pattern of the second external layer.

摘要翻译： 本文公开了一种球栅阵列（BGA）封装板。 BGA封装板包括：第一外层，其上形成包括电路图案和引线焊盘图案的图案;第二外层，其上形成包括电路图案和焊球图案的图案;绝缘层 形成在第一和第二外部层之间的第一外部通孔，用于将第一和第二外部层彼此电连接的第一外部通孔，以及形成在第一和第二外部层中的每一个上的阻焊层，其中阻焊层的一部分 对应于引线焊盘图案和焊球图案打开。 焊球焊盘图案比第二外层的电路图形薄。

公开(公告)号：US20050194696A1

公开(公告)日：2005-09-08

申请号：US11034251

申请日：2005-01-13

申请人： Young-Hwan Shin ,  Chong-Ho Kim ,  Tae-Gui Kim

发明人： Young-Hwan Shin ,  Chong-Ho Kim ,  Tae-Gui Kim

IPC分类号： C25D7/00 ,  H01L21/48 ,  H01L23/12 ,  H01L23/31 ,  H01L23/498 ,  H01L23/50 ,  H05K3/02 ,  H05K3/24 ,  H05K3/28 ,  H01L23/48

CPC分类号： H05K3/243 ,  H01L21/4846 ,  H01L23/3128 ,  H01L23/498 ,  H01L23/50 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K3/282 ,  H05K2203/0361 ,  H05K2203/0542 ,  H05K2203/1572 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T29/49204 ,  H01L2224/05599 ,  H01L2224/85399 ,  H01L2224/45099 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： A package substrate of, for example, a BGA type or a CSP type, manufactured by carrying out an electrolytic Au plating process without using any plating lead line for formation of bond fingers and solder ball pads, and a method for manufacturing the package substrate. The method includes the steps of laminating first dry films over upper and lower surfaces of a base substrate having via holes while being formed at its upper and lower surfaces with copper foils, and patterning the first dry films to expose predetermined surface portions of the base substrate, removing portions of the copper foils not covered by the first dry films to form circuits, stripping the first dry films, and forming a plated layer over the base substrate, laminating second dry films over the plated surfaces of the base substrate, and patterning the second dry films to expose portions of the plated surfaces of the base substrate corresponding to regions where Au is to be plated, removing the plated layer from the exposed surface portions of the base substrate corresponding to the Au plating regions, plating Au on the exposed surface portions of the base substrate, stripping the second dry films, and removing the remaining plated layer to expose the circuits, and coating a solder resist on the exposed circuits while exposing predetermined portions of the circuits.

公开(公告)号：US08399801B2

公开(公告)日：2013-03-19

申请号：US12759083

申请日：2010-04-13

申请人： Hwa-Sub Oh ,  Young-Hwan Shin ,  Jung-Woo Cho ,  Sung-Jin Lim

发明人： Hwa-Sub Oh ,  Young-Hwan Shin ,  Jung-Woo Cho ,  Sung-Jin Lim

IPC分类号： B23K26/38

CPC分类号： H05K3/243 ,  B23K26/389 ,  H05K3/0023 ,  H05K3/0035 ,  H05K3/244 ,  H05K3/28 ,  H05K3/282 ,  H05K2201/0391 ,  H05K2203/0505 ,  H05K2203/1476

摘要： A method of manufacturing a printed circuit board is disclosed. The method in accordance with an embodiment of the present invention includes providing an insulation layer having a first area and a second area formed thereon, forming a solder resist layer on the insulation layer, in which the solder resist layer has a first opening formed thereon and the first opening exposes the first area, forming a first surface treatment layer on the first area inside the first opening, forming a second opening on the solder resist layer, in which the second opening exposes the second area, and forming a second surface treatment layer on the second area inside the second opening.

摘要翻译： 公开了一种制造印刷电路板的方法。 根据本发明的实施例的方法包括提供具有形成在其上的第一区域和第二区域的绝缘层，在绝缘层上形成阻焊层，其中阻焊层具有形成在其上的第一开口， 第一开口暴露第一区域，在第一开口内的第一区域上形成第一表面处理层，在阻焊层上形成第二开口，其中第二开口暴露第二区域，并形成第二表面处理层 在第二个开口的第二个区域。

公开(公告)号：US20100147575A1

公开(公告)日：2010-06-17

申请号：US12614057

申请日：2009-11-06

申请人： Han-Ul Lee ,  Young-Hwan Shin ,  Jong-Jin Lee

发明人： Han-Ul Lee ,  Young-Hwan Shin ,  Jong-Jin Lee

IPC分类号： H05K1/11 ,  C25D5/02

CPC分类号： H05K1/119 ,  H05K3/0038 ,  H05K3/427 ,  H05K2201/09563 ,  H05K2201/09827 ,  H05K2203/1572

摘要： A printed circuit board and a method of manufacturing the printed circuit board are disclosed. The method of manufacturing a printed circuit board can include: processing a first hole, which has a tapered shape, in one side of a substrate by using a laser drill; processing a second hole, which has a tapered shape and which connects with the first hole, in the other side of the substrate by using a laser drill in a position corresponding to that of the first hole; and forming a conductive portion, which electrically connects both sides of the substrate through the first hole and the second hole, by performing plating. This method may be used for providing reliable interlayer connections.

摘要翻译： 公开了印刷电路板和印刷电路板的制造方法。 制造印刷电路板的方法可以包括：通过使用激光钻孔在基板的一侧处理具有锥形形状的第一孔; 通过使用激光钻头处理与第一孔相对应的位置，在基板的另一侧处理具有锥形形状并与第一孔连接的第二孔; 并且通过执行电镀形成导电部分，其通过第一孔和第二孔电连接基板的两侧。 该方法可用于提供可靠的层间连接。

公开(公告)号：US20080216314A1

公开(公告)日：2008-09-11

申请号：US12125979

申请日：2008-05-23

申请人： Kyoung-Ro Yoon ,  Young-Hwan Shin ,  Tae-Gon Lee

发明人： Kyoung-Ro Yoon ,  Young-Hwan Shin ,  Tae-Gon Lee

IPC分类号： H05K3/42

CPC分类号： H05K3/243 ,  H01L21/4853 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/0401 ,  H01L2224/05155 ,  H01L2224/05599 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/484 ,  H01L2224/73265 ,  H01L2224/85444 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/15311 ,  H05K3/061 ,  H05K3/28 ,  H05K3/427 ,  H05K3/429 ,  H05K3/4652 ,  H05K2201/0352 ,  H05K2201/09536 ,  H05K2201/09736 ,  H05K2203/0353 ,  H05K2203/0574 ,  H05K2203/0577 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49135 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

摘要： Disclosed herein is a Ball Grid Array (BGA) package board. The BGA package board includes a first external layer on which a pattern comprising a circuit pattern and a wire bonding pad pattern is formed, a second external layer on which a pattern comprising a circuit pattern and a solder ball pad pattern is formed, an insulating layer formed between the first and second external layers, a first outer via hole to electrically connect the first and second external layers to each other, and a solder resist layer formed on each of the first and second external layers, with portions of the solder resist layer corresponding to the wire bonding pad pattern and the solder ball pad pattern being opened. The solder ball pad pattern is thinner than the circuit pattern of the second external layer.

摘要翻译： 本文公开了一种球栅阵列（BGA）封装板。 BGA封装板包括：第一外层，其上形成包括电路图案和引线焊盘图案的图案;第二外层，其上形成包括电路图案和焊球图案的图案;绝缘层 形成在第一和第二外部层之间的第一外部通孔，用于将第一和第二外部层彼此电连接的第一外部通孔，以及形成在第一和第二外部层中的每一个上的阻焊层，其中阻焊层的一部分 对应于引线焊盘图案和焊球图案打开。 焊球焊盘图案比第二外层的电路图形薄。