公开(公告)号：US20060023439A1

公开(公告)日：2006-02-02

申请号：US11238960

申请日：2005-09-30

申请人： Lawrence Fraley ,  Voya Markovich

发明人： Lawrence Fraley ,  Voya Markovich

IPC分类号： H05K7/06 ,  H01L23/48 ,  H01L23/34 ,  H01L23/12

CPC分类号： H01L23/145 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/49822 ,  H01L23/5383 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/05599 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2225/06558 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/024 ,  H05K1/113 ,  H05K3/4623 ,  H05K3/4688 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2201/10378 ,  H05K2203/061 ,  Y10T29/49133 ,  Y10T29/49144 ,  Y10T29/49155 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A multi-chip electronic package which utilizes an organic, laminate chip carrier and a pair of semiconductor chips positioned on an upper surface of the carrier in a stacked orientation. The organic, laminate chip carrier is comprised of a plurality of conductive planes and dielectric layers and couples one or both of the chips to underlying conductors on the bottom surface thereof. The carrier may include a high-speed portion to assure high-frequency connection between the semiconductor chips and may also include an internal capacitor and/or thermally conductive member for enhanced operational capabilities. The first chip, e.g., an ASIC chip, is solder bonded to the carrier while the second chip, e.g., a memory chip, is secured to the first chip's upper surface and coupled to the carrier using a plurality of wirebond connections.

摘要翻译： 一种多芯片电子封装，其利用位于载体的上表面上的堆叠取向的有机层压芯片载体和一对半导体芯片。 有机层压芯片载体由多个导电平面和电介质层组成，并将芯片中的一个或两个耦合到其底表面上的下面的导体。 载体可以包括高速部分，以确保半导体芯片之间的高频连接，并且还可以包括用于增强操作能力的内部电容器和/或导热构件。 第一芯片（例如ASIC芯片）被焊接到载体上，而第二芯片（例如存储器芯片）被固定到第一芯片的上表面并且使用多个引线键合连接到载体。

公开(公告)号：US20060240594A1

公开(公告)日：2006-10-26

申请号：US11455183

申请日：2006-06-19

申请人： Lawrence Fraley ,  Voya Markovich

发明人： Lawrence Fraley ,  Voya Markovich

IPC分类号： H01L21/00

CPC分类号： H01L23/145 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/49822 ,  H01L23/5383 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/05599 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2225/06558 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/024 ,  H05K1/113 ,  H05K3/4623 ,  H05K3/4688 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2201/10378 ,  H05K2203/061 ,  Y10T29/49133 ,  Y10T29/49144 ,  Y10T29/49155 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method of making a multi-chip electronic package which utilizes an organic, laminate chip carrier and a pair of semiconductor chips positioned on an upper surface of the carrier in a stacked orientation. The organic, laminate chip carrier is comprised of a plurality of conductive planes and dielectric layers and couples one or both of the chips to underlying conductors on the bottom surface thereof. The carrier may include a high-speed portion to assure high-frequency connection between the semiconductor chips and may also include an internal capacitor and/or thermally conductive member for enhanced operational capabilities. The first chip, e.g., an ASIC chip, is solder bonded to the carrier while the second chip, e.g., a memory chip, is secured to the first chip's upper surface and coupled to the carrier using a plurality of wirebond connections.

摘要翻译： 一种制造多芯片电子封装的方法，该多芯片电子封装利用有机层压芯片载体和位于载体的上表面上的堆叠取向的一对半导体芯片。 有机层压芯片载体由多个导电平面和电介质层组成，并将芯片中的一个或两个耦合到其底表面上的下面的导体。 载体可以包括高速部分，以确保半导体芯片之间的高频连接，并且还可以包括用于增强操作能力的内部电容器和/或导热构件。 第一芯片（例如ASIC芯片）被焊接到载体上，而第二芯片（例如存储器芯片）被固定到第一芯片的上表面并且使用多个引线键合连接到载体。

公开(公告)号：US08198739B2

公开(公告)日：2012-06-12

申请号：US12836612

申请日：2010-08-13

申请人： How Lin ,  Frank Egitto ,  Voya Markovich

发明人： How Lin ,  Frank Egitto ,  Voya Markovich

IPC分类号： H01L23/48 ,  H01L21/44

CPC分类号： H01L23/3157 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/72 ,  H01L2224/0226 ,  H01L2224/02335 ,  H01L2224/024 ,  H01L2224/0401 ,  H01L2224/05147 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/73251 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/81901 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2224/16 ,  H01L2224/72

摘要： A method of forming a compressible contact structure on a semi-conductor chip which comprises bonding a compressible polymer layer to the chip's surface, forming a plurality of openings within the layer, depositing electrically conductive material within the openings to form electrical connections with the chip's contacts, forming a plurality of electrically conductive line elements on the polymer layer extending from a respective opening and each including an end portion, and forming a plurality of contact members each on a respective one of the line segment end portions. The compressible polymer layer allows the contact members to deflect toward (compress) the chip when the contact members are engaged by an external force or forces. A semi-conductor chip including such a compressible contact structure is also provided.

摘要翻译： 一种在半导体芯片上形成可压缩接触结构的方法，包括将可压缩的聚合物层粘合到芯片的表面，在该层内形成多个开口，在开口内沉积导电材料以形成与芯片的触点的电连接 在聚合物层上形成多个导电线元件，所述多个导电线元件从相应的开口延伸并且各自包括端部，并且在所述线段端部中的相应一个上形成多个接触元件。 当可接触构件通过外力或力接合时，可压缩聚合物层允许接触构件偏转（压缩）芯片。 还提供了包括这种可压缩接触结构的半导体芯片。

公开(公告)号：US20070166944A1

公开(公告)日：2007-07-19

申请号：US11324432

申请日：2006-01-04

申请人： Robert Japp ,  John Lauffer ,  Voya Markovich ,  William Wilson

发明人： Robert Japp ,  John Lauffer ,  Voya Markovich ,  William Wilson

IPC分类号： H01L21/20

CPC分类号： H05K3/4641 ,  H05K3/429 ,  H05K2203/068

摘要： A method of making a circuitized substrate and an electrical assembly utilizing same in which the substrate is comprised of at least two sub-composites in which the dielectric material of at least one of these sub-composites is heated during bonding (e.g., lamination) to the other sufficiently to cause the dielectric material to flow into and substantially fill openings in a conductive layer for the bonded structure. Conductive thru-holes are formed within the bonded structure to couple selected ones of the structure's conductive layers. Formation of an electrical assembly is possible by positioning one or more electrical components (e.g., semiconductor chips or chip carriers) on the final structure and electrically coupling these to the structure's external circuitry.

摘要翻译： 一种制造电路化基板的方法和使用其的电气组件，其中基板由至少两个亚复合材料构成，其中这些亚复合材料中的至少一个的介电材料在粘合（例如，层压）期间被加热到 另一个足以使电介质材料流入并基本上填充用于接合结构的导电层中的开口。 导电通孔形成在接合结构内，以耦合所选择的结构导电层。 通过将一个或多个电气部件（例如，半导体芯片或芯片载体）定位在最终结构上并将其电耦合到结构的外部电路，可以形成电组件。

公开(公告)号：US20070010065A1

公开(公告)日：2007-01-11

申请号：US11352279

申请日：2006-02-13

申请人： Rabindra Das ,  John Lauffer ,  How Lin ,  Voya Markovich

发明人： Rabindra Das ,  John Lauffer ,  How Lin ,  Voya Markovich

IPC分类号： H01L21/20 ,  H01L21/44

CPC分类号： H05K1/162 ,  H05K1/113 ,  H05K3/0023 ,  H05K3/4602 ,  H05K2201/0187 ,  H05K2201/0209 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2203/013 ,  H05K2203/0568

摘要： A method of forming a capacitive substrate in which at least one capacitive dielectric layer of material is screen or ink jet printed onto a conductor and the substrate is thereafter processed further, including the addition of thru-holes to couple selected elements within the substrate to form at least two capacitors as internal elements of the substrate. The capacitive substrate may be incorporated within a larger circuitized substrate, e.g., to form an electrical assembly. A method of making an information handling system including such substrates is also provided.

摘要翻译： 一种形成电容衬底的方法，其中材料的至少一个电容介电层被屏幕或喷墨印刷到导体上，然后进一步处理衬底，包括添加通孔以将所选择的元件耦合到衬底内以形成 至少两个电容器作为衬底的内部元件。 电容性衬底可以结合在更大的电路化衬底内，例如以形成电组件。 还提供了一种制造包括这种基板的信息处理系统的方法。

公开(公告)号：US20060214010A1

公开(公告)日：2006-09-28

申请号：US11401401

申请日：2006-04-11

申请人： Benson Chan ,  Frank Egitto ,  Roy Magnuson ,  Voya Markovich ,  David Thomas

发明人： Benson Chan ,  Frank Egitto ,  Roy Magnuson ,  Voya Markovich ,  David Thomas

IPC分类号： G06K19/06

CPC分类号： G06K7/084 ,  G06K17/00 ,  G06K19/005 ,  G06K19/07354 ,  G06K2017/0064 ,  H05K1/0221 ,  H05K1/0222 ,  H05K3/429 ,  H05K3/4602 ,  H05K2201/09809 ,  H05K2203/0733 ,  Y10T29/49165

摘要： A circuitized substrate in which selected ones of the signal conductors are substantially surrounded by shielding members which shield the conductors during passage of high frequency signals, e.g., to reduce noise. The shielding members may form solid members which lie parallel and/or perpendicular to the signal conductors, and may also be substantially cylindrical in shape to surround a conductive thru-hole which also forms part of the substrate. An electrical assembly and an information handling system are also defined.

摘要翻译： 电路化基板，其中所选择的信号导体基本上由在高频信号通过期间屏蔽导体的屏蔽构件包围，例如降低噪声。 屏蔽构件可以形成平行和/或垂直于信号导体的固体构件，并且也可以基本上为圆柱形，以包围也形成衬底的一部分的导电通孔。 还定义了电组件和信息处理系统。

公开(公告)号：US20060154434A1

公开(公告)日：2006-07-13

申请号：US11172794

申请日：2005-07-05

申请人： Rabindra Das ,  John Lauffer ,  Voya Markovich ,  James Matthews

发明人： Rabindra Das ,  John Lauffer ,  Voya Markovich ,  James Matthews

IPC分类号： H01L21/20 ,  H01L21/44

CPC分类号： H05K1/162 ,  H05K3/4611 ,  H05K3/4688 ,  H05K2201/0209 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2203/0207

摘要： A method of forming a capacitive substrate in which first and second conductors are formed opposite a dielectric, with one of these electrically coupled to a thru-hole connection. Each functions as an electrode for the resulting capacitor. The substrate is then adapted for being incorporated within a larger structure to form a circuitized substrate such as a printed circuit board or a chip carrier. Additional capacitors are also possible.

摘要翻译： 一种形成电容基板的方法，其中第一和第二导体与电介质相对地形成，其中一个电气基板电耦合到通孔连接。 每个都用作所得电容器的电极。 然后将衬底适用于并入更大的结构中以形成诸如印刷电路板或芯片载体的电路化衬底。 附加的电容器也是可能的。

公开(公告)号：US20060131755A1

公开(公告)日：2006-06-22

申请号：US11349990

申请日：2006-02-09

申请人： Robert Japp ,  Voya Markovich ,  Cheryl Palomaki ,  Kostas Papathomas ,  David Thomas

发明人： Robert Japp ,  Voya Markovich ,  Cheryl Palomaki ,  Kostas Papathomas ,  David Thomas

IPC分类号： H01L23/48

CPC分类号： H01L23/145 ,  H01L23/4922 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/16225 ,  H05K1/0373 ,  H05K3/4602 ,  H05K2201/0209

摘要： A method of making a circuitized substrate comprising a first layer comprised of a dielectric material including a resin material including a predetermined quantity of particles therein and not including continuous fibers, semi-continuous fibers or the like as part thereof, and at least one circuitized layer positioned on the dielectric first layer.

摘要翻译： 一种制造电路化基板的方法，包括由包括其中包含预定量的颗粒的树脂材料的介电材料构成的第一层，并且不包括连续纤维，半连续纤维等作为其一部分，以及至少一个电路层 位于电介质第一层上。

公开(公告)号：US06992896B2

公开(公告)日：2006-01-31

申请号：US10661616

申请日：2003-09-15

申请人： Lawrence R. Fraley ,  Voya Markovich

发明人： Lawrence R. Fraley ,  Voya Markovich

IPC分类号： H05K7/06 ,  H05K7/20 ,  H01L23/34

CPC分类号： H01L25/18 ,  H01L23/3128 ,  H01L23/5383 ,  H01L25/0652 ,  H01L25/0655 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/024 ,  H05K1/113 ,  H05K3/4623 ,  H05K3/4688 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2201/10378 ,  H05K2203/061 ,  H01L2224/0401

摘要： A multi-chip electronic package which utilizes an organic, laminate chip carrier and a pair of semiconductor chips positioned on an upper surface of the carrier in a stacked orientation. The organic, laminate chip carrier is comprised of a plurality of conductive planes and dielectric layers and couples one or both of the chips to underlying conductors on the bottom surface thereof. The carrier may include a high-speed portion to assure high-frequency connection between the semiconductor chips and may also include an internal capacitor and/or thermally conductive member for enhanced operational capabilities. The first chip, e.g., an ASIC chip, is solder bonded to the carrier while the second chip, e.g., a memory chip, is secured to the first chip's upper surface and coupled to the carrier using a plurality of wirebond connections.

公开(公告)号：US20050289019A1

公开(公告)日：2005-12-29

申请号：US10860067

申请日：2004-06-04

申请人： Benson Chan ,  How Lin ,  William Maines ,  Voya Markovich

发明人： Benson Chan ,  How Lin ,  William Maines ,  Voya Markovich

IPC分类号： B65G61/00 ,  G06K17/00 ,  G06Q10/00 ,  G06Q99/00

CPC分类号： G06K17/00 ,  G06Q10/08 ,  G06Q10/087

摘要： A method and system for tracking goods, etc., food products, which involves identifying the received goods at a specified location and thereafter assigning an encoded readable code to each of the goods which can be only accessed by authorized personnel responsible for handling the goods on through to and including shipment, e.g., to customers. A host computer includes a database for encoding received identification data and thereafter encoding same to provide the readable codes. The method and system also allows the customer/recipient to access the codes to discern whether he/she has received the correct goods he purchased.

摘要翻译： 一种用于跟踪货物等的食品的方法和系统，其涉及在指定位置识别所接收的货物，然后将编码的可读代码分配给每个商品，所述商品只能由负责处理商品的授权人员访问 通过和包括装运，例如，给客户。 主计算机包括用于对接收到的标识数据进行编码的数据库，然后对其进行编码以提供可读代码。 该方法和系统还允许客户/接收者访问代码以辨别他/她是否已经收到他购买的正确商品。